MPM3606AGQV-Z [MPS]
Switching Regulator, 3 X 5 MM, 1.60 MM HEIGHT, MO-220, QFN-20;
| 型号： | MPM3606AGQV-Z |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Switching Regulator, 3 X 5 MM, 1.60 MM HEIGHT, MO-220, QFN-20 开关 输出元件 |
| 文件： | 总23页 (文件大小：1336K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MPM3606A
21V/0.6A DC/DC Module
Synchronous Step-Down Converter
with Integrated Inductor
DESCRIPTION
FEATURES
The MPM3606A is a synchronous rectified,
step-down module converter with built-in power
MOSFETs, inductor, and two capacitors. It
offers a compact solution that requires only 5
•
•
•
4.5V-to-21V Operating Input Range
0.6A Continuous Load Current
100mΩ/50mΩ Low RDS(ON) Internal Power
MOSFETs
external components to achieve
a
0.6A
•
•
•
•
•
•
•
•
•
Integrated Inductor
continuous output current with excellent load
and line regulation over a wide input-supply
range. Also, it provides fast load transient
response.
Integrated VCC and Bootstrap Capacitors
Power-Save Mode at Light Load
Power Good Indicator
Over-Current Protection and Hiccup
Thermal Shutdown
Output Adjustable from 0.8V
Available in QFN20 (3x5x1.6mm) Package
Total solution size 6.7mm x7.3mm
Full protection features include over-current
protection (OCP) and thermal shutdown (TSD).
MPM3606A
manufacturing
eliminates
risks while
design
and
dramatically
improving time-to-market.
APPLICATIONS
The MPM3606A is available in a space-saving
QFN20 (3mmx5mmx1.6mm) package.
•
•
•
•
•
Industrial Controls
Medical and Imaging Equipment
Telecom and Networking Applications
LDO Replacement
Space and Resource-limited Applications
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
BST
SW
3.3V/0.6AVOUT
12V
VIN
EN
IN
OUT
MPM3606A
C1
10µF
R3
100k
C2
22µF
R1
75k
EN
FB
VCC
PG
R2
24k
PG
NC
PGND AGND
MPM3606A Rev. 1.0
1/5/2015
www.MonolithicPower.com
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© 2015 MPS. All Rights Reserved.
1
MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
ORDERING INFORMATION
Part Number*
Package
Top Marking
MPM3606AGQV
QFN-20 (3mmx5mmx1.6mm)
See Below
* For Tape & Reel, add suffix –Z (e.g. MPM3606AGQV–Z);
TOP MARKING
MP: MPS prefix:
Y: year code;
W: week code:
3606A: first five digits of the part number;
LLL: lot number;
M: module;
MPM3606A Rev. 1.0
1/5/2015
www.MonolithicPower.com
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2
MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
PACKAGE REFERENCE
TOP VIEW
PG
IN
EN
NC
PGND PGND
18
17
16
15
13
14
1
2
3
4
12
11
10
9
FB
PGND
BST
NC
VCC
19
20
AGND
NC NC
SW
OUT
5
6
8
7
SW
SW
OUT
OUT
All “NC” pins
must be left floating
ABSOLUTE MAXIMUM RATINGS (1)
VIN ................................................ -0.3V to 28V
Thermal Resistance (6)
QFN-20 (3mmx5mmx1.6mm). 46...... 10... °C/W
θJA θJC
V
SW ....................................................................
-0.3V (-5V for <10ns) to 28V (30V for <10ns)
BST ...................................................... VSW+6V
Notes:
1) Exceeding these ratings may damage the device.
2) About the details of EN pin’s ABS MAX rating, please refer to
page 14, Enable control section.
V
All Other Pins............................... -0.3V to 6V (2)
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
(3)
Continuous Power Dissipation (TA = +25°C)
............................................................2.7W
Junction Temperature..............................150°C
Lead Temperature ...................................260°C
Storage Temperature.................-65°C to 150°C
Recommended Operating Conditions (4)
Supply Voltage VIN .......................... 4.5V to 21V
4) The device is not guaranteed to function outside of its
operating conditions.
5) In practical design, the minimum VOUT is limited by minimum
(5)
Output Voltage VOUT...............0.8V to VIN*DMAX
Operating Junction Temp. (TJ). -40°C to +125°C
on time, 50ns on time is commonly recommended
for
calculating to give some margin. For output voltage setting
above 5.5V, please refer to the application information on
page 17.
6) Measured on JESD51-7, 4-layer PCB.
MPM3606A Rev. 1.0
1/5/2015
www.MonolithicPower.com
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
ELECTRICAL CHARACTERISTICS
VIN=12V, TJ=-40°C to +125°C(7), typical value is tested at TJ=+25°C, unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ Max Units
VEN = 0V, TJ =+25°C
VEN = 0V, TJ =-40°C to +125°C
VFB = 1V, TJ =+25°C
6.5
6.5
0.3
0.3
100
50
8
μA
μA
Supply Current (Shutdown)
Is
9
0.39
0.44
mA
mA
mΩ
mΩ
µH
mΩ
μA
Supply Current (Quiescent)
Iq
VFB = 1V, TJ =-40°C to +125°C
HS Switch-On Resistance
LS Switch-On Resistance
Integrated Inductor Inductance(8)
Inductor DC Resistance
Switch Leakage
HSRDS-ON VBST-SW=5V
LSRDS-ON
L
VCC =5V
1
LDCR
60
SWLKG
ILIMIT
VEN = 0V, VSW =12V
1
Current Limit
Under 40% Duty Cycle
VFB=0.75V, TJ =+25°C
VFB=0.75V, TJ =-40°C to +125°C
VFB=200mV
1.7
2.4
A
1600 2000 2400 kHz
1500 2000 2500 kHz
Oscillator Frequency
Fold-Back Frequency
Maximum Duty Cycle
Minimum On Time(8)
Feedback Voltage
Feedback Current
fSW
fFB
0.3
83
fSW
%
VFB=700mV, TJ =+25°C
VFB=700mV, TJ =-40°C to +125°C
78
77
88
89
DMAX
83
%
τON
_
30
ns
MIN
TJ =25°C
786
782
798
798
10
810
814
50
mV
mV
nA
VFB
IFB
TJ =-40°C to +125°C
VFB=820mV
TJ =+25°C
1.2
1.4
1.4
1.6
1.65
1.4
V
V
EN Rising Threshold
EN Falling Threshold
EN Input Current
VEN_RISING
VEN_FALLING
IEN
TJ =-40°C to +125°C
TJ =+25°C
1.15
1.05 1.25
V
TJ =-40°C to +125°C
VEN=2V, TJ =+25°C
VEN=2V, TJ =-40°C to +125°C
TJ =+25°C
1
2
1.25 1.45
V
2.3
2.3
0.9
2.6
2.8
μA
μA
VFB
VFB
µs
µs
µs
µs
1.8
0.86
Power Good Rising Threshold
Power Good Falling Threshold
PGVTH-Hi
PGVTH-LO
0.95
TJ =+25°C
0.78 0.83 0.88
TJ =+25°C
15
10
40
30
35
35
80
80
55
60
Power Good Rising Delay
Power Good Falling Delay
PGTD_RSING
TJ =-40°C to +125°C
TJ =+25°C
125
135
PGTD_FALLING
TJ =-40°C to +125°C
Power Good Sink Current
Capability
VPG
Sink 1mA
VPG=6V
0.4
1
V
Power Good Leakage Current
IPG-LEAK
μA
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
ELECTRICAL CHARACTERISTICS (continued)
VIN=12V, TJ=-40°C to +125°C, typical value is tested at TJ=+25°C, unless otherwise noted.
Parameter
Symbol
Condition
Min
3.7
Typ Max Units
TJ =+25°C
3.9
3.9
4.1
V
V
VIN Under-Voltage Lockout
Threshold—Rising
INUVVth
TJ =-40°C to +125°C
3.65
4.15
VIN Under-Voltage Lockout
Threshold—Hysteresis
INUVHYS
VCC
600
675
750
mV
TJ =+25°C
4.75
4.7
4.9
4.9
1.5
1.6
5.05
5.1
3
V
V
VCC Regulator
TJ =-40°C to +125°C
ICC=5mA
VCC Load Regulation
%
ms
VOUT from 10% to 90%, TJ =+25°C 0.8
2.4
Soft-Start Time
tSS
VOUT from 10% to 90%, TJ =-40°C
to +125°C
0.6
1.6
2.6
ms
Thermal Shutdown (8)
TSD
150
20
°C
°C
Thermal Hysteresis (8)
TSD_HYS
Notes:
7) Not tested in production. Guaranteed by over-temperature correlation.
8) Guaranteed by characterization test.
MPM3606A Rev. 1.0
1/5/2015
www.MonolithicPower.com
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
TYPICAL CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
TYPICAL PERFORMANCE CHARACTERISTICS
Performance waveforms are captured from the evaluation board discussed in the Design
Example section.VIN = 12V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are captured from the evaluation board discussed in the Design
Example section.VIN = 12V, VOUT = 3.3V, TA = 25°C, unless otherwise noted.
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
PIN FUNCTIONS
Package
Pin #
Name
Description
Feedback. Connect FB to the tap of an external resistor divider from the output to
AGND to set the output voltage. To prevent current-limit runaway during a short-circuit
fault, the frequency foldback comparator lowers the oscillator frequency when the FB
voltage is below 400mV. Place the resistor divider as close to FB as possible. Avoid
placing vias on the FB traces.
1
FB
Internal 4.9V LDO output. The module integrates a LDO output capacitor, so there is
no need to add an external capacitor.
2
3
VCC
Analog Ground. Reference ground of logic circuit. AGND is connected internally to
PGND, so there is no need to add any external connections to PGND.
AGND
Switch Output. Large copper plane is recommended on pins 4, 5 and 6 to improve
thermal performance.
4, 5, 6
7, 8, 9
SW
OUT
NC
Power Output. Connect the load to OUT; an output capacitor is needed.
10, 15,
19, 20
DO NOT CONNECT. NC must be left floating.
Bootstrap. A bootstrap capacitor is integrated internally, so an external connection is
not needed.
11
BST
Power Ground. Reference ground of the power device. PCB layout requires extra care,
please refer to PCB guideline recommendations. For best results, connect to PGND
with copper and vias.
12, 13, 14
PGND
Supply Voltage. IN supplies power to the internal MOSFET and regulator. The
MPM3606A operates from a +4.5V to +21V input rail. It requires a low-ESR, and low-
inductance capacitor to decouple the input rail. Place the input capacitor very close to
IN and connect it with wide PCB traces and multiple vias.
16
IN
Enable. Pull EN high to enable the module. Leave EN floating or connect it to GND to
disable the module.
17
18
EN
PG
Power Good Indicator. PG is an open-drain output. Connect PG to VCC (or another
voltage source) through a pull-up resistor (e.g. 100kΩ). Additional details on PG
behavior can be found in the OPERATION section under “Power Good Indicator.”
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
FUNCTIONAL BLOCK DIAGRAM
EN
OUT
VREF
VSS
PG
718mV Rising
662mV Falling
PGND
AGND
Figure 1. Functional Block Diagram
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
OPERATION
The
MPM3606A
is
a
high-frequency,
DCM Control Operation
synchronous, rectified, step-down, switch-mode
converter with built-in power MOSFETs,
integrated inductor, and two capacitors. It offers
a compact solution that achieves a 0.6A
continuous output current with excellent load
and line regulation over a 4.5V to 21V input-
supply range.
The VCOMP ramps up as the output current
increases. When its minimum value exceeds
VAAM, the device enters DCM. In this mode, the
internal 2MHz clock initiates the PWM cycle,
the HS-FET turns on and remains on until
VILsense reaches the value set by VCOMP (after a
period of dead time), and then the low-side
MOSFET (LS-FET) turns on and remains on
until the inductor-current value decreases to
zero. The device repeats the same operation in
every clock cycle to regulate the output voltage
(see Figure 3).
The MPM3606A has three working modes:
advanced asynchronous modulation (AAM),
similar to PFM mode, discontinuous conduction
mode (DCM), and continuous conduction mode
(CCM). The load current increases as the
device transitions from AAM mode to DCM to
CCM. In particular conditions, the device will
not enter AAM mode during a light-load
condition (See Power-Save Mode Range graph
on page 8).
HS-FET is on
HS/LS-FETs are off
VSW
VOUT
LS-FET is on
IL
IOUT
AAM Control Operation
In a light-load condition, MPM3606A operates
in AAM mode (see Figure 2). The VAAM is an
internally fixed voltage when input and output
voltages are fixed. VCOMP is the error amplifier
output, which represents the peak inductor
current information. When VCOMP is lower than
A clock cycle
Zero current detect
Figure 3. DCM Control Operation
CCM Control Operation
The device enters CCM from DCM once the
inductor current no longer drops to zero in a
clock cycle. In CCM, the internal 2MHz clock
initiates the PWM cycle, the HS-FET turns on
and remains on until VILsense reaches the value
set by VCOMP (after a period of dead time), and
then the LS-FET turns on and remains on until
the next clock cycle starts. The device repeats
the same operation in every clock cycle to
regulate the output voltage.
VAAM, the internal clock is blocked. This will
make the MPM3606A skips pulses, achieving
the light-load power save. Refer to AN032 for
additional detail.
The internal clock re-sets every time VCOMP
exceeds VAAM. Simultaneously, the high-side
MOSFET (HS-FET) turns on and remains on
until VILsense reaches the value set by VCOMP.
If VILsense does not reach the value set by VCOMP
within 83% of one PWM period, the HS power
MOSFET will be forced off.
The light-load feature in this device is optimized
for 12V input applications.
Internal VCC Regulator
A 4.9V internal regulator powers most of the
internal circuitries. This regulator takes VIN and
operates in the full VIN range. When VIN
exceeds 4.9V, the output of the regulator is in
full regulation. If VIN is less than 4.9V, the output
decreases. The device integrates an internal
decoupling capacitor, so adding an external
VCC output capacitor is unnecessary.
4
50
R1
R2
Rt
Figure 2. Simplified AAM Control Logic
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
Error Amplifier (EA)
soft-start voltage (SS) that ramps up from 0V to
4.9V. When SS is lower than VREF, the error
amplifier uses SS as the reference. When SS is
higher than VREF, the error amplifier uses VREF
as the reference. The SS time is set internally
to 1.6ms (VOUT from 10% to 90%).
The error amplifier compares the FB voltage to
the internal 0.798V reference (VREF) and
outputs a current proportional to the difference
between the two. This output current then
charges
or
discharges
the
internal
compensation network to form the COMP
voltage; the COMP voltage controls the power
MOSFET current. The optimized internal
compensation network minimizes the external
component count and simplifies the control loop
design.
Pre-Bias Start-Up
The MPM3606A is designed for a monotonic
start-up into a pre-biased output voltage. If the
output is pre-biased to a certain voltage during
start-up, the voltage on the soft-start capacitor
is charged. When the soft-start capacitor’s
voltage exceeds the sensed output voltage at
FB, the device turns on the HS-FET and the
LS-FET sequentially. Output voltage ramps up
following the soft-start slew rate.
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient input-supply
voltage. The MPM3606A UVLO comparator
monitors the output voltage of the internal
regulator (VCC). The UVLO rising threshold is
about 3.9V while its falling threshold is 3.225V.
Power Good Indicator (PG)
The MPM3606A has power good (PG) output to
indicate whether the output voltage of the
module is ready. PG is an open-drain output.
Connect PG to VCC (or another voltage source)
through a pull-up resistor (e.g. 100kΩ). When
the input voltage is applied, PG is pulled down
to GND before internal VSS>1V. After VSS>1V,
when VFB is above 90% of VREF, PG is pulled
high (after a 35µs delay time). During normal
operation, PG is pulled low when the VFB drops
below 83% of VREF (after a 80µs delay).
Enable Control (EN)
EN turns the regulator on and off. Drive EN high
to turn on the regulator; drive EN low to turn off
the regulator. An internal 870kΩ resistor from
EN to GND allows EN to be floated to shut
down the chip.
EN is clamped internally using a 6.5V series-
Zener-diode (see Figure 4). Connecting EN to a
voltage source directly without a pull-up resistor
requires limiting the amplitude of the voltage
source to ≤6V to prevent damage to the Zener
diode.
When UVLO or OTP occurs, PG is pulled low
immediately; when OC (over-current) occurs,
PG is pulled low when VFB drops below 83% of
V
REF (after a 80µs delay).
Connecting the EN input through a pull-up
resistor to the voltage on VIN limits the EN input
current to less than 100µA.
Since MPM3606A
doesn’t
implement
dedicated output over-voltage protection, the
PG won’t response to an output over-voltage
condition.
For example, with 12V connected to VIN,
RPULLUP ≥ (12V – 6.5V) ÷ 100µA = 55kΩ.
Over-Current-Protection and Hiccup
The MPM3606A has a cycle-by-cycle over-
current limiting control. When the inductor
current-peak value exceeds internal peak
current-limit threshold, the HS-FET turns off
and the LS-FET turns on, remaining on until the
inductor current falls below the internal valley
current-limit threshold. The valley current-limit
circuit is employed to decrease the
870k
Ω
.
Figure 4. 6.5V Zener Diode Connection
Internal Soft-Start (SS)
Soft-start prevents the converter output voltage
from overshooting during start-up. When the
chip starts up, the internal circuitry generates a
MPM3606A Rev. 1.0
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
operation frequency (after the peak current-limit
COMP voltage and the internal supply rail are
then pulled down. The floating driver is not
subject to this shutdown command.
threshold is triggered). Meanwhile, the output
voltage drops until VFB is below the under-
voltage (UV) threshold (50% below the
reference, typically). Once UV is triggered, the
MPM3606A enters hiccup mode to re-start the
part periodically. This protection mode is useful
when the output is dead-shorted to ground and
greatly reduces the average short-circuit current
to alleviate thermal issues and protect the
converter. The MPM3606A exits hiccup mode
once the over-current condition is removed.
Additional RC Snubber Circuit
An additional RC snubber circuit can be chosen
to clamp the voltage spike and damp the ringing
voltage for better EMI performance.
The power dissipation of the RC snubber circuit
is estimated by the formula below:
2
P
= fS ×CS × V
Loss
IN
Where fS is the switching frequency, Cs is the
snubber capacitor, and VIN is the input voltage.
Thermal Shutdown (TSD)
To prevent thermal damage, MPM3606A stops
switching when the die temperature exceeds
150°C. As soon as the temperature drops
below its lower threshold (130°C, typically), the
power supply resumes operation.
For improved efficiency, the value of CS should
not be set too high. Generally, a 5.6Ω RS and a
330pF CS are recommended to generate the
RC snubber circuit (see Figure 6).
Floating Driver and Bootstrap Charging
An internal bootstrap capacitor powers the
floating power MOSFET driver. This floating
driver has its own UVLO protection. This
UVLO’s rising threshold is 2.2V with a
hysteresis of 150mV. The bootstrap capacitor
voltage is regulated internally by VIN through
RS
5.6
SW
CS
330pF
D1, M1, C4, L1 and C2 (see Figure 5). If (VBST
VSW) exceeds 5V, U1 regulates M1 to maintain
a 5V voltage across C4.
-
Figure 6. Additional RC Snubber Circuit
Figure 5. Internal Bootstrap Charging Circuit
Start-Up and Shutdown
If both VIN and VEN exceed their respective
thresholds, the chip starts up. The reference
block starts first, generating stable reference
voltage, and then the internal regulator is
enabled. The regulator provides a stable supply
for the remaining circuitries.
Three events shut down the chip: VIN low, VEN
low and thermal shutdown. During the
shutdown procedure, the signaling path is
blocked first to avoid any fault triggering. The
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider sets the output
voltage (see Typical Application on page 1).
Choose R1 (see Table 1); R2 is then given by:
R1
R2 =
V
OUT
− 1
0.798V
Figure 7. Feedback Network
See Table 1 and Figure 7 for the feedback
network and a list of recommended feedback
network parameters for common output
voltages.
Table 1. Recommended Parameters for Common Output Voltages
Small Solution Size(CIN=10µF/0805/25V,
COUT=22µF/0805/16V)
Low VOUT Ripple(CIN=10µF/0805/25V,
COUT=2X22µF/0805/16V)
VIN VOUT
VOUT Ripple
R1 (kΩ) R2 (kΩ) Cf (pF)
(mV)(9)
VOUT Ripple
R1 (kΩ) R2 (kΩ) Cf (pF)
(mV) (9)
(V)
(V)
5
3.3
2.5
5
115
102
102
115
102
102
115
102
102
102
115
102
75
22
32.4
47.5
22
NS
NS
5.6
NS
NS
5.6
NS
NS
5.6
5.6
NS
NS
5.6
5.6
5.6
NS
NS
5.6
5.6
5.6
5.6
17.6
12.4
10
40.2
62
7.68
19.6
29.4
7.68
19.6
29.4
7.68
19.6
29.4
49.9
7.68
12.7
18.7
49.9
69.8
6.49
12.7
18.7
37.4
53.6
147
NS
NS
5.6
NS
NS
5.6
NS
NS
5.6
5.6
NS
NS
5.6
5.6
5.6
NS
NS
5.6
5.6
5.6
5.6
9.4
7
21
62
5.2
8.8
6.6
5
16.4
11.4
9.8
40.2
62
19
16
3.3
2.5
5
32.4
47.5
22
62
15.6
10.6
9.6
40.2
62
7.8
6
3.3
2.5
1.8
5
32.4
47.5
82
62
4.8
4
8.6
62
22
14.8
10.2
9.4
40.2
40.2
40.2
62
7.4
5.6
4.6
4.2
3.6
6.4
5.2
4.4
4
3.3
2.5
1.8
1.5(10)
5
32.4
34.8
82
14
12
102
158
100
75
8.4
180
19.1
24
7.2
62
13.8
9.4
34
3.3
2.5
1.8
1.5(10)
1.2(10)
40.2
40.2
47
75
34.8
82
9
102
158
158
7.8
180
316
6.6
47
3.4
3
6.2
75
MPM3606A Rev. 1.0
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
Table 1: Recommended Parameters For Common Output Voltages (continued)
Small Solution Size(CIN=10µF/0805/25V,
COUT=22µF/0805/16V)
Low VOUT Ripple(CIN=10µF/0805/25V,
COUT=2X22µF/0805/16V)
VIN VOUT
R1
(kΩ)
VOUT Ripple
(mV) (9)
VOUT Ripple
R1 (kΩ) R2 (kΩ) Cf (pF)
(mV) (9)
R2 (kΩ) Cf (pF)
(V)
(V)
5
100
75
19.1
24
NS
NS
5.6
5.6
5.6
5.6
5.6
NS
NS
5.6
5.6
5.6
5.6
5.6
NS
5.6
5.6
5.6
5.6
5.6
13.2
8.4
8.2
7.2
6
34
40.2
40.2
47
6.49
12.7
18.7
37.4
53.6
124
NS
NS
5.6
5.6
5.6
5.6
5.6
NS
NS
5.6
5.6
5.6
5.6
5.6
NS
5.6
5.6
5.6
5.6
5.6
6.2
4.8
4
3.3
2.5
1.8
1.5
1.2(10) 102
1(10)
75
34.8
59
10
75
3.6
3.2
2.8
2.6
5
102
115
205
402
19.1
24
47
5.4
4.8
9.2
7.6
7
62
102
100
75
75
75
75
75
75
75
75
75
62
62
62
82
324
5
34
6.49
12.7
18.7
37.4
53.6
93.1
221
3.3
40.2
40.2
47
3.8
3.4
3
2.5
34.8
59
8
1.8
6.4
5.4
5
1.5
84.5
147
294
24
47
2.8
2.6
2.2
3.4
3.2
2.8
2.4
2.2
2
1.2(10)
1(10)
3.3
47
4.6
6
56
40.2
40.2
47
12.7
18.7
37.4
53.6
93.1
187
2.5
34.8
59
5.8
5.2
5
1.8
5
1.5
69.8
124
243
47
1.2(10)
1(10)
4.6
4.4
47
47
Notes:
9) The output voltage ripple is tested at 0.6A output current.
10) In these specs, BST operation current will charge the output voltage higher than the setting value when completely no load due to large
divider resistor value. 10µA load current is able to pull the output voltage to normal regulation level.
Normally, it is recommended to set output
voltage from 0.8V to 5.5V. However, it can be
set higher than 5.5V. In this case, the output-
voltage ripple is larger due to a larger inductor
ripple current. An additional output capacitor is
needed to reduce the output-ripple voltage.
If output voltage is high, heat dissipation
becomes more important. Refer to PC board
layout guidelines on page 18 to achieve better
thermal performance.
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, and therefore requires
capacitor to supply the AC current while
maintaining the DC input voltage. Use low ESR
capacitors for improved performance. Use
ceramic capacitors with X5R or X7R dielectrics
for optimum results because of their low ESR
and small temperature coefficients. For most
applications, use a 10µF capacitor.
a
.
MPM3606A Rev. 1.0
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
Since C1 absorbs the input-switching current, it
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple is
approximated as:
requires an adequate ripple-current rating. The
RMS current in the input capacitor is estimated
by:
VOUT
VOUT
VOUT
VOUT
IC1 = ILOAD
×
× 1−
ΔVOUT
=
× 1−
×RESR
V
V
fS ×L1
V
IN
IN
IN
The characteristics of the output capacitor
affect the stability of the regulation system. The
MPM3606A internal compensation is optimized
for a wide range of capacitance and ESR
values.
The worst case condition occurs at VIN = 2VOUT
where:
,
ILOAD
IC1
=
2
PC Board Layout (11)
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current.
Efficient PCB layout is critical to achieve stable
operation, particularly for input capacitor
placement. For best results, refer to figure 8,
and follow the guidelines below:
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality ceramic
capacitor (e.g. 0.1μF) placed as close to the IC
as possible. When using ceramic capacitors,
make sure they have enough capacitance to
provide sufficient charge to prevent excessive
voltage ripple at input. The input-voltage ripple
caused by capacitance can be estimated as:
1. Use large ground plane to connect directly
to PGND. Add vias near the PGND if the
bottom layer is ground plane.
2. The high-current paths (PGND, IN and
OUT) should have short, direct and wide
traces. Place the ceramic input capacitor
close to IN and PGND. Keep the input
capacitor and IN connection as short and
wide as possible.
ILOAD
VOUT
VOUT
∆V
=
×
× 1−
IN
fS ×C1
V
IN
V
IN
Selecting the Output Capacitor
3. Place the external feedback resistors next
to FB.
The output capacitor (C2) maintains the DC
output voltage. Use ceramic, tantalum, or low
ESR electrolytic capacitors. For best results,
use low ESR capacitors to keep the output-
voltage ripple low. The output-voltage ripple is
estimated as:
4. Keep the feedback network away from the
switching node.
Notes:
11) The recommended layout is based on Typical Application
Circuits section on page 20.
VOUT
VOUT
1
∆VOUT
=
× 1−
× R
+
ESR
fS ×L1
V
8× fS ×C2
IN
Where L1 is the inductor value, RESR is the
equivalent series resistance (ESR) value of the
output capacitor, and L1=1μH.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency; the capacitance causes the majority
of the output-voltage ripple. For simplification,
the output-voltage ripple is estimated as:
VOUT
8× fS2 ×L1 ×C2
VOUT
ΔVOUT
=
× 1−
V
IN
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
Design Example
VIN
GND
VOUT
Table 2 shows a design example following the
application guidelines for the specifications:
Table 2. Design Example
VIN
VOUT
IOUT
12V
3.3V
0.6A
C1
The detailed application schematic is shown in
Figure 10. The typical performance and circuit
waveforms are shown in the Typical
Characteristics section (For additional device
applications, please refer to the related
evaluation board datasheets).
PGND
FB
VCC
BST
NC
AGND
SW
OUT
6.3mm
7.3mm
Top Layer
GND
VOUT
Bottom Layer
Figure 8. Recommended PC Board Layout
MPM3606A Rev. 1.0
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
TYPICAL APPLICATION CIRCUITS(12)(13)
11
BST
SW
4, 5, 6
12V
C1
5V/0.6A VOUT
16
7, 8, 9
C2
VIN
EN
IN
OUT
MPM3606A
R3
100k
17
10µF
22µF
R1
100k
EN
1
FB
2
VCC
R2
19.1k
R4
100k
18
10, 15, 19, 20
PG
PG
NC
AGND
PGND
Figure 9. Vo=5V, Io=0.6A
11
BST
SW
4, 5, 6
12V
C1
3.3V/0.6A VOUT
16
7, 8, 9
C2
VIN
EN
IN
OUT
MPM3606A
R3
100k
17
10µF
22µF
R1
75k
EN
1
FB
2
VCC
R2
24k
R4
100k
18
10, 15, 19, 20
PG
PG
NC
AGND
PGND
Figure 10. Vo=3.3V, Io=0.6A
11
BST
4, 5, 6
SW
12V
2.5V/0.6A VOUT
16
7, 8, 9
C2
VIN
IN
OUT
MPM3606A
C1
10
R3
100k
17
µF
22µF
R1
C3
75k
5.6pF
EN
EN
1
FB
2
VCC
R2
34.8k
R4
100k
18
10, 15, 19, 20
PG
NC
AGND
PGND
Figure 11. Vo=2.5V, Io=0.6A
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
TYPICAL APPLICATION CIRCUITS(continued)
11
BST
4, 5, 6
SW
12V
C1
1.8V/0.6A VOUT
16
7, 8, 9
VIN
EN
IN
OUT
MPM3606A
C2
22µF
R3
100k
17
10µF
R1
C3
102k
5.6pF
EN
1
FB
2
VCC
R2
82k
R4
100k
18
10, 15, 19, 20
PG
NC
AGND
PGND
Figure 12. Vo=1.8V, Io=0.6A
11
BST
4, 5, 6
SW
12V
C1
1.5V/0.6A VOUT
16
7, 8, 9
C2
VIN
EN
IN
OUT
MPM3606A
R3
100k
17
10µF
22µF
R1
C3
158k
5.6pF
EN
1
FB
2
VCC
R2
180k
R4
100k
18
10, 15, 19, 20
PG
NC
AGND
PGND
Figure 13. Vo=1.5V, Io=0.6A
11
BST
4, 5, 6
SW
12V
C1
1.2V/0.6A VOUT
16
7, 8, 9
C2
VIN
EN
IN
OUT
MPM3606A
R3
100k
17
10µF
22µF
R1
C3
158k
5.6pF
EN
1
FB
2
VCC
R2
316k
R4
100k
18
10, 15, 19, 20
PG
NC
AGND
PGND
Figure 14. Vo=1.2V, Io=0.6A
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
TYPICAL APPLICATION CIRCUITS (continued)
11
BST
4, 5, 6
SW
12V
C1
1V/0.6AVOUT
16
7, 8, 9
VIN
EN
IN
OUT
MPM3606A
C2
22µF
R3
100k
17
10µF
R1
C3
158k
5.6pF
EN
1
FB
2
VCC
R2
634k
R4
100k
18
10, 15, 19, 20
PG
NC
AGND
PGND
Figure 15: Vo=1V, Io=0.6A
Notes:
12) In 12VIN to 1VOUT application condition, the HS-FET’s on time is close to minimum on time, the SW may have a little jitter, even so the
output voltage ripple is smaller than 15mV in PWM mode.
13) In 12VIN to 1.5/1.2/1 VOUT application condition, BST operation current will charge the output voltage higher than the setting value when
completely no load due to large divider resistor value. 10µA load current is able to pull the output voltage to normal regulation level.
MPM3606A Rev. 1.0
1/5/2015
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MPM3606A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR
PACKAGE INFORMATION
QFN-20 (3mmx5mmx1.6mm)
PIN 1 ID
0.125X45º TYP
PIN 1 ID
MARKING
NOTE 2
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) SHADED AREA IS THE KEEP-OUT ZONE. ANY PCB
METAL TRACE AND VIA ARE NOT ALLOWED TO
CONNECT TO THIS AREA ELECTRICALLY OR
MECHANICALLY.
0.125X45º
NOTE 2
3) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MPM3606A Rev. 1.0
1/5/2015
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