MPQ2451GT-33 [MPS]
36V, 2.2MHz, 0.6A, Step-Down Converter AEC-Q100 Qualified;
| 型号： | MPQ2451GT-33 |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | 36V, 2.2MHz, 0.6A, Step-Down Converter AEC-Q100 Qualified |
| 文件： | 总18页 (文件大小：1840K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MPQ2451-5/33-AEC1
36V, 2.2MHz, 0.6A, Step-Down Converter
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The MPQ2451-5/33 is a high-frequency, step-
down, switching regulator with an integrated,
high-voltage, high-side power MOSFET. It
efficiently outputs up to 0.6A, with current-mode
control for fast loop response.
Guaranteed Industrial/Automotive Temp.
Ranges
130μA Operating Quiescent Current
Wide 3.3V-to-36V Operating Input Range
500mΩ Internal Power MOSFET
2.2MHz Fixed Switching Frequency
Internally Compensated
Stable with Ceramic Output Capacitors
Internal Soft-Start
Precision Current Limit Without Current
Sensing Resistor
>90% Efficiency
Fixed 5V & 3.3V Outputs
6-Lead SOT23 and QFN Packages
Available in AEC-Q100 Grade 1
The wide 3.3V-to-36V input range accommodates
a variety of automotive step-down applications,
and the 3μA shutdown-mode quiescent current
allows use in battery-powered applications.
The MPQ2451-5/33 achieves high power-
conversion efficiency over a wide load range by
scaling down the switching frequency under
light-load conditions to reduce switching and
gate driving losses.
Frequency fold-back prevents inductor current
runaway during start-up. Thermal shutdown
provides reliable, fault-tolerant operation.
APPLICATIONS
High-Voltage Power Conversion, Including
o Automotive Systems
o Industrial Power Systems
o Distributed Power Systems
o Battery-Powered Systems
The MPQ2451-5/33 is available in cost-effective
SOT23-6L and QFN-6L packages.
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
MPQ2451-5/33 Rev 1.0
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1
MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
ORDERING INFORMATION
Part Number
MPQ2451GT-5*
Package
Top Marking
AGE
MPQ2451GT-5-AEC1
MPQ2451GT-33**
MPQ2451GT-33-AEC1
MPQ2451GG-5
SOT23-6L
AGF
BP
MPQ2451GG-5-AEC1
MPQ2451GG-33
QFN-6L
BQ
MPQ2451GG-33-AEC1
* For Tape & Reel, add suffix –Z (e.g. MPQ2451GT-5–AEC1-Z)
** For Tape & Reel, add suffix -Z (e.g. MPQ2451GT-33-Z)
PACKAGE REFERENCE
OUT
OUT
QFN-6L
SOT23-6L
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage (VIN).................... −0.3V to +40V
Switch Voltage (VSW)........... −0.3V to (VIN+0.3V)
BST to SW....................................−0.3 to +5.0V
All Other Pins............................. –0.3V to +5.0V
Thermal Resistance (4)
SOT23-6L..............................220 ....110 ..°C/W
θJA θJC
QFN-6L...................................80 ......16 ...°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
(2)
Continuous Power Dissipation (TA = 25°C)
SOT23-6L................................................0.57W
QFN-6L....................................................1.56W
Junction Temperature..............................150°C
Lead Temperature ...................................260°C
Storage Temperature.............. −65°C to +150°C
Recommended Operating Conditions (3)
Supply Voltage VIN .......................... 3.3V to 36V
Operating Junction Temp. (TJ).−40°C to +125°C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 2V, TJ= −40°C to +125°C, unless otherwise noted. Typical values are at TJ = 25°C.
Parameter
Symbol Condition
6V < VIN < 36V
Min
Typ
Max
Units
4.8
5
5.2
V
MPQ2451-5
VOUT
6V < VIN < 36V,
TJ= 25°C
4.85
3.168
3.2
5
5.15
3.432
3.4
Output Voltage
3.3V < VIN < 36V
3.3
3.3
MPQ2451-33
V
3.3V < VIN <
36V, TJ= 25°C
VBST−VSW=5V
TJ= 25°C
Upper Switch-On Resistance
Upper Switch Leakage
RDS(ON)
500
0.5
mΩ
VEN = 0V, VSW
0V
=
2
μA
TJ= 25°C
0.75
0.65
Current Limit
ILIM
1
3
A
TJ =-40°C to
+125°C
COMP to Current Sense
Transconductance(5)
GCS
A/V
VIN UVLO, Upper Threshold
VIN UVLO, Hysteresis
Soft-Start Time
2.7
1.8
3.29
V
V
0.4
0.5
2.2
80
1
ms
MHz
ns
Oscillator Frequency
Minimum Switch-On Time(5)
fSW
τON
IS
2.6
Shutdown Supply Current
VEN < 0.3V
1
μA
No load,
no switching
Quiescent Supply Current
IQ
130
170
µA
Thermal Shutdown(5)
150
1.5
°C
V
Enable Threshold, High
VIH
Low-to-High
1.35
1.8
Enable Threshold, Hysteresis
400
mV
Notes:
5) Derived from bench characterization, not tested in production.
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
PIN FUNCTIONS
SOT23-6L QFN-6L
Name
Description
Pin #
Pin #
Bootstrap. Positive power supply for the internal, floating, high-side
1
6
BST
MOSFET driver. Connect a bypass capacitor between this pin and SW
pin.
Ground. Connect the output capacitor as close to this pin as possible.
Avoid routing near high-current switch paths.
2
3
5
4
GND
OUT
Output-Voltage Sense. Connected to the tap of an internal resistor divider
to set the output voltage.
Enable. Pull this pin below the specified threshold to shut the chip down.
Pull it above the specified threshold to enable the chip. Float this pin to
disable the chip.
4
3
EN
Input Supply. Supplies power to all internal control circuitry. Requires a
decoupling capacitor to ground to reduce switching spikes.
5
6
2
1
VIN
SW
Switch Node. Output of the high-side switch. Requires a low-VF Schottky
diode connected to ground to reduce switching spikes.
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
TYPICAL CHARACTERISTICS
MPQ2451-5/33 Rev 1.0
5/25/2016
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, C1 = 10µF, C2 = 22µF, L = 3.3µH and TA= 25°C, unless otherwise noted.
MPQ2451-5
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, C1 = 10µF, C2 = 22µF, L = 3.3µH and TA = 25°C, unless otherwise noted.
MPQ2451-5
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, C1 = 10µF, C2 = 22µF, L = 3.3µH and TA= 25°C, unless otherwise noted.
MPQ2451-33
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, C1 = 10µF, C2 = 22µF, L = 3.3µH and TA= 25°C, unless otherwise noted.
MPQ2451-33
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
FUNCTIONAL BLOCK DIAGRAM
OUT
Figure 1: Functional Block Diagram
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
OPERATION
The MPQ2451-5/33 is a 2.2MHz, asynchronous,
step-down, switching regulator with an integrated
high-side, high-voltage, power MOSFET. It
provides an internally-compensated, highly-
efficient output of up to 0.6A with current-mode
control. It also features a wide input voltage
range, internal soft-start control, and a precise
current limit. Its very-low, operational, quiescent
current makes it suitable for battery-powered
applications.
drives the COMP output high, driving the switch
peak current to rise and deliver more energy to
the output. Conversely, when VFB rises above
VREF, the switch peak current output drops.
Internal Regulator
The 2.6V internal regulator powers most of the
internal circuitry. This regulator takes the VIN
input and operates in the full VIN range. When VIN
exceeds 3.0V, the output of the regulator is in full
regulation. When VIN drops below 3.0V, the
output degrades.
PWM Control
At moderate-to-high output current, the
MPQ2451-5/33 operates in a fixed-frequency,
peak-current-control mode to regulate the output
voltage. A PWM cycle—initiated by the internal
clock—turns the power MOSFET on, and the
MOSFET remains on until its current reaches the
value set by VCOMP. When the PWM signal goes
low, the power switch turns off and remains off
for at least 100ns before the next cycle starts.
Enable Control
The MPQ2451-5/33 has a dedicated enable
control pin, EN. When VIN rises above threshold,
the EN pin can enable or disable the chip for
HIGH effective logic. Its falling threshold is 1.2V,
and its rising threshold is about 1.6V. When left
floating, the EN pin is internally pulled down to
GND to disable the chip.
When the EN voltage is pulled to 0V, the chip
enters the lowest shutdown current mode.
Between 0V and the rising threshold, the chip
remains in shutdown mode with a slightly higher
shutdown current.
If the current in the power MOSFET does not
reach the COMP-set current value within one
PWM cycle, the power MOSFET remains ON to
avoid a turn-off operation.
Pulse-Skipping Mode
Under-Voltage Lockout (UVLO)
Under light-load conditions, the MPQ2451-5/33
enters pulse-skipping mode to improve efficiency.
Pulse-skipping occurs when VCOMP drops below
the internal sleep threshold, which generates a
PAUSE command to block the turn-on clock
pulse so the power MOSFET does not turn ON;
this procedure reduces gate driving and
switching losses. This PAUSE command causes
the whole chip to enter sleep mode, reducing the
quiescent current to further improve light-load
efficiency.
VIN under-voltage lockout (UVLO) protects the
chip from operating at an insufficient supply
voltage. The UVLO rising threshold is ~2.9V
while its falling threshold is 2.6V.
Internal Soft-Start
A reference-type soft-start (SS) prevents the
converter-output voltage from overshooting
during startup. When the chip starts, the internal
circuitry generates a soft-start voltage (VSS) that
ramps up from 0V over the SS time. When VSS is
less than VREF, VSS overrides VREF as the error
amplifier reference.
When VCOMP exceeds the sleep threshold, the
PAUSE signal resets and the chip resumes
normal PWM operation. Whenever the PAUSE
changes state from LOW to HIGH, the PWM
signal immediately goes HIGH and turns on the
power MOSFET.
The maximum VSS is approximately the same as
VFB; i.e. if VFB falls, the maximum of VSS falls. This
accommodates short-circuit recovery; when the
short-circuit is removed, VSS ramps up to prevent
output-voltage overshoot.
Error Amplifier
The error amplifier is composed of an internal op-
amp with an RC feedback network connected
between its output node (COMP) and its negative
input node (FB). When VFB drops below the
internal reference voltage (VREF), the op-amp
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
Thermal Shutdown
VCOMP. When the sensed value exceeds VCOMP,
the comparator output goes LOW to turn off the
power MOSFET. The maximum current of the
internal power MOSFET is internally limited
cycle-by-cycle.
Thermal shutdown prevents thermal runaway.
When the silicon die temperature exceeds its
upper threshold, the entire chip shuts down.
When the temperature drops below its lower
threshold, the chip is enabled again.
Startup and Shutdown
Floating Driver and Bootstrap Charging
If both VIN and VEN exceed their respective
thresholds, the chip starts. The reference block
starts first to generate a stable reference voltage
and current, and then the internal regulator
operates to provide a stable supply for the rest
circuit.
An external bootstrap capacitor powers the
floating-power-MOSFET driver. This floating
driver has its own UVLO protection with a rising
threshold of about 2.4V and a falling threshold of
about 300mV. During this UVLO, VSS resets to
0V. When the UVLO is removed, the controller
enters soft-start.
While the internal supply rail is up, an internal
timer turns the power MOSFET off for about 50µs
to blank startup noise. When the internal soft-
start block is enabled, it first holds its SS output
low to ensure the rest of the circuit is ready
before ramping up.
The dedicated internal-bootstrap regulator
charges and regulates the bootstrap capacitor to
about 5V. When the voltage between the BST
and SW nodes falls below its regulation, a PMOS
pass transistor connected from VIN to BST turns
on. The charging current path goes from VIN→
Three events shut down the chip: EN low, VIN low,
thermal shutdown. During shutdown, the
signaling path is blocked first to avoid any fault
triggering. VCOMP and the internal supply rail are
then pulled low. The floating driver is not subject
to this shutdown command but its charging path
is disabled.
BST → SW. The external circuit must provide
enough voltage headroom to facilitate charging.
If VIN is sufficiently higher than VSW, the bootstrap
capacitor will charge. When the power MOSFET
is ON, VIN=VSW so the bootstrap capacitor does
not charge. Optimal charging occurs when
VIN−VSW reaches its apex when the external
freewheeling diode is on. When there is no
current in the inductor, VSW=VOUT so VIN−VOUT can
charge the bootstrap capacitor.
At a higher duty cycle, the bootstrap capacitor
may not be charged sufficiently because of a
shorter charging period. If there is insufficient
voltage and time to charge the bootstrap
capacitor, add an extra external circuit to ensure
the bootstrap voltage in normal operation region.
The floating driver’s UVLO is not communicated
to the controller.
Make sure the bleed-through current at the SW
node is at least higher than the floating driver’s
DC quiescent current of about 20µA.
Current Comparator and Current Limit
A current-sense MOSFET senses the power
MOSFET current. This value is the input to the
high-speed-current comparator for current-mode
control. When the power MOSFET turns on, the
comparator is first blanked to limit noise, and
then compares the power switch current to the
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
APPLICATION INFORMATION
Where VOUT is the output voltage, VIN is the input
voltage, fS is the switching frequency, and ΔIL is
the peak-to-peak inductor ripple current.
COMPONENT SELECTION
Inductor
The inductor supplies constant current to the
output load while being driven by the switched
input voltage. A larger-value inductor will result
in less ripple current and lower output ripple
voltage. However, the larger-value inductor is
typically physically larger, has a higher series
resistance, or has a lower saturation current.
Choose an inductor that will not saturate under
the maximum inductor peak current. The peak
inductor current can be calculated by:
VOUT
VOUT
ILP ILOAD
1
2 fS L1
V
IN
Where ILOAD is the load current.
To determine the inductance, allow the peak-to-
peak ripple current in the inductor to be
approximately 30% of the maximum load
current. Also, chose a peak inductor current
below the maximum switch current limit. The
inductance value can be calculated by:
Table 2 lists a number of suitable inductors
from various manufacturers. The choice of
which style inductor to use mainly depends on
the price vs. size requirements and any EMI
requirement.
VOUT
VOUT
L1
1
fS ΔIL
V
IN
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
Table 1: Inductor Selection Guide
Dimensions
Part Number
Inductance (µH) Max DCR (Ω) Current Rating (A)
L × W × H (mm3)
Wurth Electronics
7440430022
2.2
3.3
4.7
0.028
0.035
0.078
2.5
2.15
2.4
4.8×4.8×2.8
4.8×4.8×2.8
5.9×6.2×3.2
744043003
7447785004
TOKO
D63CB-#A916CY-2R0M
D62CB-#A916CY-3R3M
D62CB-#A916CY-4R7M
TDK
2.0
3.3
4.7
0.019
0.026
0.032
2.36
2.17
2.1
6.2×6.3×3.0
6.2×6.3×3.0
6.2×6.3×3.0
2.2
3.3
4.7
0.04
0.06
3.2
2.5
2.0
5.2×5.0×2.2
5.2×5.0×2.2
5.2×5.0×2.2
LTF5022T-2R2N3R2
LTF5022T-3R3N2R5
LTF5022T-4R7N2R0
COOPER BUSSMANN
SD25-2R2
0.081
2.2
3.3
4.7
0.031
0.038
0.047
2.8
5.2×5.2×2.5
5.2×5.2×2.5
5.2×5.2×2.5
2.21
1.83
SD25-3R3
SD25-4R7
VOUT
VOUT
VIN
1
The input capacitor (C1) can be electrolytic,
tantalum or ceramic. When using electrolytic or
tantalum capacitors, add a small, high quality
ceramic capacitor—for example, 0.1μF—as close
to the IC as possible. When using ceramic
capacitors, make sure that they have enough
capacitance to provide sufficient charge to
prevent excessive voltage ripple at input. The
input voltage ripple caused by capacitance can
be estimated by:
RESR
VOUT
1
fS L
8 fS C2
Where L is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the impedance at the
switching frequency is dominated by the
capacitance. The output voltage ripple is mainly
caused by the capacitance. For simplification, the
output voltage ripple can be estimated by:
ILOAD
VOUT
VOUT
V
1
VOUT
VOUT
IN
fS C1
VIN
V
ΔVOUT
1
IN
8 fS2 L C2
V
IN
Output Capacitor
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be approximated to:
The output capacitor (C2) maintains the DC
output voltage. Ceramic, tantalum, or low ESR
electrolytic capacitors are recommended. Low
ESR capacitors are preferred to keep the output
voltage ripple low. The output voltage ripple can
be estimated by:
VOUT
VOUT
ΔVOUT
1
RESR
fS L
VIN
The characteristics of the output capacitor also
affect the stability of the regulation system.
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
External Bootstrap Diode
PCB Layout
An external bootstrap diode from 5V to the BST
pin may enhance the efficiency of the regulator if
there is a 5V rail available to the system, VIN ≤ 6V,
or for high-duty-cycle (VOUT/VIN > 65%)
applications.
PCB layout requires high-frequency noise
considerations to limit voltage spikes on the SW
node and to limit EMI noise. Keep the path of the
input decoupling capacitor, catch diode, the VIN
pin, SW pin, and PGND as short as possible
using short and wide traces, with the passive
components as close to the device as possible.
A low-cost bootstrap diode, such as IN4148 or
BAT54, is suitable for such applications.
5V
Run the feedback trace far from the inductor and
noisy power traces: if possible, run the feedback
trace on the opposite side of the PCB from the
inductor, separated by a ground plane. Expect
greater switching losses at high switching
frequencies.
BST
MPQ2451-5/33
100nF
SW
Add a grid of thermal vias under the exposed pad
to improve thermal conductivity. Use small vias
(15mil barrel diameter) so that the hole fills
during the plating process, and to avoid solder
wicking during the reflow process associated with
larger vias. Use a pitch (distance between the
centers) of approximately 40mil between the
thermal vias. Please refer to the layout example
on EVQ2451-G-33 datasheet.
Figure 2: External Bootstrap Diode
At no load or light load, the converter may
operate in pulse-skipping mode in order to
regulate the output voltage and leave less time to
refresh the BST voltage. To ensure sufficient
gate voltage, select (VIN - VOUT) > 3V. To meet
this requirement, the EN pin can be used to
program the input UVLO voltage to VOUT+3V.
TYPICAL APPLICATION CIRCUITS (QFN-6L)
Figure 3: 5V Output Typical Application Schematic
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
Figure 4: 3.3V Output Typical Application Schematic
MPQ2451-5/33 Rev 1.0
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MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
PACKAGE INFORMATION
SOT23-6L
MPQ2451-5/33 Rev 1.0
5/25/2016
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
17
MPQ2451-5/33―36V, 2.2MHz, 0.6A, STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED
QFN6 (2mmx2mm)
1.90
2.10
0.30
0.40
0.65
0.85
PIN 1 ID
SEE DETAIL A
PIN 1 ID
MARKING
0.20
0.30
1
3
6
4
1.25
1.45
1.90
2.10
PIN 1 ID
INDEX AREA
0.65
BSC
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
0.30x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
1.90
0.70
0.70
0.25
1.40
0.65
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MPQ2451-5/33 Rev 1.0
5/25/2016
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
18
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