MPQ8612GR-16
更新时间：2024-09-18 12:28:47
品牌：MPS
描述：High Efficiency, 12A/16A/20A, 6V Synchronous Step-down Converter
概述
数据手册MPQ8612GR-16 概述
High Efficiency, 12A/16A/20A, 6V Synchronous Step-down Converter 高效率， 12A / 16A / 20A ， 6V同步降压型转换器
MPQ8612GR-16 数据手册
通过下载MPQ8612GR-16数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载MPQ8612
High Efficiency, 12A/16A/20A, 6V
Synchronous Step-down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MPQ8612 is fully integrated high frequency
synchronous rectified step-down switch mode
converter. It offers very compact solutions to
achieve 12A/16A/20A output current from a 3V to
6V input with excellent load and line regulation.
•
•
•
•
Wide 3V to 6V Operating Input Range
12A/16A/20A Output Current
Low RDS(ON) Internal Power MOSFETs
Proprietary Switching Loss Reduction
Technique
•
•
Adaptive COT for Ultrafast Transient
Response
1% Reference Voltage Over -20°C to
+85°C Junction Temperature Range
Programmable Soft Start Time
Pre-Bias Start up
Programmable Switching Frequency from
300kHz to 1MHz.
Minimum On Time TON_MIN=60ns
Minimum Off Time TOFF_MIN=75ns
Non-latch OCP, non-latch OVP Protection
and Thermal Shutdown
Constant-On-Time
(COT)
control
mode
provides fast transient response and eases loop
stabilization. The MPQ8612 can operate with a
low-cost electrolytic capacitor and can support
ceramic output capacitor with external slope
compensation.
•
•
•
Operating frequency is programmed by an
external resistor and is compensated for
variations in VIN.
•
•
•
Under voltage lockout is internally set at 2.8 V,
but can be increased by programming the
threshold with a resistor network on the enable
pin. The output voltage startup ramp is
controlled by the soft start pin. A power good
signal indicates the output is within its nominal
voltage range.
Output Adjustable from 0.608V to 4.5V
APPLICATIONS
•
•
•
•
•
•
Telecom System Base Stations
Networking Systems
Server
Personal Video Recorders
Flat Panel Television and Monitors
Distributed Power Systems
Full fault protection including OCP, SCP, OVP
UVP and OTP is provided by internal
comparators.
The MPQ8612 requires a minimum number of
readily available standard external components
and are available in QFN3X4/4X4/4X4 packages.
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VIN
BST
SW
IN
C3
L1
RFREQ
C1
VOUT
FREQ
EN
C4
R4
R1
R2
C2
ON/OFF
VCC
MPQ8612
FB
SS
VCC
R3
C5
C6
PG
PGND
AGND
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
1
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP8612
12
MPQ8612GL-12
QFN (3x4mm)
MP8612
16
MP8612
20
MPQ8612GR-16
MPQ8612GR-20
QFN (4x4mm)
QFN (4x4mm)
* For Tape & Reel, add suffix –Z (e.g. MPQ8612GL–Z);
PACKAGE REFERENCE
TOP VIEW
FREQ
12
IN
11
IN
10
1
2
3
4
5
6
AGND
FB
SS
13
14
EN
VCC
PG
7
8
9
BST
GND
GND
EXPOSED PAD
ON BACKSIDE
Part Number***
Package
MPQ8612GL-12
QFN14 (3x4mm)
***For Tape & Reel, add suffix –Z (eg. MPQ8612GL–12–Z)
TOP VIEW
TOP VIEW
FREQ
14
IN
13
IN
12
IN
11
FREQ
14
IN
IN
IN
11
13
12
1
2
3
4
AGND
FB
1
2
3
4
AGND
FB
SS
15
16
17
SS
15
16
17
EN
EN
5
6
VCC
PG
5
6
VCC
PG
7
8
9
10
7
8
9
10
BST
GND
GND
GND
BST
GND
GND
GND
EXPOSED PAD
ON BACKSIDE
EXPOSED PAD
ON BACKSIDE
Part Number****
Package
QFN17 (4x4mm)
Part Number*****
Package
QFN17 (4x4mm)
MPQ8612GR-16
MPQ8612GR-20
****For Tape & Reel, add suffix –Z (eg. MPQ8612GR-16–Z)
*****For Tape & Reel, add suffix –Z (eg. MPQ8612GR-20–Z)
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
2
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
θJA
θJC
Supply Voltage VIN ...................................... 6.5V
QFN (3x4mm).........................48...... 10... °C/W
QFN (4x4mm).........................44....... 9.... °C/W
VSW........................................-0.3V to VIN + 0.3V
VSW (30ns)...................................-3V to VIN + 3V
VIN -VSW .................................-0.3V to VIN + 0.3V
VIN -VSW (30ns)............................-3V to VIN + 3V
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-
TA)/θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
VBST ......................................................VSW + 6V
All Other Pins..................................-0.3V to +6V
(2)
Continuous Power Dissipation (TA=+25°) ……
QFN(3x4mm)…………………...……………2.6W
QFN(4x4mm)…………………...……………2.8W
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Recommended Operating Conditions (3)
Supply Voltage VIN ................................3V to 6V
Output Voltage VOUT....................0.608V to 4.5V
Operating Junction Temp. (TJ). -40°C to +125°C
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
3
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 5V, TJ = -40 to +125°C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
Max
Units
Supply Current
Supply Current (Shutdown)
IIN
VEN = 0V
0.001
1100
2
μA
μA
VEN = 2V, VFB = 1V,
MPQ8612-12
850
600
1300
Supply Current (Quiescent)
IIN
VEN = 2V, VFB = 1V,
MPQ8612-16,
1000
1300
μA
MPQ8612-20
MOSFET
10
18
MPQ8612-12, TJ =25°C
High-side Switch On Resistance
HSRDS-ON
mΩ
7.4
6.6
13
12
MPQ8612-16, TJ =25°C
MPQ8612-20, TJ =25°C
7.8
10
MPQ8612-12, TJ =25°C
Low-side Switch On Resistance
LSRDS-ON
mΩ
μA
5.5
4.6
11
MPQ8612-16, TJ =25°C
MPQ8612-20, TJ =25°C
9.5
VEN = 0V, VSW = 0V or 5V,
Switch Leakage
SWLKG
0.001
5
TJ =25°C
Current Limit
MPQ8612-12
MPQ8612-16
MPQ8612-20
17
23
29
21
28
35
26
33
41
High-side Current Limit
Timer
ILIMIT
A
RFREQ=82kΩ,VOUT=1.2V,
MPQ8612-12
170
200
ns
ns
One-Shot On Time
tON
RFREQ=82kΩ,VOUT=1.2V,
MPQ8612-16,
MPQ8612-20
MPQ8612-12
30
30
75
110
2.5
150
160
ns
ns
μs
Minimum Off Time
Fold back Timer(5)
tOFF
MPQ8612-16,
MPQ8612-20
tFOLDBACK OCP Happens
Over-voltage and Under-voltage Protection
OVP Threshold
OVP Delay(5)
UVP Threshold(5)
VOVP1
tOVP
110
120
1
130
%VREF
μs
VUVP
50
%VREF
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
4
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 5V, TJ = -40 to +125°C, unless otherwise noted.
Parameters
Symbol
Condition
Min
Typ
Max
Units
Reference And Soft Start
TJ = -20°C to +85°C,
602
604
599
601
608
610
608
610
614
616
617
619
MPQ8612-12
TJ = -20°C to +85°C,
MPQ8612-16,
MPQ8612-20
Reference Voltage
VREF
mV
TJ = -40°C to +125°C,
MPQ8612-12
TJ = -40°C to +125°C,
MPQ8612-16,
MPQ8612-20
Feedback Current
IFB
ISS
VFB = 608mV
VSS=0V
0.001
7.5
50
9
nA
Soft Start Charging Current
Enable And UVLO
Enable Rising Threshold
Enable Hysteresis
5.5
1.4
1
μA
ENVth-Hi
ENVth-Hy
1.8
2
V
890
1.5
mV
VEN = 2V
Enable Input Current
IEN
μA
VEN = 0V
0.001
VCC UVLO
VCC Under Voltage Lockout
Threshold Rising
VCCVth
2.3
2.8
2.95
V
VCC Under Voltage Lockout
Threshold Hysteresis
VCCHYS
300
mV
Power Good
Power Good Rising Threshold
Power Good Falling Threshold
Power Good Deglitch Timer
PGVth-Hi
PGVth-Lo
PGTd
84
63
90
70
96
73
%VREF
%VREF
ms
TSS=1ms,
Sink 4mA
VPG = 3.3V
1.6
2.2
Power Good Sink Current
Capability
VPG
0.4
50
V
Power Good Leakage Current
Thermal Protection
IPG_LEAK
nA
Thermal Shutdown
TSD
Note 5
150
160
25
°C
°C
Thermal Shutdown Hysteresis
Note:
5) Guaranteed by design.
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
5
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
Performance waveforms are tested on the evaluation board of the Design Example section.
VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted.
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1150
1100
1050
1000
18
16
14
12
10
8
6
4
2
0
-50 -25
0
25 50 75 100 125 150
-50 -25
0
25 50 75 100 125 150
-50
0
50
100
150
28.4
28.2
28
21.50
21.40
21.30
21.20
21.10
21.00
20.90
20.80
20.70
20.60
20.50
8
7
6
5
4
3
2
1
27.8
27.6
27.4
27.2
27
0
-50
0
50
100
150
-50 -25
0
25 50 75 100 125 150
-40
0
25
85
125
35.8
162
160
158
156
154
152
150
148
146
1470
1469
1468
1467
1466
1465
1464
1463
1462
1461
1460
35.6
35.4
35.2
35
34.8
34.6
34.4
-40
0
25
85
125
-50 -25
0
25 50 75 100 125 150
-50 -25
0
25 50 75 100 125 150
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
6
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the Design Example section.
VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted.
Reference Voltage vs.
Temperature
OVP Threshold vs.
Temperature
VCC UVLO Threshold vs.
Temperature
122.5
2.90
2.85
2.80
2.75
2.70
2.65
2.60
2.55
615
614
613
122.0
121.5
121.0
120.5
120.0
119.5
VCC Rising Threshold
VCC Falling Threshold
612
611
MPQ8612-16
MPQ8612-20
610
609
608
607
MPQ8612-12
606
-50 -25
0
25 50 75 100 125 150
-50
0
50
100
150
-50 -25
0
25 50 75 100 125 150
EN Threshold vs.
Temperature
Soft-Start/Shutdown Current
vs. Temperature
1.80
7.40
7.35
7.30
7.25
7.20
7.15
7.10
7.05
7.00
6.95
6.90
1.60
1.40
1.20
1.00
0.80
0.60
0.40
0.20
0.00
EN Rising Threshold
EN Falling Threshold
-50 -25
0
25 50 75 100 125 150
-50
0
50
100
150
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
7
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the Design Example section.
MPQ8612-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted.
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
100
95
90
85
80
75
70
65
60
V
=3.3V
V
=3.3V
IN
V
=3.3V
IN
IN
V
=4.2V
IN
V
=4.2V
V
=4.2V
IN
IN
V
=5V
IN
V
=5V
IN
V
=5V
IN
V
=6V
V
=6V
0.1
V
=6V
0.1
IN
IN
IN
0.01
1
10
100
0.01
0.1
1
10
100
0.01
1
10
100
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
100
95
90
85
80
75
70
65
60
55
50
100
100
95
90
85
80
75
V
=3.3V
IN
V
=3.3V
IN
95
90
85
80
75
70
V
=4.2V
IN
V
=4.2V
IN
V
=4.2V
IN
V
=5V
IN
V
=5V
IN
V
=5V
IN
V
=6V
IN
V
=6V
IN
V
=6V
IN
65
0.01
0.1
1
10
100
0.01
0.1
1
10
100
0.01
0.1
1
10
100
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
100
95
100
100
95
90
85
80
75
70
65
60
V
=3.3V
IN
V
=3.3V
V
=3.3V
IN
IN
95
90
85
80
75
70
65
60
90
85
V
=4.2V
IN
V
=4.2V
IN
V
=4.2V
IN
80
75
70
65
V
=5V
V
=5V
IN
IN
V
=5V
IN
V
=6V
IN
V
=6V
V
=6V
IN
IN
55
0.01
0.1
1
10
100
0.01
0.1
1
10
100
0.01
0.1
1
10
100
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
8
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the Design Example section.
MPQ8612-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted.
100
95
1.00
0.50
0.6
0.4
0.2
0
90
0.00
-0.50
-1.00
85
80
75
-0.2
-0.4
-0.6
0.01
0.1
1
10
100
3
4
5
6
0
2
4
6
8
10
12
650
630
610
590
570
550
700
600
500
400
300
200
1200
1000
800
600
400
200
0
100
0
0
2
4
6
8
10
12
200 400 600 800 1000 1200
3
3.5
4
4.5
5
5.5
6
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
9
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the Design Example section.
MPQ8612GL-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted.
Dead Time (on)
Dead Time Off
Input/Output Voltage Rippl
I
=12A
I
=12A
I
= 0A
OUT
OUT
OUT
V
OUT
AC Coupled
20mV/div.
V
IN
AC Coupled
10mV/div.
V
SW
1V/div.
V
SW
200mV/div.
V
SW
5V/div.
I
L
2.5A/div.
Input/Output Voltage Ripple
Input/Output Voltage Ripple
Power Good Through Vin
Start-Up
I
= 0.4A
I
= 12A
OUT
OUT
I
= 12A
OUT
V
V
OUT
OUT
AC Coupled
10mV/div.
AC Coupled
10mV/div.
V
OUT
1V/div.
V
IN
V
IN
AC Coupled
10mV/div.
AC Coupled
100mV/div.
V
V
V
SW
SW
IN
5V/div.
2V/div.
5V/div.
I
L
V
PG
1A/div.
1V/div.
I
L
10A/div.
Power Good Through Vin
Shutdown
Power Good Through EN
Start-Up
Power Good Through EN
Shutdown
I
= 12A
I
= 12A
I
= 12A
OUT
OUT
OUT
V
V
OUT
OUT
1V/div.
1V/div.
V
OUT
1V/div.
V
V
V
EN
EN
IN
5V/div.
5V/div.
2V/div.
V
V
V
PG
PG
PG
5V/div.
2V/div.
5V/div.
MPQ8612 Rev. 1.11
10/22/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
10
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the Design Example section.
MPQ8612GL-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted.
Start-Up Through Vin
Start-Up Through Vin
Shutdown Through Vin
I
= 0A
I
= 12A
I
= 0A
OUT
OUT
OUT
V
V
V
OUT
OUT
OUT
1V/div.
1V/div.
1V/div.
V
IN
V
V
IN
IN
5V/div.
5V/div.
5V/div.
V
V
SW
SW
5V/div.
5V/div.
V
SW
2V/div.
I
I
I
L
L
L
1A/div.
10A/div.
1A/div.
Shutdown Through Vin
Start-Up Through EN
Start-Up Through EN
I
= 12A
I
= 0A
I
= 12A
OUT
OUT
OUT
V
V
V
OUT
OUT
OUT
1V/div.
1V/div.
1V/div.
V
V
V
IN
EN
IN
5V/div.
5V/div.
5V/div.
V
SW
5V/div.
V
V
SW
SW
5V/div.
5V/div.
I
I
L
L
I
2.5A/div.
10A/div.
L
10A/div.
Shutdown Through EN
Shutdown Through EN
I
= 0A
I
= 12A
OUT
OUT
V
V
OUT
OUT
1V/div.
1V/div.
V
OUT
AC Coupled
200mV/div.
V
V
EN
EN
5V/div.
5V/div.
V
V
SW
SW
5V/div.
5V/div.
I
L
5A/div.
I
I
L
L
1A/div.
10A/div.
MPQ8612 Rev. 1.11
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11
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the Design Example section.
MPQ8612GL-12, VIN=5V, VOUT=1.2V, L=1.0µH, TA=+25°C, unless otherwise noted.
Short Circuit Protection
Thermal Shutdown
Thermal Recovery
I
= 12A
I
= 12A
OUT
OUT
V
OUT
1V/div.
V
V
OUT
1V/div.
OUT
1V/div.
V
SW
5V/div.
V
V
SW
SW
5V/div.
5V/div.
I
I
L
I
L
L
10A/div.
10A/div.
10A/div.
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12
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
MPQ8612GL-12
PIN #
Name Description
AGND Analog ground.
1
Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets
the output voltage. It is recommended to place the resistor divider as close to FB pin as
possible. Vias should be avoided on the FB traces.
2
3
4
FB
SS
EN
Soft Start. Connect on external capacitor to program the soft start time for the switch
mode regulator.
Enable pin. Pull this pin higher than 1.25V to enable the chip. For automatic start-up,
connect EN pin to VIN with 100KΩ resistor.
Can be used to set the on/off threshold (adjust UVLO) with two additional resistors.
Supply Voltage for driver and control circuits. Decouple with a minimum 4.7µF ceramic
capacitor as close to the pin as possible. X7R or X5R grade dielectric ceramic capacitors
are recommended for their stable temperature characteristics.
5
VCC
Power good output, and it is high if the output voltage is higher than 90% of the nominal
voltage. There is a delay from FB ≥ 90% to PGOOD goes high.
6
7
PG
BST
GND
Bootstrap. A capacitor connected between SW and BS pins is required to form a floating
supply across the high-side switch driver.
System Ground. This pin is the reference ground of the regulated output voltage. For this
reason care must be taken in PCB layout.
8-9
Supply Voltage. The IN pin supplies power for internal MOSFET and regulator. The
MPQ8612 operate from a +3V to +6V input rail. An input capacitor is needed to decouple
the input rail. Use wide PCB traces and multiple vias to make the connection.
10-11
IN
Frequency set during CCM operation. A resistor connected between FREQ and IN is
required to set the switching frequency. The ON time is determined by the input voltage
and the resistor connected to the FREQ pin. IN connect through a resistor is used for line
feed-forward and makes the frequency basically constant during input voltage’s variation.
An optional 1nF decoupling capacitor can be added to improve any switching frequency
jitter that may be present.
12
FREQ
Switch Output. Connect this pin to the inductor and bootstrap capacitor. This pin is driven
up to the VIN voltage by the high-side switch during the on-time of the PWM duty cycle.
The inductor current drives the SW pin negative during the off-time. The on-resistance of
the low-side switch and the internal Schottky diode fixes the negative voltage. Use wide
PCB traces to make the connection.
13-14
SW
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MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS (continued)
MPQ8612GR-16, MPQ8612GR-20
PIN #
Name Description
1
AGND Analog ground.
Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets
2
3
4
FB
SS
EN
the output voltage. It is recommended to place the resistor divider as close to FB pin as
possible. Vias should be avoided on the FB traces.
Soft Start. Connect on external capacitor to program the soft start time for the switch
mode regulator.
Enable pin. Pull this pin higher than 1.25V to enable the chip. For automatic start-up,
connect EN pin to VIN with 100KΩ resistor.
Can be used to set the on/off threshold (adjust UVLO) with two additional resistors.
Supply Voltage for driver and control circuits. Decouple with a minimum 4.7µF ceramic
capacitor as close to the pin as possible. X7R or X5R grade dielectric ceramic capacitors
are recommended for their stable temperature characteristics.
5
VCC
Power good output, and it is high if the output voltage is higher than 90% of the nominal
voltage. There is a delay from FB ≥ 90% to PGOOD goes high.
6
7
PG
BST
GND
Bootstrap. A capacitor connected between SW and BS pins is required to form a floating
supply across the high-side switch driver.
System Ground. This pin is the reference ground of the regulated output voltage. For this
reason care must be taken in PCB layout.
8-10
Supply Voltage. The IN pin supplies power for internal MOSFET and regulator. The
MPQ8612 operate from a +3V to +6V input rail. An input capacitor is needed to decouple
the input rail. Use wide PCB traces and multiple vias to make the connection.
11-13
IN
Frequency set during CCM operation. A resistor connected between FREQ and IN is
required to set the switching frequency. The ON time is determined by the input voltage
and the resistor connected to the FREQ pin. IN connect through a resistor is used for line
feed-forward and makes the frequency basically constant during input voltage’s variation.
An optional 1nF decoupling capacitor can be added to improve any switching frequency
jitter that may be present.
14
FREQ
Switch Output. Connect this pin to the inductor and bootstrap capacitor. This pin is driven
up to the VIN voltage by the high-side switch during the on-time of the PWM duty cycle.
The inductor current drives the SW pin negative during the off-time. The on-resistance of
the low-side switch and the internal Schottky diode fixes the negative voltage. Use wide
PCB traces to make the connection.
15-17
SW
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MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
BLOCK DIAGRAM
IN
FREQ
VCC
Current Sense
Amplifer
RSEN
OC
Over-Current
Timer
Refresh
Timer
BST
BSTREG
ILIM
OFF
EN
REFERENCE
Timer
HS Limit
HS
Driver
HS-FET
Comparator
PWM
xS Q
xR
0. 3V
1MEG
0.75V
0.608V
LOGIC
SW
SOFT
START/STOP
SS
VCC
ON
Timer
START
Loop
Comparator
FB
PG
LS
LS-FET
Driver
Current
Modulator
UV
GND
UV Detect
Comparator
PGOOD
Comparator
AGND
OV
OV Detect
Comparator
Figure 1—Functional Block Diagram
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MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
PWM Operation
below VREF, HS-MOSFET is turned on for a fixed
interval which is determined by one- shot on-
timer as equation 1 shown. When the HS-
MOSFET is turned off, the LS-MOSFET is turned
on until next period.
The MPQ8612 is fully integrated synchronous
rectified step-down switch mode converter.
Constant-on-time (COT) control is employed to
provide fast transient response and easy loop
stabilization. At the beginning of each cycle, the
high-side MOSFET (HS-FET) is turned ON when
the feedback voltage (VFB) is below the reference
voltage (VREF), which indicates insufficient output
voltage. The ON period is determined by the
input voltage and the frequency-set resistor as
follows:
In CCM mode operation, the switching frequency
is fairly constant and it is called PWM mode.
Light-Load Operation
With the load decreasing, the inductor current
decreases too. When the inductor current
touches zero, the operation is transited from
4.8× RFREQ (kΩ)
continuous-conduction-mode
(CCM)
to
(1)
tON(ns) =
VIN(V) − 0.49
discontinuous-conduction-mode (DCM).
The light load operation is shown in Figure 3.
When VFB is below VREF, HS-MOSFET is turned
on for a fixed interval which is determined by
one- shot on-timer as equation 1 shown. When
the HS-MOSFET is turned off, the LS-MOSFET
is turned on until the inductor current reaches
zero. In DCM operation, the VFB does not reach
VREF when the inductor current is approaching
zero. The driver of LS-FET turns into tri-state
(high Z) whenever the inductor current reaches
zero. A current modulator takes over the control
of LS-FET and limits the inductor current to less
than -1mA. Hence, the output capacitors
discharge slowly to GND through LS-FET. As a
result, the efficiency at light load condition is
greatly improved. At light load condition, the HS-
FET is not turned ON as frequently as at heavy
load condition. This is called skip mode.
After the ON period elapses, the HS-FET is
turned off, or becomes OFF state. It is turned ON
again when VFB drops below VREF. By repeating
operation this way, the converter regulates the
output voltage. The integrated low-side MOSFET
(LS-FET) is turned on when the HS-FET is in its
OFF state to minimize the conduction loss. There
will be a dead short between input and GND if
both HS-FET and LS-FET are turned on at the
same time. It’s called shoot-through. In order to
avoid shoot-through,
a
dead-time (DT) is
internally generated between HS-FET off and LS-
FET on, or LS-FET off and HS-FET on.
Heavy-Load Operation
At light load or no load condition, the output
drops very slowly and the MPQ8612 reduce the
switching frequency naturally and then high
efficiency is achieved at light load.
T
ON is constont
VIN
VSW
Current Modulator
regulates around
-1mA
VOUT
IL
Figure 2—Heavy Load Operation
IOUT
VFB
When the output current is high and the inductor
current is always above zero amps, it is called
continuous-conduction-mode (CCM). The CCM
mode operation is shown in Figure2. When VFB is
VREF
Figure 3—Light Load Operation
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MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
As the output current increases from the light
Jitter and FB Ramp Slope
load condition, the time period within which the
current modulator regulates becomes shorter.
The HS-FET is turned ON more frequently.
Hence, the switching frequency increases
correspondingly. The output current reaches the
critical level when the current modulator time is
zero. The critical level of the output current is
determined as follows:
Figure 4 and Figure 5 show jitter occurring in
both PWM mode and skip mode. When there is
noise in the VFB downward slope, the ON time of
HS-FET deviates from its intended location and
produces jitter. It is necessary to understand that
there is a relationship between a system’s
stability and the steepness of the VFB ripple’s
downward slope. The slope steepness of the VFB
ripple dominates in noise immunity. The
magnitude of the VFB ripple doesn’t affect the
noise immunity directly.
(V − VOUT )× VOUT
IN
(2)
IOUT
=
2×L× fSW × V
IN
It turns into PWM mode once the output current
exceeds the critical level. After that, the switching
frequency stays fairly constant over the output
current range.
Switching Frequency
The selection of switching frequency is a tradeoff
between efficiency and component size. Low
frequency operation increases efficiency by
reducing MOSFET switching losses, but requires
larger inductance and capacitance to maintain
low output voltage ripple.
Figure 4—Jitter in PWM Mode
For MPQ8612，the on time can be set using
FREQ pin, then the frequency is set in steady
state operation at CCM mode.
Adaptive constant-on-time (COT) control is used
in MPQ8612 and there is no dedicated oscillator
in the IC. Connect FREQ pin to IN pin through
resistor RFREQ and the input voltage is feed-
forwarded to the one-shot on-time timer through
the resistor RFREQ. When in steady state
operation at CCM, the duty ratio is kept as
VSLOPE2
VFB
VNOISE
VREF
HS Driver
Jitter
Figure 5—Jitter in Skip Mode
V
OUT/VIN. Hence the switching frequency is fairly
Ramp with Large ESR Capacitor
constant over the input voltage range. The
In the case of POSCAP or other types of
capacitor with lager ESR is applied as output
capacitor, the ESR ripple dominates the output
ripple, and the slope on the FB is quite ESR
related. Figure 6 shows an equivalent circuit in
PWM mode with the HS-FET off and without an
external ramp circuit. Turn to application
information section for design steps with large
ESR capacitors.
switching frequency can be set as follows:
106
(3)
fSW (kHz) =
4.8×RFREQ (kΩ)
V (V)
IN
×
+ tDELAY (ns)
V (V) − 0.49
VOUT (V)
IN
Where TDELAY is the comparator delay. It’s about
40ns.
Generally, the MPQ8612 is set for 300kHz to
1MHz application. It is optimized to operate at
high switching frequency with high efficiency.
High switching frequency makes it possible to
utilize small sized LC filter components to save
system PCB space.
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MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
Where:
SW
FB
L
Vo
(6)
IR4 = IC4 + IFB ≈ IC4
ESR
R1
R2
And the ramp on the VFB can then be estimated
as:
POSCAP
⎛
⎜
⎝
⎞
⎟
⎠
V − VO
R4 ×C4
R1 //R2
IN
(7)
VRAMP
=
× tON ×
R1 //R2 + R9
The downward slope of the VFB ripple then
follows:
Figure 6—Simplified Circuit in PWM Mode
without External Ramp Compensation
VRAMP
−VOUT
R4 ×C4
To realize the stability when no external ramp is
applied, usually the ESR value should be chosen
as follow:
(8)
VSLOPE1
=
=
toff
As can be seen from equation 8, if there is
instability in PWM mode, we can reduce either
R4 or C4. If C4 can not be reduced further due to
limitation from equation 5, then we can only
reduce R4. For a stable PWM operation, the
tSW
tON
2
+
0.7× π
(4)
RESR
≥
COUT
T
SW is the switching period.
V
slope1 should be design follow equation 9.
Ramp with Small ESR Capacitor
tSW
tON
2
2×L×COUT
+
−RESR ×COUT
0.7×IO ×10−3
tsw − ton
0.7× π
(9)
When the output capacitors are ceramic ones,
the ESR ripple is not high enough to stabilize the
system, and external ramp compensation is
needed. Skip to application information section
for design steps with small ESR caps.
−VSLOPE1
≥
× VOUT +
Where Io is the load current.
In skip mode, the downward slope of the VFB
ripple is almost same whether the external ramp
is used or not. Fig.8 shows the simplified circuit
of the skip mode when both the HS-FET and LS-
FET are off.
L
Vo
SW
R4 C4
R1
R2
IR4
IC4
Vo
R9
IFB
Ceramic
R1
FB
FB
Ro
Cout
R2
Figure 7—Simplified Circuit in PWM Mode
with External Ramp Compensation
Figure 8—Simplified Circuit in skip Mode
In PWM mode, an equivalent circuit with HS-FET
off and the use of an external ramp
compensation circuit (R4, C4) is simplified in
Figure 7. The external ramp is derived from the
inductor ripple current. If one chooses C4, R9,
R1 and R2 to meet the following condition:
The downward slope of the VFB ripple in skip
mode can be determined as follows:
−VREF
[(R1 + R2 )//RO ]×COUT
(10)
VSLOPE2
=
Where Ro is the equivalent load resistor.
As described in Fig.5, VSLOPE2 in the skip mode is
lower than that is in the PWM mode, so it is
reasonable that the jitter in the skip mode is
⎛
⎜
⎞
⎟
⎠
R1 ×R2
1
1
(5)
<
×
+ R9
2π× fSW × C4 20 R1 + R2
⎝
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MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
larger. If one wants a system with less jitter
during ultra light load condition, the values of the
FB resistors should not be too big, however, that
above 90% of REF voltage, the PG pin is pulled
high.
When the FB voltage drops to 70% of REF
voltage or the part is not powered on, the PG pin
will be pulled low.
V
will decrease the light load efficiency.
Soft Start/Stop
Over-Current Protection (OCP)
The MPQ8612 employs soft start/stop (SS)
mechanism to ensure smooth output during
power up and power down.
The MPQ8612 enters over-current protection
mode when the inductor current hits the current
limit, and tries to recover from over-current fault
with hiccup mode. That means in over-current
protection, the chip will disable output power
stage, discharge soft-start capacitor and then
automatically try to soft-start again. If the over-
current condition still holds after soft-start ends,
the chip repeats this operation cycle till over-
current disappears and output rises back to
regulation level. The MPQ8612 also operates in
hiccup mode when short circuit happens.
When the EN pin becomes high, an internal
current source (8μA) charges up the SS capacitor
C6. The SS capacitor voltage takes over the REF
voltage to the PWM comparator. The output
voltage smoothly ramps up with the SS voltage.
Once the SS voltage reaches the same level as
the REF voltage, it keeps ramping up while VREF
takes over the PWM comparator. At this point,
the soft start finishes and it enters into steady
state operation.
Over/Under –Voltage Protection (OVP/UVP)
When the EN pin is pulled to low, the SS CAP
voltage is discharged through an 8uA internal
current source. Once the SS voltage reaches
REF voltage, it takes over the PWM comparator.
The output voltage will decrease smoothly with
SS voltage until zero level. The SS capacitor
value can be determined as follows:
The MPQ8612 has non-latching over voltage
protection. It monitors the output voltage through
a resistor divider feedback (FB) voltage to detect
over-voltage on the output. When the FB voltage
is higher than 120% of the REF voltage (0.608V),
the LS-FET will be turned on while the HS-FET
will be off. The LS-FET keeps on until it hits the
negative current limit and turns off for 100ns. If
over voltage condition still holds, the chip repeats
this operation cycle till the FB voltage drops
below 110% of the REF voltage.
tSS (ms)×ISS (μA)
(11)
CSS (nF) =
VREF
If the output capacitors have large capacitance
value, it’s not recommended to set the SS time
too small. Otherwise, it’s easy to hit the current
limit during SS. A minimum value of 4.7nF should
be used if the output capacitance value is larger
than 330μF.
When the FB voltage is below 50% of the REF
voltage (0.608V), it is recognized as under-
voltage (UV). Usually, UVP accompanies a hit in
current limit and results in OCP.
Pre-Bias Startup
Configuring the EN Control
If the output is pre-biased to a certain voltage
during startup, the MPQ8612 will disable the
switching of both high-side and low-side switches
until the voltage on the internal soft-start
capacitor exceeds the sensed output voltage at
the FB pin.
The EN pin provides electrical on/off control of
the device. Set EN high to turn on the regulator
and low to turn it off. Do not float this pin.
For automatic start-up, the EN pin can be pulled
up to input voltage through a resistive voltage
divider. Choose the values of the pull-up resistor
(RUP from VIN pin to EN pin) and the pull-down
resistor (RDOWN from EN pin to GND) to
determine the automatic start-up voltage:
Power Good (PG)
The MPQ8612 has power-good (PG) output. It
can be connected to VCC or other voltage source
through a resistor (e.g. 100k). When the
MPQ8612 is powered on and FB voltage reaches
RUP + RDOWN
(12)
V
= 1.4×
IN−START
RDOWN
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MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
For example, for RUP =100kΩ and RDOWN =51kΩ,
the VIN−START is set at 4.15V.
falling threshold voltage. This is non-latch
protection.
The MPQ8612 is disabled when the VCC voltage
falls below its UVLO falling threshold (2.45V). If
an application requires a higher under-voltage
lockout (UVLO), use the EN pin as shown in
Figure 9 to adjust the input voltage UVLO by
using two external resistors. It is recommended
to use the enable resistors to set the UVLO
falling threshold (VSTOP) above 2.8 V. The rising
threshold (VSTART) should be set to provide
enough hysteresis to allow for any input supply
variations.
To avoid noise, a 10nF ceramic capacitor from
EN to GND is recommended.
There is an internal zener diode on the EN pin,
which clamps the EN pin voltage to prevent it
from running away. The maximum pull up current
assuming a worst case 6V internal zener clamp
should be less than 1mA. Therefore, when EN is
driven by an external logic signal, the EN voltage
should be lower than 6V; when EN is connected
with VIN through a pull-up resistor or a resistive
voltage divider, the resistance selection should
ensure the maximum pull up current less than
1mA.
IN
MPQ8612
VCC
If using a resistive voltage divider and VIN higher
than 6V, the allowed minimum pull-up resistor
RUP should meet the following equation:
RUP
EN Comparator
V (V) − 6
RUP (kΩ) RDOWN(kΩ)
6
EN
IN
(13)
−
< 1(m A )
RDOWN
As a result, when just the pull-up resistor RUP is
applied, the V is determined by input
IN−START
Figure 9—Adjustable UVLO
Thermal Shutdown
UVLO. The value of RUP can be get as:
V (V) − 6
1(m A )
IN
(14)
RUP (kΩ) >
Thermal shutdown is employed in the MPQ8612.
The junction temperature of the IC is internally
monitored. If the junction temperature exceeds
the threshold value (minimum 150ºC), the
converter shuts off. This is a non-latch protection.
There is about 25ºC hysteresis. Once the
junction temperature drops to about 125ºC, it
initiates a soft startup.
A typical pull-up resistor is 100kΩ.
UVLO protection
The MPQ8612 has under-voltage lock-out
protection (UVLO). When the VCC voltage is
higher than the UVLO rising threshold voltage,
the MPQ8612 will be powered up. It shuts off
when the VCC voltage is lower than the UVLO
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MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
in Figure 11. The VRAMP can be calculated as
shown in equation 7. R2 should be chosen
reasonably, a small R2 will lead to considerable
quiescent current loss while too large R2 makes
the FB noise sensitive. It is recommended to
choose a value within 5kꢀ-100kꢀ for R2, using a
comparatively larger R2 when VOUT is low, and a
smaller R2 when VOUT is high. And the value of
R1 then is determined as follow:
Setting the Output Voltage-Large ESR Caps
For applications that electrolytic capacitor or POS
capacitor with a controlled output of ESR is set
as output capacitors. The output voltage is set by
feedback resistors R1 and R2. As figure 10
shows.
SW
L
Vo
R2
FB
(16)
ESR
POSCAP
R1 =
R1
R2
VFB(AVG)
R2
−
VOUT − VFB(AVG) R4 + R9
The VFB(AVG) is the average value on the FB.
VFB(AVG) varies with the Vin, Vo, and load
condition, etc.. Its value on the skip mode would
be lower than that of the PWM mode, which
means the load regulation is strictly related to the
Figure 10—Simplified Circuit of POS Capacitor
First, choose a value for R2. R2 should be
chosen reasonably, a small R2 will lead to
considerable quiescent current loss while too
large R2 makes the FB noise sensitive. It is
recommended to choose a value within 5kꢀ-
100kꢀ for R2, using a comparatively larger R2
when VOUT is low, and a smaller R2 when VOUT is
high. Then R1 is determined as follow with the
output ripple considered:
V
FB(AVG). Also the line regulation is related to the
VFB(AVG) ,if one wants to gets a better load or line
regulation, a lower VRAMP is suggested once it
meets equation 9.
For PWM operation, VFB(AVG) value can be
deduced from equation 17.
R1 //R2
1
(17)
VFB(AVG) = VREF
+
× VRAMP ×
2
R1 //R2 + R9
1
VOUT
−
× ΔVOUT − VREF
Usually, R9 is set to 0ꢀ, and it can also be set
following equation 18 for a better noise immunity.
It should be set to be 5 timers smaller than
R1//R2 to minimize its influence on Vramp.
2
(15)
R1 =
×R2
VREF
ΔVOUT is the output ripple determined by equation
21.
R1 ×R2
10 R1 + R2
1
(18)
R9 ≤
×
Setting the Output Voltage-Small ESR Caps
SW
Using equation 16 and 17 to calculate the output
voltage can be complicated. To simplify the
calculation of R1 in equation 16, a DC-blocking
capacitor Cdc can be added to filter the DC
influence from R4 and R9. Figure 12 shows a
L
Vo
R4
C4
R9
R1
R2
FB
Ceramic
simplified
circuit
with
external
ramp
compensation and a DC-blocking capacitor. With
this capacitor, R1 can easily be obtained by
using equation 19 for PWM mode operation.
1
Figure 11—Simplified Circuit of Ceramic
Capacitor
VOUT − VREF
−
× VRAMP
2
(19)
R1 =
×R2
1
2
When low ESR ceramic capacitor is used in the
output, an external voltage ramp should be
added to FB through resistor R4 and capacitor
C4.The output voltage is influenced by ramp
voltage VRAMP besides resistor divider as shown
VREF
+
× VRAMP
Cdc is suggested to be at least 10 times larger
than C4 for better DC blocking performance, and
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21
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
should be not larger than 0.47uF considering
start up performance. In case one wants to use
larger Cdc for better FB noise
immunity,combined with reduced R1 and R2 to
limit the Cdc in a reasonable value without
affecting the system start up. Be noted that even
when the Cdc is applied, the load and line
regulation are still Vramp related.
The input voltage ripple can be estimated as
follows:
IOUT
VOUT
VOUT
a
(22)
ΔV
=
×
×(1−
)
IN
fSW ×CIN
V
V
IN
IN
The worst-case condition occurs at VIN = 2VOUT,
where:
IOUT
1
(23)
ΔV
=
×
IN
4
fSW ×CIN
SW
L
Vo
Output Capacitor
The output capacitor is required to maintain the
DC output voltage. Ceramic or POSCAP
capacitors are recommended. The output voltage
ripple can be estimated as:
R4
C4
FB
R1
R2
Cdc
Ceramic
VOUT
V
1
ΔVOUT
=
×(1− OUT )×(RESR
+
(24)
)
fSW ×L
V
8× fSW ×COUT
IN
Figure 12—Simplified Circuit of Ceramic
Capacitor with DC blocking capacitor
In the case of ceramic capacitors, the impedance
at the switching frequency is dominated by the
capacitance. The output voltage ripple is mainly
caused by the capacitance. For simplification,
the output voltage ripple can be estimated as:
Input Capacitor
The input current to the step-down converter is
discontinuous. Therefore, a capacitor is required
to supply the AC current to the step-down
converter while maintaining the DC input voltage.
Ceramic capacitors are recommended for best
performance. In the layout, it’s recommended to
put the input capacitors as close to the IN pin as
possible.
The capacitance varies significantly over
temperature. Capacitors with X5R and X7R
ceramic dielectrics are recommended because
they are fairly stable over temperature.
VOUT
VOUT
(25)
ΔVOUT
=
×(1−
)
8× fSW2 ×L×COUT
V
IN
The output voltage ripple caused by ESR is very
small. Therefore, an external ramp is needed to
stabilize the system. The external ramp can be
generated through resistor R4 and capacitor C4
following equation 5, 8 and 9.
In the case of POSCAP capacitors, the ESR
dominates the impedance at the switching
frequency. The ramp voltage generated from the
ESR is high enough to stabilize the system.
Therefore, an external ramp is not needed. A
minimum ESR value around 12mꢀ is required to
ensure stable operation of the converter. For
simplification, the output ripple can be
approximated as:
The capacitors must also have a ripple current
rating greater than the maximum input ripple
current of the converter. The input ripple current
can be estimated as follows:
VOUT
VOUT
(20)
ICIN = IOUT
×
×(1−
)
V
V
IN
IN
The worst-case condition occurs at VIN = 2VOUT
,
VOUT
V
where:
(26)
ΔVOUT
=
×(1− OUT )×RESR
IOUT
fSW ×L
V
IN
(21)
ICIN
=
2
Inductor
For simplification, choose the input capacitor
whose RMS current rating is greater than half of
the maximum load current.
The input capacitance value determines the input
voltage ripple of the converter. If there is input
voltage ripple requirement in the system design,
choose the input capacitor that meets the
specification
The inductor is required to supply constant
current to the output load while being driven by
the switching input voltage. A larger value
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22
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
inductor will result in less ripple current and
Where ΔIL is the peak-to-peak inductor ripple
lower output ripple voltage. However, a larger
value inductor will have a larger physical size,
higher series resistance, and/or lower saturation
current. A good rule for determining the inductor
value is to allow the peak-to-peak ripple current
in the inductor to be approximately 10~30% of
the maximum output current. Also, make sure
that the peak inductor current is below the
current limit of the device. The inductance value
can be calculated as:
current.
Choose an inductor that will not saturate under
the maximum inductor peak current. The peak
inductor current can be calculated as:
VOUT
VOUT
(28)
ILP = IOUT
+
×(1−
)
2× fSW ×L
V
IN
The inductors listed in Table 1 are highly
recommended for the high efficiency they can
provide.
VOUT
VOUT
(27)
L =
×(1−
)
fSW × ΔIL
V
IN
Table 1—Inductor Selection Guide
Inductance DCR Current
Switching
Frequency
(kHz)
Dimensions
(mΩ) Rating (A) L x W x H (mm3)
Part Number
Manufacturer
(µH)
FDU1250C-R50M
FDU1250C-R56M
FDU1250C-R75M
FDU1250C-1R0M
TOKO
TOKO
TOKO
TOKO
0.50
0.56
0.75
1.0
1.3
1.6
1.7
2.2
46.3
42.6
32.7
31.3
13.3 x 12.1 x5
13.3 x 12.1 x5
13.3 x 12.1 x5
13.3 x 12.1 x5
1000
800-1000
600-800
600
Table 3—COUT-Poscap, 800kHz, 5VIN
Typical Design Parameter Tables
VOUT
(V)
L
(μH)
R1
(kꢀ)
R2
(kꢀ)
R7
(kꢀ)
The following tables include recommended
component values for typical output voltages
(1.0V, 1.2V, 1.8V, 3.3V) and switching
frequencies (600kHz, 800kHz, and 1MHz). Refer
to Tables 2-4 for design cases without external
ramp compensation and Tables 5-7 for design
cases with external ramp compensation.
External ramp is not needed when high-ESR
capacitors, such as electrolytic or POSCAPs are
used. External ramp is needed when low-ESR
capacitors, such as ceramic capacitors are used.
For cases not listed in this datasheet, a calculator
in excel spreadsheet can also be requested
through a local sales representative to assist with
the calculation.
1.0
1.2
1.5
1.8
3.3
0.75
0.75
0.75
0.75
0.75
20
20
30
20
20
20
10
210
270
330
499
750
30
39
44.2
Table 5—COUT-Ceramic, 600kHz, 5VIN
VOUT
(V)
L
R1
R2
R4
C4
R7
(μH)
(kꢀ)
(kꢀ)
(kꢀ) (pF)
(kꢀ)
1.0
1.2
1.5
1.8
3.3
1.0
1.0
1.0
1.0
1.0
21
33
51
45
62
30
30
30
20
10
240
220
330
270
160
470
470
390
470
680
309
365
464
549
953
Table 2—COUT-Poscap, 600kHz, 5VIN
VOUT
(V)
L
(μH)
R1
(kꢀ)
R2
(kꢀ)
R7
(kꢀ)
Table 6—COUT-Ceramic, 800kHz, 5VIN
VOUT
(V)
L
R1
R2
R4
C4
R7
(μH)
(kꢀ)
(kꢀ)
(kꢀ) (pF)
(kꢀ)
1.0
1.2
1.5
1.8
3.3
1.0
1.0
1.0
1.0
1.0
19.8
29.4
29.4
39.2
44.2
30
30
20
20
10
300
365
1.0
1.2
1.5
1.8
3.3
0.75
0.75
0.75
0.75
0.75
21
34
30
30
20
20
10
200
200
220
225
200
470
470
470
470
560
226
270
324
402
750
453
34
549
47.5
57.6
1000
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23
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION
R3
0
VIN
BST
SW
IN
C3
1uF
C1A
C1B
C1C C1D C1E
R7
L1
1uH
R6
R8
22uF 22uF 22uF 0.1uF 22uF
360K
FREQ
VOUT
C7
100K 10
+
R1
C2A
C2B
1nF
MPQ8612GL-12
220uF/20mΩ 0.1uF
29.4K
EN
FB
SS
VCC
R2
30K
C5
4.7uF
R5
100K
C6
33nF
PG
AGND
PGND
Figure 13 — Typical Application Circuit with No External Ramp
MPQ8612GL- 12, VIN=5V, VOUT=1.2V, IOUT= 12A, fSW=600kHz
R3
VIN
BST
IN
0
C3
C1A
C1B
C1C C1D C1E
R7
1uF
L1
1uH
R6
R8
22uF 22uF 22uF 0.1uF 22uF
360K
FREQ
SW
VOUT
C7
C4
C2A
C2B
100K 10
R4
220K
C3C C2D
C2E
R1
33K
1nF
MPQ8612GL-12
22uF 22uF 22uF
22uF 0.1uF
470pF
EN
R9
0
FB
SS
VCC
C5
4.7uF
R2
30K
R5
100K
C6
33nF
PG
AGND
PGND
Figure 14 — Typical Application Circuit with Low ESR Ceramic Capacitor
MPQ8612GL- 12, VIN=5V, VOUT=1.2V, IOUT= 12A, fSW=600kHz
R3
VIN
BST
IN
0
C3
1uF
C1A
C1B
C1C C1D C1E
R7
L1
R6
R8
1uH
22uF 22uF 22uF 0.1uF 22uF
360K
FREQ
SW
VOUT
C7
C4
C2A
C2B
100K 10
R4
200K
C3C C2D
C2E
R1
1nF
29.1K
22uF 22uF 22uF
22uF 0.1uF
560pF
EN
Cdc
10nF
MPQ8612
FB
SS
VCC
R2
C5
4.7uF
R5
30K
100K
C6
33nF
PG
AGND
PGND
Figure 15 — Typical Application Circuit with Low ESR Ceramic Capacitor
and DC-Blocking Capacitor.
MPQ8612GL- 12, VIN=5V, VOUT=1.2V, IOUT= 12A, fSW=600kHz
MPQ8612 Rev. 1.11
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24
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
LAYOUT RECOMMENDATION
1. The high current paths (GND, IN, and SW)
should be placed very close to the device
with short, direct and wide traces.
2. Put the input capacitors as close to the IN
and GND pins as possible.
GND
3. Put the decoupling capacitor as close to the
VCC and GND pins as possible.
4. Keep the switching node SW short and away
from the feedback network.
5. The external feedback resistors should be
placed next to the FB pin. Make sure that
there is no via on the FB trace.
Inner1 Layer
6. Keep the BST voltage path (BST, C3, and
SW) as short as possible.
7. Keep the IN and GND pads connected with
large copper to achieve better thermal
performance.
8. Four-layer layout is strongly recommended to
achieve better thermal performance.
GND
VIN
BST
IN
C1
C3
L1
R6 R5
RFREQ
VOUT
SW
FREQ
EN
C4
R4
R1
R2
C2
MPQ8612
FB
SS
VCC
R3
C5
C6
PG
PGND
AGND
Inner2 Layer
Schematic For PCB Layout Guide Line
SW
C1B
SW
GND
IN
IN
SW
SW
GND
GND
BST
L1
IN
FREQ
C5
R2
C2
R1
C4
VIN
GND
VOUT
VOUT
VIN
GND
Bottom Layer
Top Layer
Figure 16—PCB Layout
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25
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN (3x4mm)
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
BOTTOM VIEW
TOP VIEW
SIDE VIEW
NOTE:
0.1x45
°
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT
INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE0.10
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
MPQ8612 Rev. 1.11
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26
MPQ8612 ― 12A/16A/20A, 6V, SYNCHRONOUS STEP-DOWN CONVERTER
QFN (4x4mm)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MPQ8612 Rev. 1.11
10/22/2013
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27
MPQ8612GR-16 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| MPQ8612GR-20 | MPS | High Efficiency, 12A/16A/20A, 6V Synchronous Step-down Converter | 获取价格 |
|
| MPQ8616-12 | MPS | High Efficiency, 6A/12A, 6V Synchronous Step-Down Converter | 获取价格 |
|
| MPQ8616-6 | MPS | High Efficiency, 6A/12A, 6V Synchronous Step-down Converter | 获取价格 |
|
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|
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| MPQ8626 | MPS | 带可调限流功能的 16V、6A 高效率同步降压变换器 | 获取价格 |
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| MPQ8632-10 | MPS | High Efficiency 18V Synchronous Step-down Converter Family for 4A to 20A | 获取价格 |
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| MPQ8632-12 | MPS | 12A, 2.5-18V, 恒定导通时间（COT）控制模式同步降压变换器，具有断续导通模式(DCM)和非锁定过压保护功能 | 获取价格 |
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