MSK801 [MSK]
FET INPUT DIFFERENTIAL OPERATIONAL AMPLIFIER; FET输入差分运算放大器
| 型号： | MSK801 |
| 厂家： | 
M.S. KENNEDY CORPORATION |
| 描述： | FET INPUT DIFFERENTIAL OPERATIONAL AMPLIFIER |
| 文件： | 总6页 (文件大小：231K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISO-9001 CERTIFIED BY DSCC
FET INPUT DIFFERENTIAL
OPERATIONAL AMPLIFIER
801
(315) 701-6751
M.S.KENNEDY CORP.
4707 Dey Road Liverpool, N.Y. 13088
MIL-PRF-38534 QUALIFIED
FEATURES:
10 MHz full power bandwidth min.
650 Volts/µs slew rate min.
75 ns settling time to 0.1% max.
100 mA output current min.
Replaces H0S-50
Fet Input
Available to DSCC SMD 5962-91574
DESCRIPTION:
The MSK 801 is a high speed, FET input, differential amplifier that exhibits very good DC characteristics. The FET input
of the MSK 801 produces low input bias current, input offset voltage and input offset drift specifications. Wide bandwidth,
high input impedance, and high output current make it an ideal choice for many high speed/high frequency applications. In
addition, the MSK 801 offers the user external compensation, offset null and short circuit protection.
EQUIVALENT SCHEMATIC
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
PIN-OUT INFORMATION
D/A Converters
Buffer Amplifiers
+VCC
12 +VC
11 Output
10 -VC
1
2
3
4
5
6
Output Comp.
Comp./Bal.
High Speed Integrators
Sample and Hold Circuits
Video Drivers
Comp./Bal.
Inverting Input
Non-Inverting Input
9 -VCC
8 Case
NC
7
Rev. C 8/05
1
8
ABSOLUTE MAXIMUM RATINGS
Storage Temperature Range
Lead Temperature Range
(10 Seconds Soldering)
Power Dissipation
-65°C to +150°C
300°C
TST
TLD
Supply Voltage
Input Voltage
VCC
+18V
VCC
VIN
Differential Input Voltage
Case Operating Temperature Range
30V
See Curve
200mA
PD
TC
Peak Output Current
IOUT
(MSK 801)
(MSK801B/E)
-40°C to +125°C
-55°C to +125°C
ELECTRICAL SPECIFICATIONS
Vccꢀ 15V Unless Otherwise Specified
Group A
MSK 801B/E
MSK 801
Parameter
Test Conditions
Subgroup
Max.
Min.
Typ.
25
Max.
Min. Typ.
Units
mA
1
2,3
1
35
30
32
5
-
25
-
-
Quiescent Current
VIN=0V
-
mA
-
27
-
Input Offset Voltage
VIN=0V
VIN=0V
10
0.5
10
50
-
mV
-
0.5
10
-
Input Offset Voltage Drift
2,3
1
-
50
500
10
-
µV/°C
pA
-
750
-
50
-
Input Bias Current
2,3
1
-
nA
-
0.2
10
-
750
pA
500
-
10
-
Input Offset Current
2,3
4
-
nA
0.1
120
11.5
12
5
-
100
10
8
-
-
100
10
10
100
650
50
-
Output Current
RL=100Ω VOUT= 10V
RL=100Ω f ≤ 10MHz
RL=100Ω VO= 10V
RL=510Ω
-
-
120
11.5
12
mA
Output Voltage Swing
Full Power Bandwidth
Bandwidth (Small Signal)
Slew Rate Limit (Pulsed)
Large Signal Voltage Gain
4
-
-
V
4
-
MHz
MHz
V/µS
dB
-
2
4
-
125
750
70
-
90
550
50
-
125
750
70
RL=100Ω VO= 10V
RL=1KΩ VO 10V
RL=100Ω VIN=10V
RL=100Ω VIN=10V
RL=100Ω VIN=10V
∆VCC= 5V
4
-
-
4
-
-
1
Settling Time to 1%
4
65
55
40
nS
40
1
2
Settling Time to 0.1%
Settling Time to 0.01%
4
85
60
75
-
60
nS
-
1
2
-
-
nS
200
70
-
-
200
70
-
2
Power Supply Rejection Ratio
Common Mode Rejection Ratio
-
-
-
55
65
-
dB
60
70
-
2
∆VIN= 10V
-
-
-
-
-
80
dB
80
2
Input Noise Voltage
f=10Hz to 1KHz
-
1.5
40
1.5
40
µVRMS
nV/√Hz
MHz
V/µS
°C/W
2
Equivalent Input Noise
f=1KHz
-
-
-
-
-
2
Gain Bandwidth Product
RL=510Ω AV=-20
RL=100Ω VO= 10V
Junction to Case @ 125°C
-
-
250
700
65
-
200
-
250
700
65
200
-
Slew Rate (Sine Wave)
2
-
-
-
2
Thermal Resistance
-
80
75
-
-
NOTES:
AV= -1, measured in false summing junction circuit.
1
Guaranteed by design but not tested. Typical parameters are representative of actual device performance
but are for reference only.
2
Industrial grade and "E" suffix devices shall be tested to subgroups 1 and 4 unless otherwise specified.
Military grade devices ("B" suffix) shall be 100% tested to subgroups 1,2,3 and 4.
Subgroups 5 and 6 testing available upon request.
3
4
5
6 Subgroup 1,4
Subgroup 2
Subgroup 3
TA=TC=+25°C
TA=TC=+125°C
TA=TC=-55°C
Consult DSCC SMD 5962-91574 for electrical specifications for devices purchased as such.
Continuous operation at or above absolute maximum ratings may adversely effect the device performance
and/or life cycle.
7
8
Rev. C 8/05
2
APPLICATION NOTES
Heat Sinking
Stability and Layout Considerations
As with all wideband devices, proper decoupling of the
power lines is extremely important. The power supplies
should be bypassed as near to pins 10 and 12 as possible
with a parallel grouping of a 0.01µf ceramic disc and a 4.7µf
tantalum capacitor. Wideband devices are also sensitive
to printed circuit board layout. Be sure to keep all runs as
short as possible, especially those associated with the sum-
ming junction, power lines and compensation pins.
To determine if a heat sink is necessary for your applica-
tion and if so, what type, refer to the thermal model and
governing equation below.
Thermal Model:
Recommended External Component Selection
Guide Using External Rf
APPROXIMATE
DESIRED GAIN
RI(+)
500Ω
RI(-)
1KΩ
Rf
R1
43Ω
C1
1
1
1
-1
+1
-5
1KΩ
0Ω
0.01µf
1KΩ
820Ω
0Ω
0Ω
1KΩ
910Ω
1KΩ
1KΩ
43Ω 0.01µf
Governing Equation:
4.99KΩ 120Ω 0.01µf
3.6KΩ 120Ω 0.01µf
TJ=PD x (RθJC + RθCS + RθJC) + TA
Where
+5
910Ω
0Ω
10KΩ
150Ω 0.01µf
150Ω 0.01µf
-10
TJ=Junction Temperature
9.1KΩ
+10
PD=Total Power Dissipation
RθJC=Junction to Case Thermal Resistance
RθCS=Case to Heat Sink Thermal Resistance
RθSA=Heat Sink to Ambient Thermal Resistance
TC=Case Temperature
TA=Ambient Temperature
TS=Sink Temperature
Example:
This example demonstrates a worst case analysis for
the op-amp output stage. This occurs when the output volt-
age is 1/2 the power supply voltage. Under this condition,
maximum power transfer occurs and the output is under
maximum stress.
Conditions:
1 The positive input resistor is selected to minimize offset
currents. The positve input can be grounded without a
resistor if desired.
VCC= 16VDC
VO= 8Vp Sine Wave, Freq.ꢀ1KHz
RL=100Ω
2 This feedback capacitor will help compensate for stray
input capacitance. The value of this capacitor can be
dependent on individual applications. A 2 to 9 pf capacitor
is usually optimum for most applications.
For a worst case analysis we will treat the +8Vp sine
wave as an 8VDC output voltage.
1.) Find Driver Power Dissapation
PD=(VCC-VO) (VO/RL)
Load Considerations
=(16V-8V) (8V/100Ω)
=0.64W
When determining the load an amplifier will see, the
capacative portion must be taken into consideration. For
an amplifier that slews at 1000V/µS, each pf will require 1
mA of output current. To minimize ringing with highly
capacitive loads, reduce the load time constant by adding
shunt resistance.
2.) For conservative design, set TJ=+125°C
3.) For this example, worst case TA=+50°C
4.) RθJC=65°C/W from MSK 801 Data Sheet
5.) RθCS=0.15°C/W for most thermal greases
6.) Rearrange governing equation to solve for RθSA
Case Connection
RθSA=((TJ-TA)/PD) - (RθJC) - (RθCS)
=((125°C -50°C)/0.64W) - 65°C/W - 0.15°C/W
=117.2 - 65.15
The MSK 801 has pin 8 internally connected to the
case. The case is not electrically connected to the internal
circuit. Pin 8 should be tied to a ground plane for shielding.
For special applications, consult factory.
=52.0°C/W
3
Rev. C 8/05
APPLICATION NOTES CON'T
Slew Rate vs. Slew Rate Limit
SLEW RATE:
Offset Null
Typically the MSK 801 has an input offset voltage of
less than 1 mV. If it is desirable to "null" the offset volt-
age, the circuit below is recommended.
Sꢀ2πfVp; Slew rate is based upon the sinusoidal
linear response of the amplifier and is calculated from
the full power bandwidth frequency.
RP=10KΩ
SLEW RATE LIMIT
dv/dt; The slew rate limit is based upon the amplifier's
response to a step input and is measured between 10%
and 90%. MSK measures Tr or Tf, whichever is greater
at 10VOUT, RL=100Ω.
Definition of Settling Time
The time required for the output to come within a prede-
termined error band after application of a full scale step
input. This includes the time of delay, slew time and the
small signal settling of the amplifier.
Measuring Settling Time
The only accurate method of measuring settling time is by
the creation of a false summing junction and observing the
error band at that point.
The reasons for not using other methods are as follows:
Observation of settling at the actual summing junction adds
probe capacitance to the input and changes the entire re-
sponse of the system. (Probe capacitance almost doubles
the capacitance at the summing point.) Observing the out-
put is extremely difficult, as the 3% linearity of oscillo-
scopes, and reading inaccuracies, lead to a possible 5%
error. The false summing junction approach works well
bcause the amplifier is subtracting the output from the in-
put, and only 1/2 the actual error appears there.
Output Short Circuit Protection
The collectors of the output devices have been brought
out to pins 10 and 12 for short circuit protection, if desired.
A resistor can be inserted between +VC and +VCC pins,
and -VC and -VCC respectively. Resistor values can be se-
lected as follows:
RSC (+)VCC ꢀ (-)VCC
(+)ISC
(-)ISC
False Summing Junction Circuit
The addition of the these resistors reduces output volt-
age swing. Decoupling at VC can help to retain full swing
for transient pulses.
Problems: Because the amplifier is to be overdriven, 1/2
the input voltage can be expected to appear at the false
summing junction. Therefore, it is necessary to clamp that
point with diodes to limit the voltage excursion to avoid
overdriving the oscilloscope with the consequent recovery
time of the scope itself. The scope probe has capacitance
which significantly affects the settling time measurement.
Keep the associated resistors as low as possible to mini-
mize the RC time constants, and take into account the added
time created by the false summing junction. On the ranges
used for settling time measurement even the best real-time
scopes suffer from reduced bandwidth and relatively slow
settling; a sampling scope is convenient for these measure-
ments.
For normal operation and best overall response, short
+VCC and+VC and short -VCC and -VC together.
4
Rev. C 8/05
TYPICAL PERFORMANCE CURVES
5
Rev. C 8/05
MECHANICAL SPECIFICATIONS
NOTE:Standard cover height is 0.200 Max.
Alternate lid heights available
NOTE: ALL DIMENSIONS ARE 0.010 INCHES UNLESS OTHERWISE LABELED.
ORDERING INFORMATION
Part
Number
Screening
Level
MSK801
MSK801E
MSK801B
5962-91574
Industrial
Extended Reliability
MIL-PRF-38534 Class H
DSCC-SMD
M.S. Kennedy Corp.
4707 Dey Road, Liverpool, New York 13088
Phone (315) 701-6751
FAX (315) 701-6752
www.mskennedy.com
The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make
changes to its products or specifications without notice, however, and assumes no liability for the use of its products.
Please visit our website for the most recent revision of this datasheet.
Rev. C 8/05
6
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