27L512-12 [Macronix]
512K-BIT [64K x 8] CMOS EPROM; 512K - BIT [ 64K ×8 ] CMOS EPROM
| 型号： | 27L512-12 |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 512K-BIT [64K x 8] CMOS EPROM |
| 文件： | 总14页 (文件大小：760K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX27L512
512K-BIT [64K x 8] CMOS EPROM
FEATURES
• Operating current: 10mA@ 3.6V, 5MHz
• Standby current: 10uA
• Package type:
• 64K x 8 organization
• Wide voltage range, 2.7V to 3.6V
• +12.5V programming voltage
• Fast access time: 120/150/200/250ns
• Totally static operation
- 28 pin plastic DIP
- 32 pin PLCC
- 28 pin 8 x 13.4 mm TSOP(I)
• Completely TTL compatible
GENERAL DESCRIPTION
programmers may be used. The MX27L512 supports
intelligent fast programming algorithm which can result
in programming time of less than fifteen seconds.
The MX27L512 is a 3V only, 512K-bit, One-Time
Programmable Read Only Memory. It is organized as
64K words by 8 bits per word, operates from a single
+3volt supply, has a static standby mode, and features
fast single address location programming. All program-
mingsignalsareTTLlevels,requiringasinglepulse.For
programmingoutsidefromthesystem,existingEPROM
This EPROM is packaged in industry standard 28 pin
dual-in-line packages , 32 lead PLCC, and 28 lead
TSOP(I) packages.
BLOCK DIAGRAM
PIN CONFIGURATIONS
PDIP
PLCC
CONTROL
LOGIC
OUTPUT
CE
Q0~Q7
VCC
A14
A13
A8
A15
A12
A7
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
BUFFERS
OE/VPP
2
4
5
1
32
30
29
A8
A6
A5
A4
A3
A2
A1
A0
NC
Q0
3
A9
A6
4
A9
A5
5
A11
NC
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Y-DECODER
X-DECODER
Y-SELECT
A11
OE/VPP
A10
CE
A4
6
A3
7
OE/VPP
A10
CE
A2
9
25
8
MX27L512
A0~A15
A1
9
512K BIT
CELL
ADDRESS
INPUTS
Q7
A0
10
11
12
13
14
Q6
Q0
Q1
Q2
GND
MAXTRIX
Q5
Q7
Q4
13
14
Q6
21
Q3
17
20
VCC
GND
PIN DESCRIPTION
8 x 13.4mm 28TSOP(I)
SYMBOL
A0~A15
Q0~Q7
CE
PIN NAME
Address Input
OE/VPP
A11
A9
22
23
24
25
26
27
28
1
21
20
19
18
17
16
15
14
13
12
11
10
9
A10
CE
Q7
Q6
Q5
Q4
Q3
GND
Q2
Q1
Q0
A0
A8
Data Input/Output
Chip Enable Input
A13
A14
VCC
A15
A12
A7
MX27L512
OE/VPP
NC
Output Enable Input/Program Supply Voltage
No Internal Connection
Power Supply Pin
2
3
A6
4
VCC
A5
5
A4
6
A1
GND
Ground Pin
A3
7
8
A2
REV. 2.6, AUG. 26, 2003
P/N: PM0256
1
MX27L512
AUTO IDENTIFY MODE
FUNCTIONAL DESCRIPTION
Theautoidentifymodeallowsthereadingoutofabinary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of
automatically matching the device to be programmed
with its corresponding programming algorithm. This
mode is functional in the 25°C ± 5°C ambient
temperature range that is required when programming
the MX27L512.
THE PROGRAMMING OF THE MX27L512
When the MX27L512 is delivered, or it is erased, the
chip has all 512K bits in the "ONE", or HIGH state.
"ZEROs" are loaded into the MX27L512 through the
procedure of programming.
Forprogramming, thedatatobeprogrammedisapplied
with 8 bits in parallel to the data pins.
To activate this mode, the programming equipment
must force 12.0 ±0.5(VH) on address line A9 of the
device. Two identifier bytes may then be sequenced
fromthedeviceoutputsbytogglingaddresslineA0from
VIL to VIH. All other address lines must be held at VIL
during auto identify mode.
Vcc must be applied simultaneously or before Vpp, and
removed simultaneously or after Vpp. When
programming an MXIC EPROM, a 0.1uF capacitor is
required across Vpp and ground to suppress spurious
voltage transients which may damage the device.
Byte 0 ( A0 = VIL) represents the manufacturer code,
andbyte1(A0=VIH),thedeviceidentifiercode. Forthe
MX27L512, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
devicecodeswillpossessoddparity, withtheMSB(Q7)
defined as the parity bit.
FAST PROGRAMMING
Thedeviceissetupinthefastprogrammingmodewhen
the programming voltage OE/VPP = 12.75V is applied,
withVCC=6.25V, (AlgorithmisshowninFigure1). The
programming is achieved by applying a single TTL low
level 100us pulse to the CE input after addresses and
data line are stable. If the data is not verified, an
additional pulse is applied for a maximum of 25 pulses.
Thisprocessisrepeatedwhilesequencingthrougheach
address of the device. When the programming mode is
completed,thedatainalladdressisverifiedatVCC= 5V
±10%.
READ MODE
The MX27L512 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable
(OE) is the output control and should be used to gate
datatotheoutputpins, independentofdeviceselection.
Assuming that addresses are stable, address access
time(tACC)isequaltothedelayfromCEtooutput(tCE).
DataisavailableattheoutputstOEafterthefallingedge
ofOE, assumingthatCEhasbeenLOWandaddresses
have been stable for at least tACC - tOE.
PROGRAM INHIBIT MODE
Programming of multiple MX27L512s in parallel with
different data is also easily accomplished by using the
Program Inhibit Mode. Except for CE and OE, all like
inputsoftheparallelMX27L512maybecommon. ATTL
low-level program pulse applied to an MX27L512 CE
input with OE/VPP = 12.5 ± 0.5V will program that
MX27L512. A high-level CE input inhibits the other
MX27L512s from being programmed.
STANDBY MODE
The MX27L512 has a CMOS standby mode which
reducesthemaximumVCCcurrentto10uA. Itisplaced
in CMOS standby when CE is at VCC ±0.3 V. The
MX27L512 also has a TTL-standby mode which
reduces the maximum VCC current to 0.25 mA. It is
placed in TTL-standby when CE is at VIH. When in
standby mode, the outputs are in a high-impedance
state, independent of the OE input.
PROGRAM VERIFY MODE
Verification should be performed on the programmed
bits to determine that they were correctly programmed.
The verification should be performed with OE/VPP and
CE, at VIL. Data should be verified tDV after the falling
edge of CE.
P/N:PM0256
REV. 2.6, AUG. 26, 2003
2
MX27L512
TWO-LINE OUTPUT CONTROL FUNCTION
SYSTEM CONSIDERATIONS
To accommodate multiple memory connections, a two-
line control function is provided to allow for:
During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude
of these transient current peaks is dependent on the
outputcapacitanceloadingofthedevice. Ataminimum,
a0.1uFceramiccapacitor(highfrequency,lowinherent
inductance) should be used on each device between
VCCandGNDtominimizetransienteffects. Inaddition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 uF bulk electrolytic capacitor should be
used between VCC and GND for each eight devices.
The location of the capacitor should be close to where
the power supply is connected to the array.
1. Low memory power dissipation,
2. Assurance that output bus contention will not
occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connectedtotheREADlinefromthesystemcontrolbus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
MODE SELECT TABLE
PINS
MODE
CE
OE/VPP
VIL
A0
X
A9
X
OUTPUTS
DOUT
High Z
High Z
High Z
DIN
Read
VIL
Output Disable
Standby (TTL)
Standby (CMOS)
Program
VIL
VIH
X
X
X
VIH
X
X
VCC±0.3V
VIL
X
X
X
VPP
VIL
X
X
Program Verify
Program Inhibit
Manufacturer Code(3)
Device Code(3)
VIL
X
X
DOUT
High Z
C2H
VIH
VPP
VIL
X
X
VIL
VIL
VIH
VH
VH
VIL
VIL
91H
NOTES: 1. VH = 12.0 V ±0.5 V
3. A1 - A8 = A10 - A15 = VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
2. X = Either VIH or VIL
P/N:PM0256
REV. 2.6, AUG. 26, 2003
3
MX27L512
Figure1. FAST PROGRAMMING FLOW CHART
START
ADDRESS = FIRST LOCATION
VCC = 6.25V
OE/VPP = 12.75V
PROGRAM ONE 100us PULSE
LAST
NO
INCREMENT ADDRESS
ADDRESS ?
YES
ADDRESS = FIRST LOCATION
X = 0
INCREMENT ADDRESS
NO
LAST
PASS
FAIL
INCREMENT X
VERIFY BYTE
ADDRESS ?
YES
NO
X = 25 ?
YES
PROGRAM ONE 100us PULSE
VCC = 5.25V
OE/VPP = VIL
COMPARE
ALL BYTES
TO ORIGINAL
DATA
FAIL
DEVICE FAILED
PASS
DEVICE PASSED
P/N:PM0256
REV. 2.6, AUG. 26, 2003
4
MX27L512
SWITCHING TEST CIRCUITS
DEVICE
UNDER
TEST
1.8K ohm
+5V
DIODES = IN3064
OR EQUIVALENT
CL
6.2K ohm
CL = 100 pF including jig capacitance
SWITCHING TEST WAVEFORMS
2.0V
0.8V
2.0V
TEST POINTS
AC driving levels
0.8V
OUTPUT
INPUT
AC TESTING: AC driving levels are 2.4V/0.4V for both commercial grade and industrial grade.
Input pulse rise and fall times are < 10ns.
P/N:PM0256
REV. 2.6, AUG. 26, 2003
5
MX27L512
ABSOLUTE MAXIMUM RATINGS
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended period may affect reliability.
RATING
VALUE
Ambient Operating Temperature
Storage Temperature
Applied Input Voltage
Applied Output Voltage
VCC to Ground Potential
A9 & Vpp
-40oC to 85oC
-65oC to 125oC
-0.5V to 7.0V
-0.5V to VCC + 0.5V
-0.5V to 7.0V
NOTICE:
Specifications contained within the following tables are subject to
change.
-0.5V to 13.5V
DC/AC Operating Conditions for Read Operation
MX27L512
-12
-15
-20
-25
Operating
Commercial
Industrial
0°C to 70°C
-40°C to 85°C
2.7V to 3.6V
0°C to 70°C
-40°C to 85°C
2.7V to 3.6V
0°C to 70°C
-40°C to 85°C
2.7V to 3.6V
0°C to 70°C
-40°C to 85°C
2.7V to 3.6V
Temperature
Vcc Power Supply
DC CHARACTERISTICS
SYMBOL
VOH
VOL
VIH
PARAMETER
MIN.
MAX.
UNIT
V
CONDITIONS
Output High Voltage
Output Low Voltage
Input High Voltage
Vcc-0.3
IOH = -100uA, VCC = 3.0V
IOL = 2.1mA, VCC = 3.0V
0.3
V
2.0
-0.3
-10
-10
VCC + 0.5
V
VIL
Input Low Voltage
0.6
10
V
ILI
Input Leakage Current
Output Leakage Current
VCC Power-Down Current
VCC Standby Current
VCC Active Current
VPP Supply Current Read
uA
uA
uA
mA
mA
uA
VIN = 0 to 3.6V
ILO
10
VOUT = 0 to 3.6V
ICC3
ICC2
ICC1
IPP
10
CE = VCC ±0.3V
0.25
10
CE = VIH
CE = VIL, f=5MHz, Iout = 0mA, Vcc=3.6V
CE = VIL, VPP = VCC
10
CAPACITANCE TA = 25oC, f = 1.0 MHz (Sampled only)
SYMBOL
CIN
PARAMETER
MIN.
8
MAX.
12
UNIT
pF
CONDITIONS
VIN = 0V
Input Capacitance
Output Capacitance
VPP Capacitance
COUT
Vpp
8
12
pF
VOUT = 0V
VPP = 0V
18
25
pF
P/N:PM0256
REV. 2.6, AUG. 26, 2003
6
MX27L512
AC CHARACTERISTICS
27L512-12
27L512-15
27L512-20
27L512-25
SYMBOL PARAMETER
MIN. MAX. MIN. MAX. MIN. MAX.
MIN. MAX. UNIT CONDITIONS
tACC
tCE
Address to Output Delay
Chip Enable to Output Delay
Output Enable to Output
Delay
120
120
60
150
150
65
200
200
100
250
250
120
ns
ns
ns
CE = OE = VIL
OE = VIL
tOE
CE = VIL
tDF
tOH
OE High to Output Float,
or CE High to Output Float
Output Hold from Address,
CE or OE which ever occurred
first
0
0
40
0
0
50
0
0
60
0
0
70
ns
ns
DC PROGRAMMING CHARACTERISTICS TA = 25oC ±5oC
SYMBOL
VOH
VOL
VIH
PARAMETER
MIN.
MAX.
UNIT
V
CONDITIONS
Output High Voltage
2.4
IOH = -0.40mA
IOL = 2.1mA
Output Low Voltage
0.4
V
Input High Voltage
2.0
VCC + 0.5
0.8
V
VIL
Input Low Voltage
-0.2
-10
V
ILI
Input Leakage Current
A9 Auto Select Voltage
VCC Supply Current(Program & Verify)
VPP Supply Current(Program)
Fast Programming Supply Voltage
Fast Programming Voltage
10
uA
V
VIN = 0 to 5.5V
CE = VIL
VH
11.5
12.5
40
ICC3
IPP2
VCC1
VPP1
mA
mA
V
30
6.00
12.5
6.50
13.0
V
AC PROGRAMMING CHARACTERISTICS TA = 25oC ±5°C
SYMBOL
tAS
PARAMETER
MIN.
2
MAX.
UNIT
us
us
us
us
ns
us
us
us
ns
ns
ns
CONDITIONS
Address Setup Time
Data Setup Time
tDS
2
tAH
Address Hold Time
Data Hold Time
0
tDH
2
tDFP
tVPS
tPW
Chip Enable to Output Float Delay
VPP Setup Time
0
130
105
150
2
CE Program Pulse Width
Vcc Setup Time
95
2
tVCS
tDV
Data Valid from CE
OE/VPP Hold Time
OE/VPP Recovery Time
tOEH
tVR
2
2
P/N:PM0256
REV. 2.6, AUG. 26, 2003
7
MX27L512
WAVEFORMS
READ CYCLE
ADDRESS
INPUTS
DATA ADDRESS
tACC
CE
tCE
OE
tDF
DATA
OUT
VALID DATA
tOE
tOH
FAST PROGRAMMING ALGORITHM WAVEFORM
PROGRAM
PROGRAM VERIFY
VIH
VIL
Addresses
tAS
Hi-z
DATA OUT VALID
DATA
tDV
tDS
tDH
tDFP
VPP1
VIL
OE/VPP
tVPS
tVPS
tAH
tVR
tPW
VIH
VIL
CE
tVCS
VCC1
VCC
VCC
P/N:PM0256
REV. 2.6, AUG. 26, 2003
8
MX27L512
ORDERING INFORMATION
PLASTIC PACKAGE
PART NO.
ACCESS TIME(ns) OPERATING
STANDBY
OPERATING
PACKAGE
CURRENT MAX.(mA)
CURRENT MAX.(uA) TEMPERATURE
MX27L512PC-12
MX27L512QC-12
MX27L512TC-12
MX27L512PC-15
MX27L512QC-15
MX27L512TC-15
MX27L512PC-20
MX27L512QC-20
MX27L512TC-20
MX27L512PC-25
MX27L512QC-25
MX27L512TC-25
MX27L512PI-12
MX27L512QI-12
MX27L512TI-12
MX27L512PI-15
MX27L512QI-15
MX27L512TI-15
MX27L512PI-20
MX27L512QI-20
MX27L512TI-20
MX27L512PI-25
MX27L512QI-25
MX27L512TI-25
120
120
120
150
150
150
200
200
200
250
250
250
120
120
120
150
150
150
200
200
200
250
250
250
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
28 Pin DIP
32 Pin PLCC
28 Pin TSOP(I)
28 Pin DIP
32 Pin PLCC
28 Pin TSOP(I)
28 Pin DIP
32 Pin PLCC
28 Pin TSOP(I)
28 Pin DIP
32 Pin PLCC
28 Pin TSOP(I)
28 Pin DIP
32 Pin PLCC
28 Pin TSOP(I)
28 Pin DIP
32 Pin PLCC
28 Pin TSOP(I)
28 Pin DIP
32 Pin PLCC
28 Pin TSOP(I)
28 Pin DIP
32 Pin PLCC
28 Pin TSOP(I)
P/N:PM0256
REV. 2.6, AUG. 26, 2003
9
MX27L512
PACKAGE INFORMATION
P/N:PM0256
REV. 2.6, AUG. 26, 2003
10
MX27L512
P/N:PM0256
REV. 2.6, AUG. 26, 2003
11
MX27L512
P/N:PM0256
REV. 2.6, AUG. 26, 2003
12
MX27L512
REVISION HISTORY
Revision No. Description
Page
Date
2.0
1)Programming Flow Chart corrected, programming verify after
6/05/1997
whole array programmed with 1 pulse.
2) Eliminate Interactive Programming Mode.
3) Add 28-TSOP(I) and 28-SOP packages offering.
4) AC driving levels are changed from 2.4V/0.3V to 2.4V/0.4V.
General description, ".... is a 5V only..." ==> "....is a 3V only...."
Cancel ceramic DIP package type
2.1
2.2
2.3
9/25/1998
P1,2,9,11 MAR/02/2000
Remove 28-pin SOP Package
P1,9
SEP/19/2001
Package Information format changed
Remove "ultraviolet erasable" wording
P10~12
P1
2.4
2.5
2.6
APR/24/2002
NOV/19/2002
AUG/26/2003
To modify Package Information
To modify 32-PLCC package information
P10~12
P11
A1: from 0.50mm(0.020 inch)/nom. to 0.58mm(0.023 inch)/nom.
from 0.66mm(0.026 inch)/nom. to 0.81mm(0.032 inch)/nom.
P/N:PM0256
REV. 2.6, AUG. 26, 2003
13
MX27L512
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