MX23C8000MC-10 [Macronix]
8M-BIT [1M x 8] CMOS MASK ROM; 8M - BIT [ 1M ×8 ] CMOS掩膜ROM
| 型号： | MX23C8000MC-10 |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 8M-BIT [1M x 8] CMOS MASK ROM |
| 文件： | 总10页 (文件大小：908K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX23C8000
8M-BIT [1M x 8] CMOS MASK ROM
FEATURES
• 1M x 8 organization
• Operating current : 40mA
• Standby current : 100uA
• Package
• Single +5V power supply
• Fast access time : 100/120/150/200ns
• Totally static operation
- 32 pin plastic DIP
• Completely TTL compatible
- 32 pin plastic SOP
- 32 pin plastic PLCC
- 32 pin plastic TSOP
GENERAL DESCRIPTION
The MX23C8000 is a 5V only, 8M-bit, Read Only
Memory. It is organized as 1M words by 8 bits, oper-
ates from a single +5V supply, has a static standby mode,
and has an access time of 100/120/150/200ns. It is
designed to be compatible with all microprocessors and
similar applications in which high performance, large bit
storage and simple interfacing are important design con-
siderations.
MX23C8000 offers automatic power-down, with power-
down controlled by the chip enable (CE) input. When
CE goes high, the device automatically powers down
and remains in a low-power standby modes as long as
CE remains high.
MX23C8000 pin 24 may also be programmed either ac-
tive HIGH or LOW in order to eliminate bus contention
in multiple-bus microprocessor systems.
PIN CONFIGURATION
32 PDIP
VCC
A18
A17
A14
A13
A8
32 SOP
A19
A16
A15
A12
A7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
VCC
A18
A17
A14
A13
A8
1
32
31
30
29
28
27
26
25
24
23
22
21
10
19
18
17
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2
3
4
5
A6
6
A9
A9
A5
7
A11
OE/OE
A10
CE/CE
Q7
Q6
Q5
Q4
Q3
A11
OE/OE
A10
CE/CE
Q7
A4
8
A3
9
A2
10
11
12
13
14
15
16
A1
A0
Q6
Q0
Q1
Q2
VSS
Q5
Q4
Q3
32 PLCC
32TSOP
A11
A9
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE/OE
A10
CE/CE
Q7
4
1
32
30
29
2
A14
A13
A8
5
A7
A6
A5
A4
A3
A2
A1
A0
DQ
A8
3
A13
A14
A17
A18
VCC
A19
A16
A15
A12
A7
4
5
Q6
6
Q5
A9
7
Q4
A11
9
25
8
Q3
MX23C8000
MX23C8000
9
VSS
Q2
OE/OE
10
11
12
13
14
15
16
A10
Q1
CE/CE
Q7
Q0
A0
13
21
14
17
20
A6
A1
A5
A2
A4
A3
P/N:PM0137
REV. 3.8, JUL. 16, 2001
1
MX23C8000
PIN DESCRIPTION
BLOCK DIAGRAM
Symbol
A0~A19
Q0~Q7
CE/CE
OE/OE
VCC
Pin Function
Address Inputs
CE/CE
OE/OE
CONTROL
LOGIC
OUTPUT
Q0~Q7
BUFFERS
Data Outputs
Chip Enable Input
Output Enable Input
Power Supply Pin (+5V)
Ground Pin
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Y-DECODER
X-DECODER
Y-SELECT
A0~A19
VSS
8M BIT
ADDRESS
INPUTS
ROM ARRAY
VCC
VSS
ABSOLUTE MAXIMUM RATINGS*
*Note:
RATING
VALUE
Stress greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Ex-
posure to absolute maximum rating conditions for extended
period may affect reliability.
Ambient OperatingTemperature 0°C to 70°C
Storage Temperature
Applied Input Voltage
Applied Output Voltage
VCC to Ground Potential
Power Dissipation
-65°C to 125°C
-0.5V toVCC+0.5
-0.5V toVCC+0.5
-0.5V to 7.0V
1.0W
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 5.0V ± 10%)
Item
Symbol
VOH
VOL
VIH
MIN.
MAX.
-
Conditions
IOH = -1.0mA
IOL = 2.1mA
Output High Voltage
Output Low Voltage
Input High Voltage
2.4V
-
0.4V
2.2V
VCC+0.3V
0.8V
Input Low Voltage
VIL
-0.3V
Input Leakage Current
Output Leakage Current
Power-Down Supply Current
Standby Supply Current
Operating Supply Current
ILI
-
-
-
-
-
10uA
10uA
100uA
1.0mA
40mA
VIN=0 to 5.5V
VOUT=0 to 5.5V
CE>VCC-0.2V
CE=VIH
ILO
ICC3
ICC2
ICC1
Note 1
CAPACITANCE (Ta = 25°C, f=1.0MHz (Note 2))
Item
Symbol
CIN
MIN.
MAX.
10
UNIT
pF
Conditions
Input Capacitance
Output Capacitance
-
-
VIN=0V
COUT
10
pF
VOUT=0V
P/N:PM0137
REV. 3.8, JUL. 16, 2001
2
MX23C8000
AC CHARACTERISTICS (Ta = -10°C ~ 70°C, VCC = 5.0V ±10%)
23C8000-10
SYMBOL MIN. MAX.
23C8000-12
23C8000-15
23C8000-20
PARAMETER
MIN.
120ns
-
MAX.
MIN.
150ns
-
MAX.
MIN.
200ns
-
MAX.
CONDITIONS
Cycle Time
tCYC
tAA
100ns
-
-
-
-
-
Address Access Time
Output Hold Time After
Address Change
100ns
-
120ns
-
150ns
-
200ns
-
tOH
0ns
0ns
0ns
0ns
Chip Enable Access Time
Output Enable/Chip Select
Access Time
tACE
tAOE
-
-
100ns
80ns
-
-
120ns
80ns
-
-
150ns
80ns
-
-
200ns
100ns
Output Low Z Delay
Output High Z Delay
tLZ
0ns
-
0ns
-
-
0ns
-
-
0ns
-
-
Note 3
Note 4
tHZ
20ns
20ns
20ns
20ns
Note:
1. Measured with device selected at f=5MHz and output unloaded.
2. This parameter is periodically sampled and is not 100% teseted.
3. Output low-impedance delay (tLA) is measured from CE going low.
4. Output high-impedance delay (tHZ) is measured from CE going high.
ACTest Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~2.4V
10ns
1.5V
0.8V and 2.0V
See Figure
TIMING DIAGRAM
PROPAGATION DELAY FROM ADDRESS (CE/OE=ACTIVE)
tCYC
ADDRESS
INPUTS
VALID ADDRESS
tAA
tOH
DATA OUT
VALID DATA
P/N:PM0137
REV. 3.8, JUL. 16, 2001
3
MX23C8000
PROPAGATION DELAY FROM CHIP ENABLE (ADDRESS VALID)
CE
tACE
OE
tAOE
tHZ
tLZ
DATA OUT
ORDER INFORMATION
Part No.
Access Time
100ns
100ns
100ns
100ns
120ns
120ns
120ns
120ns
150ns
150ns
150ns
150ns
200ns
200ns
200ns
200ns
Operating Current MAX. STANDBY CURRENT MAX.
Package
MX23C8000PC-10
MX23C8000MC-10
MX23C8000QC-10
MX23C8000TC-10
MX23C8000PC-12
MX23C8000MC-12
MX23C8000QC-12
MX23C8000TC-12
MX23C8000PC-15
MX23C8000MC-15
MX23C8000QC-15
MX23C8000TC-15
MX23C8000PC-20
MX23C8000MC-20
MX23C8000QC-20
MX23C8000TC-20
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
40mA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
100uA
32 pin DIP
32 pin SOP
32 pin PLCC
32 pin TSOP
32 pin DIP
32 pin SOP
32 pin PLCC
32 pin TSOP
32 pin DIP
32 pin SOP
32 pin PLCC
32 pin TSOP
32 pin DIP
32 pin SOP
32 pin PLCC
32 pin TSOP
P/N:PM0137
REV. 3.8, JUL. 16, 2001
4
MX23C8000
PACKAGE INFORMATION
32-PIN PLASTIC DIP (600 mil)
P/N:PM0137
REV. 3.8, JUL. 16, 2001
5
MX23C8000
32-PIN PLASTIC SOP (450 mil)
P/N:PM0137
REV. 3.8, JUL. 16, 2001
6
MX23C8000
32-PIN PLASTIC LEADED CHIP CHARRIER (PLCC)
P/N:PM0137
REV. 3.8, JUL. 16, 2001
7
MX23C8000
32-PIN PLASTICTSOP
P/N:PM0137
REV. 3.8, JUL. 16, 2001
8
MX23C8000
REVISION HISTORY
REVISION
DESCRIPTION
PAGE
DATE
3.4
3.5
3.6
tHZ:70ns max. ---> 20ns max.
SEP/25/1997
JAN/29/1999
JUN/08/2000
AC CHARACTERISTICS tOH 10ns-->0ns
Modify PIN CONFIGUTATION of 32SOP
30pin A19-->A17 ; 24pin CE/CE-->OE/OE
Modify Pin Configuration--32TSOP
Modify Package Information
P3
P1
3.7
3.8
P1
P5~8
NOV/08/2000
JUL/16/2001
P/N:PM0137
REV. 3.8, JUL. 16, 2001
9
MX23C8000
MACRONIX INTERNATIONAL CO., LTD.
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http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
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