MX29F040CTC-70G [Macronix]
4M-BIT [512K x 8] SINGLE VOLTAGE 5V ONLY FLASH MEMORY;
| 型号： | MX29F040CTC-70G |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 4M-BIT [512K x 8] SINGLE VOLTAGE 5V ONLY FLASH MEMORY |
| 文件： | 总41页 (文件大小：559K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX29F040C
4M-BIT [512K x 8] SINGLE VOLTAGE
5V ONLY FLASH MEMORY
FEATURES
GENERAL FEATURES
•ꢀ SingleꢀPowerꢀSupplyꢀOperation
ꢀ -ꢀ4.5ꢀtoꢀ5.5ꢀvoltꢀforꢀread,ꢀerase,ꢀandꢀprogramꢀoperations
•ꢀ 524288ꢀxꢀ8ꢀonly
•ꢀ SectorꢀStructure
ꢀ -ꢀ64K-Byteꢀxꢀ8
•ꢀ Latch-upꢀprotectedꢀtoꢀ100mAꢀfromꢀ-1VꢀtoꢀVccꢀ+ꢀ1V
•ꢀ CompatibleꢀwithꢀJEDECꢀstandard
ꢀ -ꢀPinoutꢀandꢀsoftwareꢀcompatibleꢀtoꢀsingleꢀpowerꢀsupplyꢀFlash
PERFORMANCE
•ꢀ HighꢀPerformance
ꢀ -ꢀAccessꢀtime:ꢀ70/90ns
ꢀ -ꢀProgramꢀtime:ꢀ9usꢀ(typical)
ꢀ -ꢀEraseꢀtime:ꢀ0.7s/sector,ꢀ4s/chipꢀ(typical)
•ꢀ LowꢀPowerꢀConsumption
ꢀ -ꢀLowꢀactiveꢀreadꢀcurrent:ꢀ30mAꢀ(maximum)ꢀatꢀ5MHz
ꢀ -ꢀLowꢀstandbyꢀcurrent:ꢀ1uAꢀ(typical)
•ꢀ Minimumꢀ100,000ꢀerase/programꢀcycle
•ꢀ 20ꢀyearsꢀdataꢀretention
SOFTWARE FEATURES
•ꢀ EraseꢀSuspend/ꢀEraseꢀResume
ꢀ -ꢀSuspendsꢀsectorꢀeraseꢀoperationꢀtoꢀreadꢀdataꢀfromꢀorꢀprogramꢀdataꢀtoꢀanotherꢀsectorꢀwhichꢀisꢀnotꢀbeingꢀ
erased
•ꢀ StatusꢀReply
ꢀ -ꢀData#ꢀPollingꢀ&ꢀToggleꢀbitsꢀprovideꢀdetectionꢀofꢀprogramꢀandꢀeraseꢀoperationꢀcompletion
PACKAGE
•ꢀ 32-PinꢀPLCC
•ꢀ 32-PinꢀTSOP
•ꢀ All devices are RoHS Compliant
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Contents
FEATURES ..................................................................................................................................................................1
GENERALꢀFEATURES ...............................................................................................................................1
SOFTWAREꢀFEATURES............................................................................................................................1
PACKAGEꢀ..................................................................................................................................................1
PIN CONFIGURATIONS..............................................................................................................................................4
PIN DESCRIPTION......................................................................................................................................................5
LOGICꢀSYMBOL.........................................................................................................................................5
BLOCK DIAGRAM.......................................................................................................................................................6
Table 1. SECTOR STRUCTURE .................................................................................................................................7
MX29F040CꢀSECTORꢀADDRESSꢀTABLE..................................................................................................7
Table 2. BUS OPERATION..........................................................................................................................................7
REQUIREMENTSꢀFORꢀREADINGꢀARRAYꢀDATA ......................................................................................8
WRITEꢀCOMMANDS/COMMANDꢀSEQUENCES.......................................................................................8
AUTOMATICꢀSELECTꢀOPERATION ..........................................................................................................8
DATAꢀPROTECTION...................................................................................................................................9
WRITEꢀPULSEꢀ"GLITCH"ꢀPROTECTION ..................................................................................................9
LOGICALꢀINHIBIT.......................................................................................................................................9
POWER-UPꢀSEQUENCE ...........................................................................................................................9
POWER-UPꢀWRITEꢀINHIBIT......................................................................................................................9
POWERꢀSUPPLYꢀDECOUPLING...............................................................................................................9
TABLE 3. MX29F040C COMMAND DEFINITIONS...................................................................................................10
RESETꢀ .....................................................................................................................................................11
AUTOMATICꢀSELECTꢀCOMMANDꢀSEQUENCE .....................................................................................11
AUTOMATICꢀPROGRAMMING ................................................................................................................12
CHIPꢀꢀERASE ...........................................................................................................................................13
SECTORꢀERASE......................................................................................................................................13
SECTORꢀERASEꢀSUSPEND....................................................................................................................14
SECTORꢀERASEꢀRESUME......................................................................................................................14
ABSOLUTE MAXIMUM STRESS RATINGS.............................................................................................................15
OPERATING TEMPERATURE AND VOLTAGE........................................................................................................15
DC CHARACTERISTICS ........................................................................................................................................16
SWITCHING TEST CIRCUITS...................................................................................................................................17
AC CHARACTERISTICS .........................................................................................................................................18
Figureꢀ1.ꢀCOMMANDꢀWRITEꢀOPERATION .............................................................................................19
READ/RESET OPERATION ......................................................................................................................................20
Figureꢀ2.ꢀREADꢀTIMINGꢀWAVEFORMS ...................................................................................................20
ERASE/PROGRAM OPERATION .............................................................................................................................21
Figureꢀ3.ꢀAUTOMATICꢀCHIPꢀERASEꢀTIMINGꢀWAVEFORM ....................................................................21
Figureꢀ4.ꢀAUTOMATICꢀCHIPꢀERASEꢀALGORITHMꢀFLOWCHART..........................................................22
Figureꢀ5.ꢀAUTOMATICꢀSECTORꢀERASEꢀTIMINGꢀWAVEFORM..............................................................23
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Figureꢀ6.ꢀꢀAUTOMATICꢀSECTORꢀERASEꢀALGORITHMꢀFLOWCHART ..................................................24
Figureꢀ7.ꢀERASEꢀSUSPEND/RESUMEꢀFLOWCHART ............................................................................25
Figureꢀ8.ꢀAUTOMATICꢀPROGRAMꢀTIMINGꢀWAVEFORMS.....................................................................26
Figureꢀ9.ꢀCE#ꢀCONTROLLEDꢀWRITEꢀTIMINGꢀWAVEFORM ..................................................................27
Figureꢀ10.ꢀAUTOMATICꢀPROGRAMMINGꢀALGORITHMꢀFLOWCHART .................................................28
Figureꢀ11.ꢀSILICONꢀIDꢀREADꢀTIMINGꢀWAVEFORM................................................................................29
WRITE OPERATION STATUS...................................................................................................................................30
Figureꢀ12.ꢀDATA#ꢀPOLLINGꢀTIMINGꢀWAVEFORMSꢀ(DURINGꢀAUTOMATICꢀALGORITHMS)................30
Figureꢀ13.ꢀDATA#ꢀPOLLINGꢀALGORITHM ...............................................................................................31
Figureꢀ14.ꢀTOGGLEꢀBITꢀꢀTIMINGꢀWAVEFORMSꢀ(DURINGꢀAUTOMATICꢀALGORITHMS).....................32
Figureꢀ15.ꢀꢀTOGGLEꢀBITꢀALGORITHMꢀ ...................................................................................................33
RECOMMENDED OPERATING CONDITIONS.........................................................................................................34
FigureꢀA.ꢀACꢀTimingꢀatꢀDeviceꢀPower-Up .................................................................................................34
ERASE AND PROGRAMMING PERFORMANCE....................................................................................................35
DATA RETENTION ....................................................................................................................................................35
LATCH-UP CHARACTERISTICS..............................................................................................................................35
ORDERING INFORMATION......................................................................................................................................36
PACKAGE INFORMATION........................................................................................................................................38
REVISION HISTORY .................................................................................................................................................40
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PIN CONFIGURATIONS
32 PLCC
4
1
32
30
29
5
9
A7
A6
A5
A4
A3
A2
A1
A0
Q0
A14
A13
A8
A9
MX29F040C
25
A11
OE#
A10
CE#
Q7
13
14
21
17
20
32 TSOP (Standard Type) (8mm x 20mm)
A11
A9
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
CE#
Q7
2
A8
3
A13
A14
A17
WE#
VCC
A18
A16
A15
A12
A7
4
5
Q6
6
Q5
7
Q4
8
Q3
MX29F040C
9
GND
Q2
10
11
12
13
14
15
16
Q1
Q0
A0
A6
A1
A5
A2
A4
A3
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LOGIC SYMBOL
PIN DESCRIPTION
19
SYMBOL
A0~A18
Q0~Q7
CE#
PIN NAME
8
A0-A18
Q0-Q7
AddressꢀInput
DataꢀInput/Output
ChipꢀEnableꢀInput
WriteꢀEnableꢀInput
OutputꢀEnableꢀInput
GroundꢀPin
WE#
CE#
OE#
WE#
OE#
GND
VCC
+5.0Vꢀsingleꢀpowerꢀsupply
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BLOCK DIAGRAM
WRITE
STATE
CONTROL
INPUT
PROGRAM/ERASE
HIGH VOLTAGE
CE#
OE#
WE#
MACHINE
(WSM)
LOGIC
STATE
FLASH
ARRAY
ADDRESS
LATCH
REGISTER
ARRAY
A0-AM
AND
SOURCE
HV
BUFFER
Y-PASS GATE
COMMAND
DATA
DECODER
PGM
SENSE
DATA
HV
AMPLIFIER
COMMAND
DATA LATCH
PROGRAM
DATA LATCH
Q0-Q7
I/O BUFFER
AM: MSB address
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Table 1. SECTOR STRUCTURE
MX29F040C SECTOR ADDRESS TABLE
Sector
Sector Address
Address Range
A18
0
A17
0
A16
0
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
00000h-0FFFFh
10000h-1FFFFh
20000h-2FFFFh
30000h-3FFFFh
40000h-4FFFFh
50000h-5FFFFh
60000h-6FFFFh
70000h-7FFFFh
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Note: Allꢀsectorsꢀareꢀ64ꢀKbytesꢀinꢀsize.
Table 2. BUS OPERATION
Mode
Pins
CE# OE# WE#
A0
A1
A6
A9
Q0 ~ Q7
ReadꢀSiliconꢀID
ManufactureꢀCode
ReadꢀSiliconꢀID
DeviceꢀCode
Read
Standby
OutputꢀDisable
Write
L
L
L
L
H
H
L
L
L
X
X
Vhv
Vhv
C2H
A4H
H
L
H
L
L
X
H
H
H
X
H
L
A0
X
X
A1
X
X
A6
X
X
A9
X
X
DOUT
HIGHꢀZ
HIGHꢀZ
DIN
L
A0
A1
A6
A9
Notes:
1.ꢀꢀVhvꢀisꢀtheꢀveryꢀhighꢀvoltage,ꢀ11.5Vꢀtoꢀ12.5V.
2.ꢀꢀXꢀmeansꢀinputꢀhighꢀ(Vih)ꢀorꢀinputꢀlowꢀ(Vil).
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REQUIREMENTS FOR READING ARRAY DATA
Readꢀarrayꢀactionꢀisꢀtoꢀreadꢀtheꢀdataꢀstoredꢀinꢀtheꢀarrayꢀout.ꢀWhileꢀtheꢀmemoryꢀdeviceꢀisꢀinꢀpoweredꢀupꢀorꢀhasꢀ
beenꢀreset,ꢀitꢀwillꢀautomaticallyꢀenterꢀtheꢀstatusꢀofꢀreadꢀarray.ꢀIfꢀtheꢀmicroprocessorꢀwantsꢀtoꢀreadꢀtheꢀdataꢀstoredꢀ
inꢀarray,ꢀitꢀhasꢀtoꢀdriveꢀCE#ꢀ(deviceꢀenableꢀcontrolꢀpin)ꢀandꢀOE#ꢀ(Outputꢀcontrolꢀpin)ꢀasꢀVil,ꢀandꢀinputꢀtheꢀaddressꢀ
ofꢀtheꢀdataꢀtoꢀbeꢀreadꢀintoꢀaddressꢀpinꢀatꢀtheꢀsameꢀtime.ꢀAfterꢀaꢀperiodꢀofꢀreadꢀcycleꢀ(TceꢀorꢀTaa),ꢀtheꢀdataꢀbeingꢀ
readꢀoutꢀwillꢀbeꢀdisplayedꢀonꢀoutputꢀpinꢀforꢀmicroprocessorꢀtoꢀaccess.ꢀIfꢀCE#ꢀorꢀOE#ꢀisꢀVih,ꢀtheꢀoutputꢀwillꢀbeꢀinꢀ
tri-state,ꢀandꢀthereꢀwillꢀbeꢀnoꢀdataꢀdisplayedꢀonꢀoutputꢀpinꢀatꢀall.
Afterꢀtheꢀmemoryꢀdeviceꢀcompletesꢀembeddedꢀoperationꢀ(automaticꢀEraseꢀorꢀProgram),ꢀitꢀwillꢀautomaticallyꢀre-
turnꢀtoꢀtheꢀstatusꢀofꢀreadꢀarray,ꢀandꢀtheꢀdeviceꢀcanꢀreadꢀtheꢀdataꢀinꢀanyꢀaddressꢀinꢀtheꢀarray.ꢀInꢀtheꢀprocessꢀofꢀ
erasing,ꢀifꢀtheꢀdeviceꢀreceivesꢀtheꢀEraseꢀsuspendꢀcommand,ꢀeraseꢀoperationꢀwillꢀbeꢀstoppedꢀafterꢀaꢀperiodꢀofꢀ
timeꢀnoꢀmoreꢀthanꢀTreadyandꢀtheꢀdeviceꢀwillꢀreturnꢀtoꢀtheꢀstatusꢀofꢀreadꢀarray.ꢀAtꢀthisꢀtime,ꢀtheꢀdeviceꢀcanꢀreadꢀ
theꢀdataꢀstoredꢀinꢀanyꢀaddressꢀexceptꢀtheꢀsectorꢀbeingꢀerasedꢀinꢀtheꢀarray.ꢀInꢀtheꢀstatusꢀofꢀeraseꢀsuspend,ꢀifꢀuserꢀ
wantsꢀtoꢀreadꢀtheꢀdataꢀinꢀtheꢀsectorsꢀbeingꢀerased,ꢀtheꢀdeviceꢀwillꢀoutputꢀstatusꢀdataꢀontoꢀtheꢀoutput.ꢀSimilarly,ꢀifꢀ
programꢀcommandꢀisꢀissuedꢀafterꢀeraseꢀsuspend,ꢀafterꢀprogramꢀoperationꢀisꢀcompleted,ꢀsystemꢀcanꢀstillꢀreadꢀar-
rayꢀdataꢀinꢀanyꢀaddressꢀexceptꢀtheꢀsectorsꢀtoꢀbeꢀerased.
Theꢀdeviceꢀneedsꢀtoꢀissueꢀresetꢀcommandꢀtoꢀenableꢀreadꢀarrayꢀoperationꢀagainꢀinꢀorderꢀtoꢀarbitrarilyꢀreadꢀtheꢀ
dataꢀinꢀtheꢀarrayꢀinꢀtheꢀfollowingꢀtwoꢀsituations:ꢀꢀ
1.ꢀInꢀprogramꢀorꢀeraseꢀoperation,ꢀtheꢀprogrammingꢀorꢀerasingꢀfailureꢀcausesꢀQ5ꢀtoꢀgoꢀhigh.
2.ꢀTheꢀdeviceꢀisꢀinꢀautoꢀselectꢀmode.
Inꢀtheꢀtwoꢀsituationsꢀabove,ꢀifꢀresetꢀcommandꢀisꢀnotꢀissued,ꢀtheꢀdeviceꢀisꢀnotꢀinꢀreadꢀarrayꢀmodeꢀandꢀsystemꢀ
mustꢀissueꢀresetꢀcommandꢀbeforeꢀreadingꢀarrayꢀdata.
WRITE COMMANDS/COMMAND SEQUENCES
Toꢀwriteꢀaꢀcommandꢀtoꢀtheꢀdevice,ꢀsystemꢀmustꢀdriveꢀWE#ꢀandꢀCE#ꢀtoꢀVil,ꢀandꢀOE#ꢀtoꢀVih.ꢀInꢀaꢀcommandꢀcycle,ꢀ
allꢀaddressꢀareꢀlatchedꢀatꢀtheꢀlaterꢀfallingꢀedgeꢀofꢀCE#ꢀandꢀWE#,ꢀandꢀallꢀdataꢀareꢀlatchedꢀatꢀtheꢀearlierꢀrisingꢀ
edgeꢀofꢀCE#ꢀandꢀWE#.ꢀ
"Figure 1. COMMAND WRITE OPERATION"ꢀillustratesꢀtheꢀACꢀtimingꢀwaveformꢀofꢀaꢀwriteꢀcommand,ꢀandꢀ"TA-
BLE 3. MX29F040C COMMAND DEFINITIONS"ꢀdefinesꢀallꢀtheꢀvalidꢀcommandꢀsetsꢀofꢀtheꢀdevice.ꢀSystemꢀisꢀnotꢀ
allowedꢀtoꢀwriteꢀinvalidꢀcommandsꢀnotꢀdefinedꢀinꢀthisꢀdatasheet.ꢀWritingꢀanꢀinvalidꢀcommandꢀwillꢀbringꢀtheꢀdeviceꢀ
toꢀanꢀundefinedꢀstate.
AUTOMATIC SELECT OPERATION
WhenꢀtheꢀdeviceꢀisꢀinꢀReadꢀarrayꢀmodeꢀorꢀerase-suspendedꢀreadꢀarrayꢀmode,ꢀuserꢀcanꢀissueꢀreadꢀsiliconꢀIDꢀ
commandꢀtoꢀenterꢀreadꢀsiliconꢀIDꢀmode.ꢀAfterꢀenteringꢀreadꢀsiliconꢀIDꢀmode,ꢀuserꢀcanꢀqueryꢀseveralꢀsiliconꢀIDsꢀ
continuouslyꢀandꢀdoesꢀnotꢀneedꢀtoꢀissueꢀreadꢀsiliconꢀIDꢀmodeꢀagain.ꢀWhenꢀA0ꢀisꢀLow,ꢀdeviceꢀwillꢀoutputꢀMa-
cronixꢀManufactureꢀIDꢀC2.ꢀWhenꢀA0ꢀisꢀhigh,ꢀdeviceꢀwillꢀoutputꢀDeviceꢀID.ꢀInꢀreadꢀsiliconꢀIDꢀmode,ꢀissuingꢀresetꢀ
commandꢀwillꢀresetꢀdeviceꢀbackꢀtoꢀreadꢀarrayꢀmodeꢀorꢀerase-suspendedꢀreadꢀarrayꢀmode.ꢀ
AnotherꢀwayꢀtoꢀenterꢀreadꢀsiliconꢀIDꢀisꢀtoꢀapplyꢀhighꢀvoltageꢀonꢀA9ꢀpinꢀwithꢀCE#,ꢀOE#ꢀandꢀA1ꢀatꢀVil.ꢀWhileꢀtheꢀ
highꢀvoltageꢀofꢀA9ꢀpinꢀisꢀdischarged,ꢀdeviceꢀwillꢀautomaticallyꢀleaveꢀreadꢀsiliconꢀIDꢀmodeꢀandꢀgoꢀbackꢀtoꢀreadꢀ
arrayꢀmodeꢀorꢀerase-suspendedꢀreadꢀarrayꢀmode.ꢀWhenꢀA0ꢀisꢀLow,ꢀdeviceꢀwillꢀoutputꢀMacronixꢀManufactureꢀIDꢀ
C2.ꢀWhenꢀA0ꢀisꢀhigh,ꢀdeviceꢀwillꢀoutputꢀDeviceꢀID.
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DATA PROTECTION
Toꢀavoidꢀaccidentalꢀerasureꢀorꢀprogrammingꢀofꢀtheꢀdevice,ꢀtheꢀdeviceꢀisꢀautomaticallyꢀresetꢀtoꢀreadꢀarrayꢀmodeꢀ
duringꢀpowerꢀup.ꢀBesides,ꢀonlyꢀafterꢀsuccessfulꢀcompletionꢀofꢀtheꢀspecifiedꢀcommandꢀsetsꢀwillꢀtheꢀdeviceꢀbeginꢀ
itsꢀeraseꢀorꢀprogramꢀoperation.
Otherꢀfeaturesꢀtoꢀprotectꢀtheꢀdataꢀfromꢀaccidentalꢀalternationꢀareꢀdescribedꢀasꢀfollowed.
WRITE PULSE "GLITCH" PROTECTION
CE#,ꢀWE#,ꢀOE#ꢀpulsesꢀshorterꢀthanꢀ5nsꢀareꢀtreatedꢀasꢀglitchesꢀandꢀwillꢀnotꢀbeꢀregardedꢀasꢀanꢀeffectiveꢀwriteꢀ
cycle.
LOGICAL INHIBIT
AꢀvalidꢀwriteꢀcycleꢀrequiresꢀbothꢀCE#ꢀandꢀWE#ꢀatꢀVilꢀwithꢀOE#ꢀatꢀVih.ꢀWriteꢀcycleꢀisꢀignoredꢀwhenꢀeitherꢀCE#ꢀatꢀ
Vih,ꢀWE#ꢀaꢀVih,ꢀorꢀOE#ꢀatꢀVil.
POWER-UP SEQUENCE
Uponꢀpowerꢀup,ꢀMX29F040Cꢀisꢀplacedꢀinꢀreadꢀarrayꢀmode.ꢀFurthermore,ꢀprogramꢀorꢀeraseꢀoperationꢀwillꢀbeginꢀ
onlyꢀafterꢀsuccessfulꢀcompletionꢀofꢀspecifiedꢀcommandꢀsequences.
POWER-UP WRITE INHIBIT
WhenꢀWE#,ꢀCE#ꢀisꢀheldꢀatꢀVilꢀandꢀOE#ꢀisꢀheldꢀatꢀVihꢀduringꢀpowerꢀup,ꢀtheꢀdeviceꢀignoresꢀtheꢀfirstꢀcommandꢀonꢀ
theꢀrisingꢀedgeꢀofꢀWE#.
POWER SUPPLY DECOUPLING
Aꢀ0.1uFꢀcapacitorꢀshouldꢀbeꢀconnectedꢀbetweenꢀtheꢀVccꢀandꢀGNDꢀtoꢀreduceꢀtheꢀnoiseꢀeffect.
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TABLE 3. MX29F040C COMMAND DEFINITIONS
AutomaticꢀSelect
ManufacturerꢀID DeviceꢀID
Readꢀ Resetꢀ
Mode Mode
Chipꢀ
Erase
Sectorꢀ
Erase
Eraseꢀ
Suspend Resume
Eraseꢀ
Commandꢀ
Program
Addr
Data
Addr
Data
Addr
Data
Addr
Addr
Data
XXX
555
AA
2AA
55
555
90
X00
555
AA
2AA
55
555
90
X01
555
AA
2AA
55
555
A0
Addr
555
AA
2AA
55
555
80
555
555
AA
2AA
55
555
80
555
XXX
B0
XXX
1stꢀBusꢀ
Cycle
F0
30
2ndꢀBusꢀ
Cycle
3rdꢀBusꢀꢀ
Cycle
4thꢀBusꢀ
Cycle
Data
C2
ID
Data
AA
AA
Addr
Data
Addr
Data
2AA
55
555
10
2AA
55
Sector
30
5thꢀBusꢀꢀ
Cycle
6thꢀBusꢀꢀ
Cycle
Notes:
1.ꢀꢀDeviceꢀID:ꢀA4H.
Itꢀisꢀnotꢀallowedꢀtoꢀadoptꢀanyꢀotherꢀcodeꢀwhichꢀisꢀnotꢀinꢀtheꢀaboveꢀcommandꢀdefinitionꢀtable.
2.
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MX29F040C
RESET
Inꢀtheꢀfollowingꢀsituations,ꢀexecutingꢀresetꢀcommandꢀwillꢀresetꢀdeviceꢀꢀbackꢀtoꢀreadꢀarrayꢀmode:
•ꢀ Amongꢀeraseꢀcommandꢀsequenceꢀ(beforeꢀtheꢀfullꢀcommandꢀsetꢀisꢀcompleted)
•ꢀ Sectorꢀeraseꢀtime-outꢀperiod
•ꢀ Eraseꢀfailꢀ(whileꢀQ5ꢀisꢀhigh)
•ꢀ Amongꢀprogramꢀcommandꢀsequenceꢀ(beforeꢀtheꢀfullꢀcommandꢀsetꢀisꢀcompleted,ꢀerase-suspendedꢀprogramꢀ
included)
•ꢀ Programꢀfailꢀ(whileꢀQ5ꢀisꢀhigh,ꢀandꢀerase-suspendedꢀprogramꢀfailꢀisꢀincluded)
•ꢀ ReadꢀsiliconꢀIDꢀmode
Whileꢀdeviceꢀisꢀatꢀtheꢀstatusꢀofꢀprogramꢀfailꢀorꢀeraseꢀfailꢀ(Q5ꢀisꢀhigh),ꢀuserꢀmustꢀissueꢀresetꢀcommandꢀtoꢀresetꢀ
deviceꢀꢀbackꢀtoꢀreadꢀarrayꢀmode.ꢀWhileꢀtheꢀdeviceꢀisꢀinꢀreadꢀsiliconꢀIDꢀmode,ꢀuserꢀmustꢀissueꢀresetꢀcommandꢀtoꢀ
resetꢀdeviceꢀꢀbackꢀtoꢀreadꢀarrayꢀmode.ꢀꢀꢀ
Whenꢀtheꢀdeviceꢀisꢀinꢀtheꢀprogressꢀofꢀprogrammingꢀ(notꢀprogramꢀfail)ꢀorꢀerasingꢀ(notꢀeraseꢀfail),ꢀdeviceꢀwillꢀꢀig-
noreꢀresetꢀcommand.
AUTOMATIC SELECT COMMAND SEQUENCE
AutomaticꢀSelectꢀmodeꢀisꢀusedꢀtoꢀaccessꢀtheꢀmanufacturerꢀID,ꢀdeviceꢀID.ꢀTheꢀautomaticꢀselectꢀmodeꢀhasꢀfourꢀ
commandꢀcycles.ꢀTheꢀfirstꢀtwoꢀareꢀunlockꢀcycles,ꢀandꢀfollowedꢀbyꢀaꢀspecificꢀcommand.ꢀTheꢀfourthꢀcycleꢀisꢀaꢀ
normalꢀreadꢀcycle,ꢀandꢀuserꢀcanꢀreadꢀatꢀanyꢀaddressꢀanyꢀnumberꢀofꢀtimesꢀwithoutꢀenteringꢀanotherꢀcommandꢀ
sequence.ꢀTheꢀresetꢀcommandꢀisꢀnecessaryꢀtoꢀexitꢀtheꢀAutomaticꢀSelectꢀmodeꢀandꢀbackꢀtoꢀreadꢀarray.ꢀTheꢀfol-
lowingꢀtableꢀshowsꢀtheꢀidentificationꢀcodeꢀwithꢀcorrespondingꢀaddress.
Address
X00
Data (Hex)
ManufacturerꢀID
DeviceꢀID
C2
X01
A4
Thereꢀisꢀanꢀalternativeꢀmethodꢀtoꢀthatꢀshownꢀinꢀ"Table 2. BUS OPERATION",ꢀwhichꢀisꢀintendedꢀforꢀEPROMꢀpro-
grammersꢀandꢀrequiresꢀVhvꢀonꢀaddressꢀbitꢀA9.
P/N:PM1201
REV. 2.2, DEC. 04, 2012
11
MX29F040C
AUTOMATIC PROGRAMMING
TheꢀMX29F040Ccanꢀprovideꢀtheꢀuserꢀprogramꢀfunction.ꢀAsꢀlongꢀasꢀtheꢀusersꢀenterꢀtheꢀrightꢀcycleꢀdefinedꢀinꢀtheꢀ
"TABLE 3. MX29F040C COMMAND DEFINITIONS"ꢀ(includingꢀ2ꢀunlockꢀcyclesꢀandꢀA0H),ꢀanyꢀdataꢀuserꢀinputsꢀ
willꢀautomaticallyꢀbeꢀprogrammedꢀintoꢀtheꢀarray.
Onceꢀtheꢀprogramꢀfunctionꢀisꢀexecuted,ꢀtheꢀinternalꢀwriteꢀstateꢀcontrollerꢀwillꢀautomaticallyꢀexecuteꢀtheꢀalgo-
rithmsꢀandꢀtimingsꢀnecessaryꢀforꢀprogramꢀandꢀverification,ꢀwhichꢀincludesꢀgeneratingꢀsuitableꢀprogramꢀpulse,ꢀ
verifyingꢀwhetherꢀtheꢀthresholdꢀvoltageꢀofꢀtheꢀprogrammedꢀcellꢀisꢀhighꢀenoughꢀandꢀrepeatingꢀtheꢀprogramꢀpulseꢀ
ifꢀanyꢀofꢀtheꢀcellsꢀdoesꢀnotꢀpassꢀverification.ꢀMeanwhile,ꢀtheꢀinternalꢀcontrolꢀwillꢀprohibitꢀtheꢀprogrammingꢀtoꢀcellsꢀ
thatꢀpassꢀverificationꢀwhileꢀtheꢀotherꢀcellsꢀfailꢀinꢀverificationꢀinꢀorderꢀtoꢀavoidꢀover-programming.
Programmingꢀwillꢀonlyꢀchangeꢀtheꢀbitꢀstatusꢀfromꢀ"1"ꢀtoꢀ"0".ꢀThatꢀisꢀtoꢀsay,ꢀitꢀisꢀimpossibleꢀtoꢀconvertꢀtheꢀbitꢀstatusꢀ
fromꢀ"0"ꢀtoꢀ"1"ꢀbyꢀprogramming.ꢀMeanwhile,ꢀtheꢀinternalꢀwriteꢀverificationꢀonlyꢀdetectsꢀtheꢀerrorsꢀofꢀtheꢀ"1"ꢀthatꢀisꢀ
notꢀsuccessfullyꢀprogrammedꢀtoꢀ"0".ꢀ
Anyꢀcommandꢀwrittenꢀtoꢀtheꢀdeviceꢀduringꢀprogrammingꢀwillꢀbeꢀignoredꢀexceptꢀhardwareꢀreset,ꢀwhichꢀwillꢀtermi-
nateꢀtheꢀprogramꢀoperationꢀafterꢀaꢀperiodꢀofꢀtimeꢀnoꢀmoreꢀthanꢀTready.ꢀWhenꢀtheꢀembeddedꢀprogramꢀalgorithmꢀ
isꢀcompleteꢀorꢀtheꢀprogramꢀoperationꢀisꢀterminatedꢀbyꢀhardwareꢀreset,ꢀtheꢀdeviceꢀwillꢀreturnꢀtoꢀtheꢀreadingꢀarrayꢀ
dataꢀmode.
Withꢀtheꢀinternalꢀwriteꢀstateꢀcontroller,ꢀtheꢀdeviceꢀrequiresꢀtheꢀuserꢀtoꢀwriteꢀtheꢀprogramꢀcommandꢀandꢀdataꢀonly.ꢀ
TheꢀtypicalꢀchipꢀprogramꢀtimeꢀatꢀroomꢀtemperatureꢀofꢀtheꢀMX29F040Cꢀisꢀ4.5ꢀseconds.
Whenꢀtheꢀembeddedꢀprogramꢀoperationꢀisꢀonꢀgoing,ꢀuserꢀcanꢀconfirmꢀifꢀtheꢀembeddedꢀoperationꢀisꢀfinishedꢀorꢀ
notꢀbyꢀtheꢀfollowingꢀmethods:
Status
Inꢀprogress*1
Finished
Q7
Q7#
Q7
Q6
Q5
0
togging
Stopꢀtoggling
Toggling
0
Exceedꢀtimeꢀlimit
Q7#
1
*1:ꢀTheꢀstatusꢀ"inꢀprogress"ꢀmeansꢀbothꢀprogramꢀmodeꢀandꢀerase-suspendedꢀprogramꢀmode.
P/N:PM1201
REV. 2.2, DEC. 04, 2012
12
MX29F040C
CHIP ERASE
ChipꢀEraseꢀisꢀtoꢀeraseꢀallꢀtheꢀdataꢀwithꢀ"1"ꢀandꢀ"0"ꢀasꢀallꢀ"1".ꢀItꢀneedsꢀ6ꢀcyclesꢀtoꢀwriteꢀtheꢀactionꢀin,ꢀandꢀtheꢀfirstꢀ
twoꢀcyclesꢀareꢀ"unlock"ꢀcycles,ꢀtheꢀthirdꢀoneꢀisꢀaꢀconfigurationꢀcycle,ꢀtheꢀfourthꢀandꢀfifthꢀareꢀalsoꢀ"unlock"ꢀcycles,ꢀ
andꢀtheꢀsixthꢀcycleꢀisꢀtheꢀchipꢀeraseꢀoperation.ꢀ
Duringꢀchipꢀerasing,ꢀallꢀtheꢀcommandsꢀwillꢀnotꢀbeꢀacceptedꢀexceptꢀhardwareꢀrestsꢀorꢀtheꢀworkingꢀvoltageꢀisꢀtooꢀ
lowꢀthatꢀchipꢀeraseꢀwillꢀbeꢀinterrupted.ꢀAfterꢀChipꢀErase,ꢀtheꢀchipꢀwillꢀreturnꢀtoꢀtheꢀstateꢀofꢀReadꢀArray.
Whenꢀtheꢀembeddedꢀchipꢀeraseꢀoperationꢀisꢀonꢀgoing,ꢀuserꢀcanꢀconfirmꢀifꢀtheꢀembeddedꢀoperationꢀisꢀfinishedꢀorꢀ
notꢀbyꢀtheꢀfollowingꢀmethods:ꢀ
Status
Inꢀprogress
Finished
Q7
0
Q6
Q5
0
Q2
Toggling
1
Togging
1
Stopꢀtoggling
Toggling
0
Exceedꢀtimeꢀlimit
0
1
Toggling
SECTOR ERASE
SectorꢀEraseꢀisꢀtoꢀeraseꢀallꢀtheꢀdataꢀinꢀaꢀsectorꢀwithꢀ"1"ꢀandꢀ"0"ꢀasꢀallꢀ"1".ꢀItꢀrequiresꢀsixꢀcommandꢀcyclesꢀtoꢀis-
sue.ꢀTheꢀfirstꢀtwoꢀcyclesꢀareꢀ"unlockꢀcycles",ꢀtheꢀthirdꢀoneꢀisꢀaꢀconfigurationꢀcycle,ꢀtheꢀfourthꢀandꢀfifthꢀareꢀalsoꢀ
"unlockꢀcycles"ꢀandꢀtheꢀsixthꢀcycleꢀisꢀtheꢀsectorꢀeraseꢀcommand.ꢀAfterꢀtheꢀsectorꢀeraseꢀcommandꢀsequenceꢀisꢀ
issued,ꢀthereꢀisꢀaꢀtime-outꢀperiodꢀofꢀ50usꢀcountedꢀinternally.ꢀDuringꢀtheꢀtime-outꢀperiod,ꢀadditionalꢀsectorꢀad-
dressꢀandꢀsectorꢀeraseꢀcommandꢀcanꢀbeꢀwrittenꢀmultiply.ꢀOnceꢀuserꢀentersꢀanotherꢀsectorꢀeraseꢀcommand,ꢀtheꢀ
time-outꢀperiodꢀofꢀ50usꢀisꢀrecounted.ꢀIfꢀuserꢀentersꢀanyꢀcommandꢀotherꢀthanꢀsectorꢀeraseꢀorꢀeraseꢀsuspendꢀdur-
ingꢀtime-outꢀperiod,ꢀtheꢀeraseꢀcommandꢀwouldꢀbeꢀabortedꢀandꢀtheꢀdeviceꢀisꢀresetꢀtoꢀreadꢀarrayꢀcondition.ꢀTheꢀ
numberꢀofꢀsectorsꢀcouldꢀbeꢀfromꢀoneꢀsectorꢀtoꢀallꢀsectors.ꢀAfterꢀtime-outꢀperiodꢀpassingꢀby,ꢀadditionalꢀeraseꢀcom-
mandꢀisꢀnotꢀacceptedꢀandꢀeraseꢀembeddedꢀoperationꢀbegins.
Duringꢀsectorꢀerasing,ꢀallꢀcommandsꢀwillꢀnotꢀbeꢀacceptedꢀexceptꢀhardwareꢀresetꢀandꢀeraseꢀsuspendꢀandꢀuserꢀ
canꢀcheckꢀtheꢀstatusꢀasꢀchipꢀerase.
Whenꢀtheꢀembeddedꢀeraseꢀoperationꢀisꢀonꢀgoing,ꢀuserꢀcanꢀconfirmꢀifꢀtheꢀembeddedꢀoperationꢀisꢀfinishedꢀorꢀnotꢀ
byꢀtheꢀfollowingꢀmethods:
Status
Time-outꢀperiod
Inꢀprogress
Q7
0
Q6
Q5
0
Q3
0
Q2
Toggling
Togging
Toggling
Toggling
1
0
0
1
Finished
1
Stopꢀtoggling
Toggling
0
1
Exceedꢀtimeꢀlimit
0
1
1
Toggling
*1:ꢀTheꢀstatusꢀQ3ꢀisꢀtheꢀtime-outꢀperiodꢀindicator.ꢀWhenꢀQ3=0,ꢀtheꢀdeviceꢀisꢀinꢀtime-outꢀperiodꢀandꢀisꢀacceptibleꢀ
toꢀanotherꢀsectorꢀaddressꢀtoꢀbeꢀerased.ꢀWhenꢀQ3=1,ꢀtheꢀdeviceꢀisꢀinꢀeraseꢀoperationꢀandꢀonlyꢀeraseꢀsuspendꢀisꢀ
valid.
P/N:PM1201
REV. 2.2, DEC. 04, 2012
13
MX29F040C
SECTOR ERASE SUSPEND
Duringꢀsectorꢀerasure,ꢀsectorꢀeraseꢀsuspendꢀisꢀtheꢀonlyꢀvalidꢀcommand.ꢀIfꢀuserꢀissueꢀeraseꢀsuspendꢀcommandꢀ
inꢀtheꢀtime-outꢀperiodꢀofꢀsectorꢀerasure,ꢀdeviceꢀtime-outꢀperiodꢀwillꢀbeꢀoverꢀimmediatelyꢀandꢀtheꢀdeviceꢀwillꢀgoꢀ
backꢀtoꢀerase-suspendedꢀreadꢀarrayꢀmode.ꢀIfꢀuserꢀissueꢀeraseꢀsuspendꢀcommandꢀduringꢀtheꢀsectorꢀeraseꢀisꢀbe-
ingꢀoperated,ꢀdeviceꢀwillꢀsuspendꢀtheꢀongoingꢀeraseꢀoperation,ꢀandꢀafterꢀtheꢀTready1(<=20us)ꢀsuspendꢀfinishesꢀ
andꢀtheꢀdeviceꢀwillꢀenterꢀerase-suspendedꢀreadꢀarrayꢀmode.ꢀUserꢀcanꢀjudgeꢀifꢀtheꢀdeviceꢀhasꢀfinishedꢀeraseꢀsus-
pendꢀthroughꢀQ6,ꢀandꢀQ7.
Afterꢀdeviceꢀhasꢀenteredꢀerase-suspendedꢀreadꢀarrayꢀmode,ꢀuserꢀcanꢀreadꢀotherꢀsectorsꢀnotꢀatꢀeraseꢀsuspendꢀ
byꢀtheꢀspeedꢀofꢀTaa;ꢀwhileꢀreadingꢀtheꢀsectorꢀinꢀerase-suspendꢀmode,ꢀdeviceꢀwillꢀoutputꢀitsꢀstatus.ꢀUserꢀcanꢀuseꢀ
Q6ꢀandꢀQ2ꢀtoꢀjudgeꢀtheꢀsectorꢀisꢀerasingꢀorꢀtheꢀeraseꢀisꢀsuspended.
Status
Q7
1
Q6
Noꢀtoggle
Data
Q5
0
Q3
N/A
Data
N/A
Q2
toggle
Data
N/A
Eraseꢀsuspendꢀreadꢀinꢀeraseꢀsuspendedꢀsector
Eraseꢀsuspendꢀreadꢀinꢀnon-eraseꢀsuspendedꢀsector
Eraseꢀsuspendꢀprogramꢀinꢀnon-eraseꢀsuspendedꢀsector
Data
Q7#
Data
0
Toggle
Whenꢀtheꢀdeviceꢀhasꢀsuspendedꢀerasing,ꢀuserꢀcanꢀexecuteꢀtheꢀcommandꢀsetsꢀexceptꢀsectorꢀeraseꢀandꢀchipꢀ
erase,ꢀsuchꢀasꢀreadꢀsiliconꢀID,ꢀprogram,ꢀandꢀeraseꢀresume.ꢀ
SECTOR ERASE RESUME
Sectorꢀeraseꢀresumeꢀcommandꢀisꢀvalidꢀonlyꢀwhenꢀtheꢀdeviceꢀisꢀinꢀeraseꢀsuspendꢀstate.ꢀAfterꢀeraseꢀresume,ꢀuserꢀ
canꢀissueꢀanotherꢀeraseꢀsuspendꢀcommand,ꢀbutꢀthereꢀshouldꢀbeꢀaꢀ400usꢀintervalꢀbetweenꢀeraseꢀresumeꢀandꢀ
theꢀnextꢀeraseꢀsuspend.ꢀIfꢀuserꢀissueꢀinfiniteꢀsuspend-resumeꢀloop,ꢀorꢀsuspend-resumeꢀexceedsꢀ1024ꢀtimes,ꢀtheꢀ
timeꢀforꢀerasingꢀwillꢀincrease.
P/N:PM1201
REV. 2.2, DEC. 04, 2012
14
MX29F040C
ABSOLUTE MAXIMUM STRESS RATINGS
SurroundingꢀTemperatureꢀwithꢀBiasꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ..ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ-65oCꢀtoꢀ+125oC
StorageꢀTemperatureꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ..ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ..ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀꢀ.ꢀ.ꢀ.ꢀ..ꢀ.ꢀ.ꢀꢀ.ꢀ.ꢀ-65oCꢀtoꢀ+150oC
VoltageꢀRange
ꢀ Vccꢀꢀꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ..ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.-0.5Vꢀtoꢀ+7.0ꢀV
ꢀ A9ꢀꢀꢀꢀꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ..ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.-0.5Vꢀtoꢀ+13.5ꢀV
ꢀ Theꢀotherꢀpins.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀꢀ.ꢀ.ꢀ..ꢀ.-0.5VꢀtoꢀVccꢀ+0.7ꢀV
OutputꢀShortꢀCircuitꢀCurrentꢀ(lessꢀthanꢀoneꢀsecond)ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀꢀꢀ.ꢀ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200ꢀmA
Note:
1.ꢀMinimumꢀvoltageꢀmayꢀundershootꢀtoꢀ-2Vꢀduringꢀtransitionꢀandꢀforꢀlessꢀthanꢀ20nsꢀduringꢀtransitions.
2.ꢀMaximumꢀvoltageꢀmayꢀovershootꢀtoꢀVccꢀ+2Vꢀduringꢀduringꢀtransitionꢀandꢀforꢀlessꢀthanꢀ20nsꢀduringꢀtransitions.
OPERATING TEMPERATURE AND VOLTAGE
Commercial (C) Grade
Aꢀ
SurroundingꢀTemperatureꢀ(T ).ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ
0 Cꢀtoꢀ+70 C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °
°
Industrial (I) Grade
Aꢀ
SurroundingꢀTemperatureꢀ(T ).ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ
. . . . . . . -40 Cꢀtoꢀ+85 C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
°
°
CC
V
Supply Voltages
CC
V
range.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ...ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ.ꢀ
ꢀ+4.5Vꢀtoꢀ5.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
P/N:PM1201
REV. 2.2, DEC. 04, 2012
15
MX29F040C
DC CHARACTERISTICS
Symbol Description
Min
Typ
Max
Remark
Iilk
Iolk
Icr1
Icr2
Icw
InputꢀLeak
1.0uA
10uA
±
OutputꢀLeak
ReadꢀCurrent(10MHz)
ReadꢀCurrent(5MHz)
WriteꢀCurrent
50mA CE#=Vil,ꢀOE#=Vih
40mA CE#=Vil,ꢀOE#=Vih
15mA
1uA
30mA CE#=Vil,ꢀOE#=Vih,ꢀWE#=ViL
Isb1 StandbyꢀCurrentꢀ(TTL)
1mA Vcc=Vccꢀmax,ꢀCE#=Vihꢀ
otherꢀpinꢀdisable
Isb2 Standbyꢀcurrentꢀ(CMOS)
5uA
Vcc=Vccꢀmax,ꢀCE#=vccꢀ+0.3V,ꢀ
otherꢀpinꢀdisable
Vil
Vih
Vhv
Vol
InputꢀLowꢀVoltage
-0.3V
0.7xVcc
11.5V
0.8V
Vcc+0.3V
12.5V
InputꢀHighꢀVoltage
VeryꢀHighꢀVoltageꢀforꢀꢀAutoꢀSelect
OutputꢀLowꢀVoltage
12V
0.45V Iol=2.1mA,ꢀVcc=Vccꢀmin
Ioh1=-2mA
Voh1 OuputꢀHighꢀVoltageꢀ(TTL)
Voh2 OuputꢀHighꢀVoltageꢀ(CMOS)
2.4V
Vcc-0.4V
Ioh2=-100uA
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16
MX29F040C
SWITCHING TEST CIRCUITS
Vcc
R2
TESTED DEVICE
Vcc
0.1uF
CL
R1
DIODES=IN3064
OR EQUIVALENT
R1=6.2Kꢀohm
R2=2.7Kꢀohm
TestꢀConditionꢀ
OutputꢀLoadꢀ:ꢀ1ꢀTTLꢀgate
OutputꢀLoadꢀCapacitance,ꢀCL:ꢀ100PFꢀforꢀ90ns,ꢀ30PFꢀforꢀ70ns
Rise/FallꢀTimesꢀ:ꢀ10nS
Input/Outputꢀreferenceꢀlevels:ꢀ0.8V,ꢀ2.0V
SWITCHING TEST WAVEFORMS
0.7xVCC
2.0V
2.0V
TEST POINTS
0.8V
0.8V
0.45V
INPUT
OUTPUT
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MX29F040C
AC CHARACTERISTICS
Symbol Description
Speed Option -70/90
Unit
Min
Typ
Max
Taa Validꢀdataꢀoutputꢀafterꢀaddressꢀ
Tce ValidꢀdataꢀoutputꢀafterꢀCE#ꢀlow
Toe ValidꢀdataꢀoutputꢀafterꢀOE#ꢀlow
70/90
ns
ns
ns
ns
ns
70/90
30/35
20
Tdf
DataꢀoutputꢀfloatingꢀafterꢀOE#ꢀhighꢀorꢀCE#ꢀhigh
Toh OutputꢀholdꢀtimeꢀfromꢀtheꢀearliestꢀrisingꢀedgeꢀofꢀAddrss,ꢀ
CE#,ꢀOE#
0
Trc
Readꢀperiodꢀtime
70/90
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
us
sec
sec
us
Twp WE#ꢀpulseꢀwidth
Twph WE#ꢀpulseꢀwithꢀhigh
Tghwl Readꢀrecoverꢀtimeꢀbeforeꢀwrite
Twc Writeꢀperiodꢀtime
30
0
70/90
70/90
0
Tcwc Commandꢀwriteꢀperiodꢀtime
Tas Addressꢀsetupꢀtime
Tah Addressꢀholdꢀtime
Tds Dataꢀsetupꢀtime
45
30/45
0
Tdh Dataꢀholdꢀtime
Tcs CE#ꢀSetupꢀtime
0
Tch CE#ꢀholdꢀtime
0
Toes OE#ꢀsetupꢀtime
0
Tcep CE#ꢀpulseꢀwidth
35/45
20
Tceph CE#ꢀpulseꢀwidthꢀhigh
Tavt Programꢀoperation
Taetc ChipꢀEraseꢀOperation
Taetb SectorꢀEraseꢀOperation
Tbal SectorꢀAddressꢀholdꢀtime
9
4
300
32
8
0.7
50
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MX29F040C
Figure 1. COMMAND WRITE OPERATION
Tcwc
Vih
CE#
Vil
Tch
Tcs
Vih
WE#
Vil
Twph
Toes
Twp
Vih
Vil
OE#
Vih
Vil
Addresses
VA
Tah
Tas
Tdh
Tds
Vih
Vil
Data
DIN
VA: Valid Address
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MX29F040C
READ/RESET OPERATION
Figure 2. READ TIMING WAVEFORMS
Tce
Vih
CE#
Vil
Vih
WE#
Vil
Tdf
Toe
Vih
OE#
Vil
Toh
Taa
Trc
Vih
ADD Valid
Addresses
Vil
HIGH Z
HIGH Z
Voh
Vol
Outputs
DATA Valid
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MX29F040C
ERASE/PROGRAM OPERATION
Figure 3. AUTOMATIC CHIP ERASE TIMING WAVEFORM
CE#
Tch
Tavt
WE#
Tcs
OE#
Last 2 Program Command Cycle
Last 2 Read Status Cycle
VA
Tah
Tas
VA
555h
PA
Address
Tdh
Tds
Status
A0h
PD
DOUT
Data
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MX29F040C
Figure 4. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 80H Address 555H
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 10H Address 555H
Data# Polling Algorithm or
Toggle Bit Algorithm
NO
Data=FFh ?
YES
Auto Chip Erase Completed
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MX29F040C
Figure 5. AUTOMATIC SECTOR ERASE TIMING WAVEFORM
Read Status
CE#
Tch
Taetb
WE#
Tcs
OE#
Tbal
Last 2 Erase Command Cycle
Twc
Tas
Sector
Sector
Sector
VA
VA
2AAh
Address
Data
Address 0
Address 1
Address n
Tah
Tds Tdh
In
Progress
Complete
55h
30h
30h
30h
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MX29F040C
Figure 6. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 80H Address 555H
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 30H Sector Address
NO
Last Sector
to Erase
YES
Data# Polling Algorithm or
Toggle Bit Algorithm
NO
Data=FFh
YES
Auto Sector Erase Completed
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MX29F040C
Figure 7. ERASE SUSPEND/RESUME FLOWCHART
START
Write Data B0H
ERASE SUSPEND
NO
Toggle Bit checking Q6
not toggled
YES
Read Array or
Program
Reading or
NO
Programming End
YES
Write Data 30H
ERASE RESUME
Continue Erase
Another
NO
Erase Suspend ?
YES
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MX29F040C
Figure 8. AUTOMATIC PROGRAM TIMING WAVEFORMS
CE#
Tch
Tavt
WE#
Tcs
OE#
Last 2 Program Command Cycle
Last 2 Read Status Cycle
Tah
Tas
VA
VA
555h
PA
Address
Tdh
Tds
Status
A0h
PD
DOUT
Data
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MX29F040C
Figure 9. CE# CONTROLLED WRITE TIMING WAVEFORM
WE#
Tavt or Taetb
Tcep
CE#
Tceph
Tghwl
OE#
Tah
Tas
VA
VA
555h
PA
Address
Tdh
Tds
Status
A0h
PD
DOUT
Data
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MX29F040C
Figure 10. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data A0H Address 555H
Write Program Data/Address
Data# Polling Algorithm or
Toggle Bit Algorithm
next address
No
Read Again Data:
Program Data?
YES
No
Last Byte to be
Programed
YES
Auto Program Completed
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MX29F040C
Figure 11. SILICON ID READ TIMING WAVEFORM
Vih
CE#
Vil
Tce
Vih
WE#
Vil
Toe
Vih
OE#
Vil
Tdf
Toh
Toh
Vhv
Vih
A9
Vil
Vih
A0
Vil
Taa
Taa
Vih
A1
Vil
Vih
ADD
Vil
Vih
DATA
Q0-Q7
DATA OUT
C2H
DATA OUT
A4H
Vil
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MX29F040C
WRITE OPERATION STATUS
Figure 12. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tce
CE#
Tch
WE#
Toe
OE#
Tdf
VA
VA
Address
Taa
Toh
High Z
High Z
Complement
Complement
Status Data
True
True
Valid Data
Valid Data
Q7
Q0-Q6
Status Data
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30
1.ꢀ
ꢀꢀꢀꢀ
Forꢀprogramming,ꢀvalidꢀaddressꢀmeasꢀprogramꢀaddress.
Forꢀerasing,ꢀvalidꢀaddressꢀmeasꢀeraseꢀsectorsꢀaddress.
MX29F040C
Figure 13. DATA# POLLING ALGORITHM
Start
Read Q7~Q0 at valid address
(Note 1)
No
Q7 = Data# ?
Yes
No
Q5 = 1 ?
Yes
Read Q7~Q0 at valid address
No
Q7 = Data# ?
(Note 2)
Yes
FAIL
Pass
Notes:
2.ꢀQ7ꢀshouldꢀbeꢀrecheckedꢀevenꢀQ5="1"ꢀbecauseꢀQ7ꢀmayꢀchangeꢀsimultaneouslyꢀwithꢀQ5.
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MX29F040C
Figure 14. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tce
CE#
Tch
WE#
OE#
Toe
Tdf
VA
VA
VA
VA
Address
Q6/Q2
Taa
Toh
Valid Status
(second read)
Valid Status
(first read)
Valid Data
Valid Data
(stops toggling)
Notes:
1. VA : Valid Address
2. CE# must be toggled when toggle bit is toggling.
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MX29F040C
Figure 15. TOGGLE BIT ALGORITHM
Start
Read Q7-Q0 Twice
(Note1)
NO
Q6 Toggle ?
YES
NO
Q5 = 1?
YES
Read Q7~Q0 Twice
(Note1, 2)
NO
Q6 Toggle ?
YES
Program/Erase fail
Write Reset CMD
Program/Erase Complete
Notes:
1.ꢀReadꢀtoggleꢀbitꢀtwiceꢀtoꢀdetermineꢀwhetherꢀorꢀnotꢀitꢀisꢀtoggling.
2.ꢀRecheckꢀtoggleꢀbitꢀbecauseꢀitꢀmayꢀstopꢀtogglingꢀasꢀQ5ꢀchangesꢀtoꢀ"1".
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MX29F040C
RECOMMENDED OPERATING CONDITIONS
At Device Power-Up
ACꢀtimingꢀillustratedꢀinꢀ"Figure A. AC Timing at Device Power-Up"ꢀisꢀrecommendedꢀforꢀtheꢀsupplyꢀvoltagesꢀandꢀ
theꢀcontrolꢀsignalsꢀatꢀdeviceꢀpower-up.ꢀIfꢀtheꢀtimingꢀinꢀtheꢀfigureꢀisꢀignored,ꢀtheꢀdeviceꢀmayꢀnotꢀoperateꢀcorrectly.
Vcc(min)
Vcc
GND
Tvr
Tf
Tce
Tr
Vih
Vil
CE#
WE#
OE#
Vih
Vil
Tf
Toe
Tr
Vih
Vil
Taa
Tr or Tf
Tr or Tf
Vih
Vil
Valid
Address
ADDRESS
DATA
Voh
Vol
High Z
Valid
Ouput
Figure A. AC Timing at Device Power-Up
Symbol
Parameter
VccꢀRiseꢀTime
Min.
Max.
500000
Unit
Tvr
Tr
20
uS/V
uS/V
uS/V
InputꢀSignalꢀRiseꢀTime
InputꢀSignalꢀFallꢀTime
20
20
Tf
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MX29F040C
ERASE AND PROGRAMMING PERFORMANCE
PARAMETER
LIMITS
MIN.
TYP.
9
MAX.
300
8
UNITS
us
ByteꢀProgrammingꢀTime
SectorꢀEraseꢀTime
0.7
4
sec
ChipꢀEraseꢀTime
32
sec
ChipꢀProgrammingꢀTime
Erase/ProgramꢀCycles
4.5
ꢀ13.5
sec
100,000
Cycles
Note:ꢀ 1.ꢀTypicalꢀconditionꢀmeansꢀ25 C, 5V.
°
ꢀ
2.ꢀMaximumꢀconditionꢀmeansꢀ90 C,ꢀ4.5V,ꢀ100Kꢀcycles.
°
DATA RETENTION
PARAMETER
Condition
Min.
Max.
UNIT
Dataꢀretention
55˚C
20
years
LATCH-UP CHARACTERISTICS
MIN.
-1.0V
-1.0V
MAX.
13.5V
InputꢀVoltageꢀdifferenceꢀwithꢀGNDꢀonꢀallꢀpinsꢀexceptꢀI/Oꢀpins
InputꢀVoltageꢀdifferenceꢀwithꢀGNDꢀonꢀallꢀI/Oꢀpins
VccꢀCurrent
VCCꢀ+ꢀ1.0V
+100mA
-100mA
IncludesꢀallꢀpinsꢀexceptꢀVCC.ꢀꢀTestꢀconditions:ꢀVCCꢀ=ꢀ5V,ꢀoneꢀpinꢀperꢀtesting
TSOP AND PLCC PIN CAPACITANCE
Parameter Symbol
Parameter Description
ControlꢀPinꢀCapacitance
OutputꢀCapacitance
InputꢀCapacitance
Test Set
VIN=0
TYP
MAX
12
UNIT
CIN2
COUT
CIN
pF
pF
pF
VOUT=0
VIN=0
12
8
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MX29F040C
ORDERING INFORMATION
PART NO.
Access
Operating
Current
Standby
Current
Temperature PACKAGE
Remark
Time (ns)
Range
MAX.(mA)
MAX.(uA)
MX29F040CQC-70G
MX29F040CQC-90G
MX29F040CTC-70G
70
90
70
30
30
30
5
5
5
0oC~70oC
0oC~70oC
0oC~70oC
32ꢀPinꢀPLCC
32ꢀPinꢀPLCC
32ꢀPinꢀTSOP
(NormalꢀType)
MX29F040CTC-90G
90
30
5
0oC~70oC
32ꢀPinꢀTSOP
(NormalꢀType)
MX29F040CQI-70G
MX29F040CQI-90G
MX29F040CTI-70G
70
90
70
30
30
30
5
5
5
-40oC~85oC 32ꢀPinꢀPLCC
-40oC~85oC 32ꢀPinꢀPLCC
-40oC~85oC 32ꢀPinꢀTSOP
(NormalꢀType)
MX29F040CTI-90G
90
30
5
-40oC~85oC 32ꢀPinꢀTSOP
(NormalꢀType)
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MX29F040C
PART NAME DESCRIPTION
MX 29 F 040 C T I
70 G
OPTION:
G: RoHS Compliant package
blank: normal
SPEED:
70:70ns
90: 90ns
TEMPERATURE RANGE:
I: Industrial (-40C to 85C)
PACKAGE:
Q: PLCC
T: TSOP
REVISION:
C
DENSITY & MODE:
040: 4M, x8 Equal Sector
TYPE:
F: 5V
DEVICE:
29: Flash
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MX29F040C
PACKAGE INFORMATION
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MX29F040C
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39
1.6ꢀ
1.7ꢀ
1.8ꢀ
ꢀ
1.9ꢀ
ꢀ
1.ꢀAddedꢀnoteꢀ1ꢀintoꢀ
1.ꢀModifiedꢀ
P8ꢀ
JAN/17/2008
FEB/21/2008
SEP/15/2008
MX29F040C
REVISION HISTORY
Revision No. Description
Page
P1ꢀ
All
Date
DEC/20/2005
1.0ꢀ
1.ꢀRemovedꢀ"Preliminary"ꢀtitleꢀ
ꢀ
ꢀ
2.ꢀRemovedꢀcommercialꢀgradeꢀ
3.ꢀAddedꢀaccessꢀtime:ꢀ55ns;ꢀRemovedꢀaccessꢀtime:ꢀ120nsꢀ
1.ꢀRemovedꢀaccessꢀtime:ꢀ55nsꢀ
ꢀ
All
1.1ꢀ
ꢀ
P1,13,15,16ꢀ JUN/21/2006
P29,30
ꢀ
ꢀ
2.ꢀRemovedꢀsectorꢀprotect/chipꢀunprotectꢀfeatureꢀ
ꢀ
P1,5~7,10,12ꢀ
P26~29
ꢀ
3.ꢀAddedꢀdata#ꢀpolling,ꢀtoggleꢀbitꢀalgorithmꢀ
1.ꢀDataSheetꢀformatꢀchangedꢀ
1.ꢀDataꢀmodificationꢀ
1.ꢀAddedꢀstatementꢀꢀ
1.ꢀRemovedꢀPDIPꢀpackageꢀoptionꢀ
2.ꢀAddedꢀrecommedationꢀforꢀnonꢀRoHSꢀcompliantꢀdevicesꢀ
P20,21
Allꢀ
Allꢀ
P40ꢀ
P1,2,34,35ꢀ JAN/18/2007
P1,34
1.2ꢀ
1.3ꢀ
1.4ꢀ
1.5ꢀ
ꢀ
AUG/15/2006
AUG/17/2006
NOV/06/2006
"TABLE 3. MX29F040C COMMAND DEFINITIONS"
"Figure 9. CE# CONTROLLED WRITE TIMING WAVEFORM"
ꢀP25ꢀ
1.ꢀRemovedꢀnonꢀPb-freeꢀEPNsꢀ
2.ꢀAddedꢀC-gradeꢀEPNsꢀ
1.ꢀModifiedꢀFigureꢀ10.ꢀCE#ꢀControlledꢀWriteꢀTimingꢀWaveformꢀ
ꢀꢀꢀꢀ(Changedꢀ"Twhwh1ꢀorꢀTwhwh2"ꢀintoꢀ"TavtꢀorꢀTaetb")
P1,34,35ꢀ
P34,35
P25ꢀ
MAR/09/2009
MAY/26/2009
"Figure 12. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)"
Modifiedꢀ
2.
ꢀP28ꢀ
P13ꢀ
2.0ꢀ
ꢀ
1.ꢀAddedꢀNoteꢀofꢀmaximum/minimumꢀvoltageꢀduringꢀtransitionꢀ
ꢀꢀꢀꢀintoꢀDCꢀcharacteristics
ꢀ
ꢀ
2.ꢀAddedꢀDC:ꢀIcwꢀspecꢀandꢀmodifyꢀMax.ꢀIcr1ꢀ
3.ꢀAddedꢀAC:ꢀTwp/Twph/Tghwlꢀspecꢀ
P14
P16
2.1ꢀ
1.ꢀAddedꢀ"DATA RETENTION"ꢀtableꢀ
P33ꢀ
JUN/30/2009
ꢀ
2.ꢀModifiedꢀtheꢀsectorꢀeraseꢀtimeꢀmaxꢀfromꢀ15sꢀtoꢀ8sꢀ
1. ModifiedꢀdescriptionꢀforꢀRoHSꢀcomplianceꢀ
2.ꢀModifiedꢀOutputꢀLoadꢀCapatitanceꢀꢀ
P16,33ꢀ
P1,36,37ꢀ
P17
ꢀ
2.2
ꢀ
DEC/04/2012
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40
MX29F040C
Exceptꢀforꢀcustomizedꢀproductsꢀwhichꢀhasꢀbeenꢀexpresslyꢀidentifiedꢀinꢀtheꢀapplicableꢀagreement,ꢀMacronix'sꢀ
productsꢀareꢀdesigned,ꢀdeveloped,ꢀand/orꢀmanufacturedꢀforꢀordinaryꢀbusiness,ꢀindustrial,ꢀpersonal,ꢀand/orꢀ
householdꢀapplicationsꢀonly,ꢀandꢀnotꢀforꢀuseꢀinꢀanyꢀapplicationsꢀwhichꢀmay,ꢀdirectlyꢀorꢀindirectly,ꢀcauseꢀdeath,ꢀ
personalꢀinjury,ꢀorꢀsevereꢀpropertyꢀdamages.ꢀInꢀtheꢀeventꢀMacronixꢀproductsꢀareꢀusedꢀinꢀcontradictedꢀtoꢀtheirꢀ
targetꢀusageꢀabove,ꢀtheꢀbuyerꢀshallꢀtakeꢀanyꢀandꢀallꢀactionsꢀtoꢀensureꢀsaidꢀMacronix'sꢀproductꢀqualifiedꢀforꢀitsꢀ
actualꢀuseꢀinꢀaccordanceꢀwithꢀtheꢀapplicableꢀlawsꢀandꢀregulations;ꢀandꢀMacronixꢀasꢀwellꢀasꢀit’sꢀsuppliersꢀand/orꢀ
distributorsꢀshallꢀbeꢀreleasedꢀfromꢀanyꢀandꢀallꢀliabilityꢀarisenꢀtherefrom.ꢀ
Copyright©ꢀMacronixꢀInternationalꢀCo.,ꢀLtd.ꢀ2006~2012.ꢀAllꢀrightsꢀreserved,ꢀincludingꢀtheꢀtrademarksꢀandꢀ
tradenameꢀthereof,ꢀsuchꢀasꢀMacronix,ꢀMXIC,ꢀMXICꢀLogo,ꢀMXꢀLogo,ꢀIntegratedꢀSolutionsꢀProvider,ꢀNBit,ꢀNbit,ꢀ
NBiit,ꢀMacronixꢀNBit,ꢀeLiteFlash,ꢀHybridNVM,ꢀHybridFlash,ꢀXtraROM,ꢀPhines,ꢀKHꢀLogo,ꢀBE-SONOS,ꢀKSMC,ꢀ
Kingtech,ꢀMXSMIO,ꢀMacronixꢀvEE,ꢀMacronixꢀMAP,ꢀRichꢀAudio,ꢀRichꢀBook,ꢀRichꢀTV,ꢀandꢀFitCAM.ꢀTheꢀnamesꢀ
andꢀbrandsꢀofꢀthirdꢀpartyꢀreferredꢀtheretoꢀ(ifꢀany)ꢀareꢀforꢀidentificationꢀpurposesꢀonly.
Forꢀtheꢀcontactꢀandꢀorderꢀinformation,ꢀpleaseꢀvisitꢀMacronix’sꢀWebꢀsiteꢀat:ꢀhttp://www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
41
相关型号：
MX29F040CTC-90G
Flash, 512KX8, 90ns, PDSO32, 8 X 20 MM, ROHS COMPLIANT, PLASTIC, MO-142, TSOP1-32
Macronix
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