MX29F800CTXEI-70G [Macronix]
Flash, 512KX16, 70ns, PBGA48, 6 X 8 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MO-219, TFBGA-48;
| 型号： | MX29F800CTXEI-70G |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | Flash, 512KX16, 70ns, PBGA48, 6 X 8 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MO-219, TFBGA-48 内存集成电路 |
| 文件： | 总48页 (文件大小：811K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX29F800C T/B
8M-BIT [1024K x 8 / 512K x 16] SINGLE VOLTAGE
5V ONLY FLASH MEMORY
FEATURES
GENERAL FEATURES
•ꢀ SingleꢀPowerꢀSupplyꢀOperation
ꢀ -ꢀ4.5ꢀtoꢀ5.5ꢀvoltꢀforꢀread,ꢀerase,ꢀandꢀprogramꢀoperations
•ꢀ 1,048,576ꢀxꢀ8ꢀ/ꢀ524,288ꢀxꢀ16ꢀswitchable
•ꢀ BootꢀSectorꢀArchitecture
ꢀ -ꢀTꢀ=ꢀTopꢀBootꢀSector
ꢀ -ꢀBꢀ=ꢀBottomꢀBootꢀSector
•ꢀ SectorꢀStructure
ꢀ -ꢀ16K-Byteꢀxꢀ1,ꢀ8K-Byteꢀxꢀ2,ꢀ32K-Byteꢀxꢀ1,ꢀandꢀ64K-Byteꢀxꢀ15
•ꢀ Sectorꢀprotection
ꢀ -ꢀHardwareꢀmethodꢀtoꢀdisableꢀanyꢀcombinationꢀofꢀsectorsꢀfromꢀprogramꢀorꢀeraseꢀoperations
ꢀ -ꢀTemporaryꢀsectorꢀunprotectedꢀallowsꢀcodeꢀchangesꢀinꢀpreviouslyꢀlockedꢀsectors
•ꢀ Latch-upꢀprotectedꢀtoꢀ100mAꢀfromꢀ-1VꢀtoꢀVccꢀ+ꢀ1V
•ꢀ CompatibleꢀwithꢀJEDECꢀstandard
ꢀ -ꢀPinoutꢀandꢀsoftwareꢀcompatibleꢀtoꢀsingleꢀpowerꢀsupplyꢀFlash
PERFORMANCE
•ꢀ HighꢀPerformance
ꢀ -ꢀAccessꢀtime:ꢀ70ns
ꢀ -ꢀByte/Wordꢀprogramꢀtime:ꢀ9us/11usꢀ(typical)
ꢀ -ꢀEraseꢀtime:ꢀ0.7s/sector,ꢀ8s/chipꢀ(typical)
•ꢀ LowꢀPowerꢀConsumption
ꢀ -ꢀLowꢀactiveꢀreadꢀcurrent:ꢀ40mAꢀ(maximum)ꢀatꢀ5MHz
ꢀ -ꢀLowꢀstandbyꢀcurrent:ꢀ1uAꢀ(typical)
•ꢀ Minimumꢀ100,000ꢀerase/programꢀcycle
•ꢀ 20ꢀyearsꢀdataꢀretention
SOFTWARE FEATURES
•ꢀ EraseꢀSuspend/ꢀEraseꢀResume
ꢀ -ꢀSuspendsꢀsectorꢀeraseꢀoperationꢀtoꢀreadꢀdataꢀfromꢀorꢀprogramꢀdataꢀtoꢀanotherꢀsectorꢀwhichꢀisꢀnotꢀbeingꢀ
erased
•ꢀ StatusꢀReply
ꢀ -ꢀData#ꢀPollingꢀ&ꢀToggleꢀbitsꢀprovideꢀdetectionꢀofꢀprogramꢀandꢀeraseꢀoperationꢀcompletion
HARDWARE FEATURES
•ꢀ Ready/Busy#ꢀ(RY/BY#)ꢀOutput
ꢀ -ꢀProvidesꢀaꢀhardwareꢀmethodꢀofꢀdetectingꢀprogramꢀandꢀeraseꢀoperationꢀcompletion
•ꢀ HardwareꢀResetꢀ(RESET#)ꢀInput
ꢀ -ꢀProvidesꢀaꢀhardwareꢀmethodꢀtoꢀresetꢀtheꢀinternalꢀstateꢀmachineꢀtoꢀreadꢀmode
PACKAGE
•ꢀ 44-PinꢀSOP
•ꢀ 48-PinꢀTSOP
•ꢀ 48-BallꢀLFBGAꢀ(6x8mm)
•ꢀ All devices are RoHS Compliant
•ꢀ All non RoHS Compliant devices are not recommeded for new design in
P/N:PM1493
Rev. 1.3, December 13, 2017
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MX29F800C T/B
PIN CONFIGURATIONS
44 SOP(500mil)
RESET#
WE#
A8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
RY/BY#
A18
A17
A7
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A9
A10
A11
A12
A13
A14
A15
A16
BYTE#
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
A6
A5
A4
A3
A2
A1
A0
CE#
GND
OE#
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
48 TSOP(TYPE I) (12mm x 20mm)
A15
A14
A13
A12
A11
A10
A9
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE#
GND
Q15/A-1
Q7
2
3
4
5
6
Q14
Q6
7
A8
8
Q13
Q5
NC
9
NC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Q12
Q4
WE#
RESET#
NC
VCC
Q11
Q3
MX29F800C T/B
NC
RY/BY#
A18
A17
A7
Q10
Q2
Q9
Q1
A6
Q8
A5
Q0
A4
OE#
GND
CE#
A0
A3
A2
A1
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
48-Ball LFBGA (6x8mm)
Q15/
A-1
GND
A13
6
A12
A8
A14
A15
A16
BYTE#
A9
5
A10
NC
Q7
Q5
Q14
Q12
Q13
Q6
Q4
A11
NC
RE-
SET#
WE#
VCC
4
3
2
1
RY/
BY#
NC
A17
A4
A18
A6
NC
A5
A1
Q2
Q0
Q10
Q8
Q11
Q9
Q3
Q1
A7
A3
A2
C
GND
A0
E
CE#
F
OE#
G
A
B
D
H
PIN DESCRIPTION
LOGIC SYMBOL
SYMBOL
PIN NAME
19
A0~A18 AddressꢀInput
16 or 8
A0-A18
Q0-Q15
Q0~Q14 DataꢀInput/Output
Q15/A-1 Q15(Wordꢀmode)/LSBꢀaddr(Byteꢀmode)
(A-1)
CE#
WE#
ChipꢀEnableꢀInput
WriteꢀEnableꢀInput
CE#
BYTE#
Word/ByteꢀSelectionꢀinput
OE#
RESET# HardwareꢀResetꢀPin/SectorꢀProtectꢀ
Unlock
WE#
OE#
OutputꢀEnableꢀInput
RESET#
BYTE#
RY/BY# Ready/BusyꢀOutput
RY/BY#
VCC
GND
PowerꢀSupplyꢀPinꢀ(+5V)
GroundꢀPin
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MX29F800C T/B
BLOCK DIAGRAM
WRITE
CE#
OE#
CONTROL
INPUT
PROGRAM/ERASE
STATE
MACHINE
(WSM)
WE#
HIGH VOLTAGE
LOGIC
RESET#
BYTE#
STATE
FLASH
ARRAY
ADDRESS
LATCH
REGISTER
ARRAY
A0-AM
AND
SOURCE
HV
BUFFER
Y-PASS GATE
COMMAND
DATA
DECODER
PGM
SENSE
DATA
HV
AMPLIFIER
COMMAND
DATA LATCH
PROGRAM
DATA LATCH
Q0-Q15/A-1
I/O BUFFER
AM: MSB address
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
Table 1. SECTOR STRUCTURE
MX29F800CT TOP BOOT SECTOR ADDRESS TABLE
Sector Size
Address range
Sector Address
Sector
Byte Mode Word Mode Byte Mode (x8)
Word Mode(x16)
A18 A17 A16 A15 A14 A13 A12
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
32Kbytes
8Kbytes
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
16Kwords
4Kwords
00000h-0FFFFh
10000h-1FFFFh
20000h-2FFFFh
30000h-3FFFFh
40000h-4FFFFh
50000h-5FFFFh
60000h-6FFFFh
70000h-7FFFFh
80000h-8FFFFh
90000h-9FFFFh
A0000h-AFFFFh
B0000h-BFFFFh
C0000h-CFFFFh
D0000h-DFFFFh
E0000h-EFFFFh
F0000h-F7FFFh
F8000h-F9FFFh
FA000h-FBFFFh
FC000h-FFFFFh
00000h-07FFFh
08000h-0FFFFh
10000h-17FFFh
18000h-1FFFFh
20000h-27FFFh
28000h-2FFFFh
30000h-37FFFh
38000h-3FFFFh
40000h-47FFFh
48000h-4FFFFh
50000h-57FFFh
58000h-5FFFFh
60000h-67FFFh
68000h-6FFFFh
70000h-77FFFh
78000h-7BFFFh
7C000h-7CFFFh
7D000h-7DFFFh
7E000h-7FFFFh
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
0ꢀ
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
1
1
1
8Kbytes
16Kbytes
4Kwords
8Kwords
0
1
1
X
MX29F800CB BOTTOM BOOT SECTOR ADDRESS TABLE
Sector Size
Address range
Sector Address
A18 A17 A16 A15 A14 A13 A12
Sector
Byte Mode Word Mode Byte Mode (x8)
Word Mode(x16)
00000h-01FFFh
02000h-02FFFh
03000h-03FFFh
04000h-07FFFh
08000h-0FFFFh
10000h-17FFFh
18000h-1FFFFh
20000h-27FFFh
28000h-2FFFFh
30000h-37FFFh
38000h-3FFFFh
40000h-47FFFh
48000h-4FFFFh
50000h-57FFFh
58000h-5FFFFh
60000h-67FFFh
68000h-6FFFFh
70000h-77FFFh
78000h-7FFFFh
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
16Kbytes
8Kbytes
8Kbytes
8Kwords
4Kwords
4Kwords
00000h-03FFFh
04000h-05FFFh
06000h-07FFFh
08000h-0FFFFh
10000h-1FFFFh
20000h-2FFFFh
30000h-3FFFFh
40000h-4FFFFh
50000h-5FFFFh
60000h-6FFFFh
70000h-7FFFFh
80000h-8FFFFh
90000h-9FFFFh
A0000h-AFFFFh
B0000h-BFFFFh
C0000h-CFFFFh
D0000h-DFFFFh
E0000h-EFFFFh
F0000h-FFFFFh
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0ꢀ
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
X
0
1
32Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
64Kbytes
16Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
32Kwords
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
Note: AddressꢀrangeꢀisꢀA18~A-1ꢀinꢀbyteꢀmodeꢀandꢀA18~A0ꢀinꢀwordꢀmode.
P/N:PM1493
Rev. 1.3, December 13, 2017
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MX29F800C T/B
Table 2. BUS OPERATION
Mode
Pins CE# OE# WE# RESET# A0 A1 A6 A9
Q0 ~ Q15
ReadꢀSiliconꢀID
ManufactureꢀCode
ReadꢀSiliconꢀID
DeviceꢀCode
Read
Standby
OutputꢀDisable
Write
SectorꢀProtectꢀ
ChipꢀUnprotect
VerifyꢀSectorꢀProtect/Unprotect
Reset
L
L
L
L
H
H
H
H
L
L
L
X
X
Vhv
Vhv
C2Hꢀ(Byteꢀmode)
00C2Hꢀ(Wordꢀmode)
D6/58ꢀ(Byteꢀmode)
22D6/2258(Wordꢀmode)
H
L
H
L
L
L
L
L
X
L
X
H
H
H
H
L
H
X
H
L
L
L
H
H
H
A0
X
X
A0
L
L
A1
X
X
A1
H
H
A6
X
X
A6
L
H
L
A9
X
X
A9
X
X
DOUT
HIGHꢀZ
HIGHꢀZ
DIN
DIN
DIN
Code(4)
HIGHꢀZ
H
Vhv
Vhv
H
H
X
L
X
H
X
Vhv
X
X
L
X
Notes:
1.ꢀꢀVhvꢀisꢀtheꢀveryꢀhighꢀvoltage,ꢀ11.5Vꢀtoꢀ12.5V.
2.ꢀꢀXꢀmeansꢀinputꢀhighꢀ(Vih)ꢀorꢀinputꢀlowꢀ(Vil).
3.ꢀꢀSAꢀmeansꢀsectorꢀaddress:ꢀA12~A18.
4.ꢀꢀCode=00H/XX00Hꢀmeansꢀunprotected.
ꢀ Code=01H/XX01Hꢀmeansꢀprotected.ꢀ
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
REQUIREMENTS FOR READING ARRAY DATA
Readꢀarrayꢀactionꢀisꢀtoꢀreadꢀtheꢀdataꢀstoredꢀinꢀtheꢀarrayꢀout.ꢀWhileꢀtheꢀmemoryꢀdeviceꢀisꢀinꢀpoweredꢀupꢀorꢀhasꢀ
beenꢀreset,ꢀitꢀwillꢀautomaticallyꢀenterꢀtheꢀstatusꢀofꢀreadꢀarray.ꢀIfꢀtheꢀmicroprocessorꢀwantsꢀtoꢀreadꢀtheꢀdataꢀstoredꢀ
inꢀarray,ꢀitꢀhasꢀtoꢀdriveꢀCE#ꢀ(deviceꢀenableꢀcontrolꢀpin)ꢀandꢀOE#ꢀ(Outputꢀcontrolꢀpin)ꢀasꢀVil,ꢀandꢀinputꢀtheꢀaddressꢀ
ofꢀtheꢀdataꢀtoꢀbeꢀreadꢀintoꢀaddressꢀpinꢀatꢀtheꢀsameꢀtime.ꢀAfterꢀaꢀperiodꢀofꢀreadꢀcycleꢀ(TceꢀorꢀTaa),ꢀtheꢀdataꢀbeingꢀ
readꢀoutꢀwillꢀbeꢀdisplayedꢀonꢀoutputꢀpinꢀforꢀmicroprocessorꢀtoꢀaccess.ꢀIfꢀCE#ꢀorꢀOE#ꢀisꢀVih,ꢀtheꢀoutputꢀwillꢀbeꢀinꢀ
tri-state,ꢀandꢀthereꢀwillꢀbeꢀnoꢀdataꢀdisplayedꢀonꢀoutputꢀpinꢀatꢀall.
Afterꢀtheꢀmemoryꢀdeviceꢀcompletesꢀembeddedꢀoperationꢀ(automaticꢀEraseꢀorꢀProgram),ꢀitꢀwillꢀautomaticallyꢀre-
turnꢀtoꢀtheꢀstatusꢀofꢀreadꢀarray,ꢀandꢀtheꢀdeviceꢀcanꢀreadꢀtheꢀdataꢀinꢀanyꢀaddressꢀinꢀtheꢀarray.ꢀInꢀtheꢀprocessꢀofꢀ
erasing,ꢀifꢀtheꢀdeviceꢀreceivesꢀtheꢀEraseꢀsuspendꢀcommand,ꢀeraseꢀoperationꢀwillꢀbeꢀstoppedꢀafterꢀaꢀperiodꢀofꢀ
timeꢀnoꢀmoreꢀthanꢀTreadyandꢀtheꢀdeviceꢀwillꢀreturnꢀtoꢀtheꢀstatusꢀofꢀreadꢀarray.ꢀAtꢀthisꢀtime,ꢀtheꢀdeviceꢀcanꢀreadꢀ
theꢀdataꢀstoredꢀinꢀanyꢀaddressꢀexceptꢀtheꢀsectorꢀbeingꢀerasedꢀinꢀtheꢀarray.ꢀInꢀtheꢀstatusꢀofꢀeraseꢀsuspend,ꢀifꢀuserꢀ
wantsꢀtoꢀreadꢀtheꢀdataꢀinꢀtheꢀsectorsꢀbeingꢀerased,ꢀtheꢀdeviceꢀwillꢀoutputꢀstatusꢀdataꢀontoꢀtheꢀoutput.ꢀSimilarly,ꢀifꢀ
programꢀcommandꢀisꢀissuedꢀafterꢀeraseꢀsuspend,ꢀafterꢀprogramꢀoperationꢀisꢀcompleted,ꢀsystemꢀcanꢀstillꢀreadꢀar-
rayꢀdataꢀinꢀanyꢀaddressꢀexceptꢀtheꢀsectorsꢀtoꢀbeꢀerased.
ꢀꢀ
Theꢀdeviceꢀneedsꢀtoꢀissueꢀresetꢀcommandꢀtoꢀenableꢀreadꢀarrayꢀoperationꢀagainꢀinꢀorderꢀtoꢀarbitrarilyꢀreadꢀtheꢀ
dataꢀinꢀtheꢀarrayꢀinꢀtheꢀfollowingꢀtwoꢀsituations:ꢀꢀ
1.ꢀInꢀprogramꢀorꢀeraseꢀoperation,ꢀtheꢀprogrammingꢀorꢀerasingꢀfailureꢀcausesꢀQ5ꢀtoꢀgoꢀhigh.
2.ꢀTheꢀdeviceꢀisꢀinꢀautoꢀselectꢀmode.
Inꢀtheꢀtwoꢀsituationsꢀabove,ꢀifꢀresetꢀcommandꢀisꢀnotꢀissued,ꢀtheꢀdeviceꢀisꢀnotꢀinꢀreadꢀarrayꢀmodeꢀandꢀsystemꢀ
mustꢀissueꢀresetꢀcommandꢀbeforeꢀreadingꢀarrayꢀdata.
WRITE COMMANDS/COMMAND SEQUENCES
Toꢀwriteꢀaꢀcommandꢀtoꢀtheꢀdevice,ꢀsystemꢀmustꢀdriveꢀWE#ꢀandꢀCE#ꢀtoꢀVil,ꢀandꢀOE#ꢀtoꢀVih.ꢀInꢀaꢀcommandꢀcycle,ꢀ
allꢀaddressꢀareꢀlatchedꢀatꢀtheꢀlaterꢀfallingꢀedgeꢀofꢀCE#ꢀandꢀWE#,ꢀandꢀallꢀdataꢀareꢀlatchedꢀatꢀtheꢀearlierꢀrisingꢀ
edgeꢀofꢀCE#ꢀandꢀWE#.ꢀ
Figureꢀ1ꢀillustratesꢀtheꢀACꢀtimingꢀwaveformꢀofꢀaꢀwriteꢀcommand,ꢀandꢀTableꢀ3ꢀdefinesꢀallꢀtheꢀvalidꢀcommandꢀsetsꢀ
ofꢀtheꢀdevice.ꢀSystemꢀisꢀnotꢀallowedꢀtoꢀwriteꢀinvalidꢀcommandsꢀnotꢀdefinedꢀinꢀthisꢀdatasheet.ꢀWritingꢀanꢀinvalidꢀ
commandꢀwillꢀbringꢀtheꢀdeviceꢀtoꢀanꢀundefinedꢀstate.
RESET# OPERATION
DrivingꢀRESET#ꢀpinꢀlowꢀforꢀaꢀperiodꢀmoreꢀthanꢀTrpꢀwillꢀresetꢀtheꢀdeviceꢀbackꢀtoꢀreadꢀmode.ꢀIfꢀtheꢀdeviceꢀisꢀinꢀ
programꢀorꢀeraseꢀoperation,ꢀtheꢀresetꢀoperationꢀwillꢀtakeꢀatꢀmostꢀaꢀperiodꢀofꢀTreadyꢀforꢀtheꢀdeviceꢀtoꢀreturnꢀtoꢀ
readꢀarrayꢀmode.ꢀBeforeꢀtheꢀdeviceꢀreturnsꢀtoꢀreadꢀarrayꢀmode,ꢀtheꢀRY/BY#ꢀpinꢀremainsꢀlowꢀ(busyꢀstatus).
WhenꢀRESET#ꢀpinꢀisꢀheldꢀatꢀGND 0.3V,ꢀtheꢀdeviceꢀconsumesꢀstandbyꢀcurrent(Isb).However,ꢀdeviceꢀdrawsꢀlarg-
±
erꢀcurrentꢀifꢀRESET#ꢀpinꢀisꢀheldꢀatꢀVilꢀbutꢀnotꢀwithinꢀGND 0.3V.
±
ItꢀisꢀrecommendedꢀthatꢀtheꢀsystemꢀtoꢀtieꢀitsꢀresetꢀsignalꢀtoꢀRESET#ꢀpinꢀofꢀflashꢀmemory,ꢀsoꢀthatꢀtheꢀflashꢀmemo-
ryꢀwillꢀbeꢀresetꢀduringꢀsystemꢀresetꢀandꢀallowsꢀsystemꢀtoꢀreadꢀbootꢀcodeꢀfromꢀflashꢀmemory.
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Rev. 1.3, December 13, 2017
7
MX29F800C T/B
SECTOR PROTECT OPERATION
Whenꢀaꢀsectorꢀisꢀprotected,ꢀprogramꢀorꢀeraseꢀoperationꢀwillꢀbeꢀdisabledꢀonꢀtheseꢀsectors.ꢀMX29F800CꢀT/Bꢀpro-
videsꢀoneꢀmethodꢀforꢀsectorꢀprotection.ꢀ
Onceꢀtheꢀsectorꢀisꢀprotected,ꢀtheꢀsectorꢀremainsꢀprotectedꢀuntilꢀnextꢀchipꢀunprotect,ꢀorꢀisꢀtemporarilyꢀunprotectedꢀ
byꢀassertingꢀRESET#ꢀpinꢀatꢀVhv.ꢀReferꢀtoꢀtemporaryꢀsectorꢀunprotectꢀoperationꢀforꢀfurtherꢀdetails.
ThisꢀmethodꢀisꢀbyꢀapplyingꢀVhvꢀonꢀRESET#ꢀpin.ꢀReferꢀtoꢀFigureꢀ12ꢀforꢀtimingꢀdiagramꢀandꢀFigureꢀ13ꢀforꢀtheꢀal-
gorithmꢀforꢀthisꢀmethod.
CHIP UNPROTECT OPERATION
MX29F800CꢀT/Bꢀprovidesꢀoneꢀmethodꢀforꢀchipꢀunprotect.ꢀTheꢀchipꢀunprotectꢀoperationꢀunprotectsꢀallꢀsectorsꢀ
withinꢀtheꢀdevice.ꢀItꢀisꢀrecommendedꢀtoꢀprotectꢀallꢀsectorsꢀbeforeꢀactivatingꢀchipꢀunprotectꢀmode.ꢀAllꢀsectorꢀareꢀ
unprotectedꢀwhenꢀshippedꢀfromꢀtheꢀfactory.
ThisꢀmethodꢀisꢀbyꢀapplyingꢀVhvꢀonꢀRESET#ꢀpin.ꢀReferꢀtoꢀFigureꢀ12ꢀforꢀtimingꢀdiagramꢀandꢀFigureꢀ13ꢀforꢀalgo-
rithmꢀofꢀtheꢀoperation.
TEMPORARY SECTOR UNPROTECT OPERATION
SystemꢀcanꢀapplyꢀRESET#ꢀpinꢀatꢀVhvꢀtoꢀplaceꢀtheꢀdeviceꢀinꢀtemporaryꢀunprotectꢀmode.ꢀInꢀthisꢀmode,ꢀpreviouslyꢀ
protectedꢀsectorsꢀcanꢀbeꢀprogrammedꢀorꢀerasedꢀjustꢀasꢀitꢀisꢀunprotected.ꢀTheꢀdevicesꢀreturnsꢀtoꢀnormalꢀopera-
tionꢀonceꢀVhvꢀisꢀremovedꢀfromꢀRESET#ꢀpinꢀandꢀpreviouslyꢀprotectedꢀsectorsꢀareꢀagainꢀprotected.
AUTOMATIC SELECT OPERATION
WhenꢀtheꢀdeviceꢀisꢀinꢀReadꢀarrayꢀmodeꢀorꢀerase-suspendedꢀreadꢀarrayꢀmode,ꢀuserꢀcanꢀissueꢀreadꢀsiliconꢀIDꢀ
commandꢀtoꢀenterꢀreadꢀsiliconꢀIDꢀmode.ꢀAfterꢀenteringꢀreadꢀsiliconꢀIDꢀmode,ꢀuserꢀcanꢀqueryꢀseveralꢀsiliconꢀIDsꢀ
continuouslyꢀandꢀdoesꢀnotꢀneedꢀtoꢀissueꢀreadꢀsiliconꢀIDꢀmodeꢀagain.ꢀWhenꢀA0ꢀisꢀLow,ꢀdeviceꢀwillꢀoutputꢀMa-
cronixꢀManufactureꢀIDꢀC2.ꢀWhenꢀA0ꢀisꢀhigh,ꢀdeviceꢀwillꢀoutputꢀDeviceꢀID.ꢀInꢀreadꢀsiliconꢀIDꢀmode,ꢀissuingꢀresetꢀ
commandꢀwillꢀresetꢀdeviceꢀbackꢀtoꢀreadꢀarrayꢀmodeꢀorꢀerase-suspendedꢀreadꢀarrayꢀmode.ꢀ
AnotherꢀwayꢀtoꢀenterꢀreadꢀsiliconꢀIDꢀisꢀtoꢀapplyꢀhighꢀvoltageꢀonꢀA9ꢀpinꢀwithꢀCE#,ꢀOE#ꢀandꢀA1ꢀatꢀVil.ꢀWhileꢀtheꢀ
highꢀvoltageꢀofꢀA9ꢀpinꢀisꢀdischarged,ꢀdeviceꢀwillꢀautomaticallyꢀleaveꢀreadꢀsiliconꢀIDꢀmodeꢀandꢀgoꢀbackꢀtoꢀreadꢀ
arrayꢀmodeꢀorꢀerase-suspendedꢀreadꢀarrayꢀmode.ꢀWhenꢀA0ꢀisꢀLow,ꢀdeviceꢀwillꢀoutputꢀMacronixꢀManufactureꢀIDꢀ
C2.ꢀWhenꢀA0ꢀisꢀhigh,ꢀdeviceꢀwillꢀoutputꢀDeviceꢀID.
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
VERIFY SECTOR PROTECT STATUS OPERATION
MX29F800CꢀT/BꢀprovidesꢀhardwareꢀsectorꢀprotectionꢀagainstꢀProgramꢀandꢀEraseꢀoperationꢀforꢀprotectedꢀsec-
tors.ꢀTheꢀsectorꢀprotectꢀstatusꢀcanꢀbeꢀreadꢀthroughꢀSectorꢀProtectꢀVerifyꢀcommand.ꢀThisꢀmethodꢀrequiresꢀVhvꢀonꢀ
A9ꢀpin,ꢀVihꢀonꢀWE#ꢀandꢀA1ꢀpins,ꢀVilꢀonꢀCE#,ꢀOE#,ꢀA6ꢀandꢀA0ꢀpins,ꢀandꢀsectorꢀaddressꢀonꢀA12ꢀtoꢀA17ꢀpins.ꢀIfꢀtheꢀ
readꢀoutꢀdataꢀisꢀ01H,ꢀtheꢀdesignatedꢀsectorꢀisꢀprotected.ꢀOppositely,ꢀifꢀtheꢀreadꢀoutꢀdataꢀisꢀ00H,ꢀtheꢀdesignatedꢀ
sectorꢀisꢀstillꢀnotꢀbeingꢀprotected.
DATA PROTECTION
Toꢀavoidꢀaccidentalꢀerasureꢀorꢀprogrammingꢀofꢀtheꢀdevice,ꢀtheꢀdeviceꢀisꢀautomaticallyꢀresetꢀtoꢀreadꢀarrayꢀmodeꢀ
duringꢀpowerꢀup.ꢀBesides,ꢀonlyꢀafterꢀsuccessfulꢀcompletionꢀofꢀtheꢀspecifiedꢀcommandꢀsetsꢀwillꢀtheꢀdeviceꢀbeginꢀ
itsꢀeraseꢀorꢀprogramꢀoperation.
Otherꢀfeaturesꢀtoꢀprotectꢀtheꢀdataꢀfromꢀaccidentalꢀalternationꢀareꢀdescribedꢀasꢀfollowed.
WRITE PULSE "GLITCH" PROTECTION
CE#,ꢀWE#,ꢀOE#ꢀpulsesꢀshorterꢀthanꢀ5nsꢀareꢀtreatedꢀasꢀglitchesꢀandꢀwillꢀnotꢀbeꢀregardedꢀasꢀanꢀeffectiveꢀwriteꢀ
cycle.
LOGICAL INHIBIT
AꢀvalidꢀwriteꢀcycleꢀrequiresꢀbothꢀCE#ꢀandꢀWE#ꢀatꢀVilꢀwithꢀOE#ꢀatꢀVih.ꢀWriteꢀcycleꢀisꢀignoredꢀwhenꢀeitherꢀCE#ꢀatꢀ
Vih,ꢀWE#ꢀaꢀVih,ꢀorꢀOE#ꢀatꢀVil.
POWER-UP SEQUENCE
Uponꢀpowerꢀup,ꢀMX29F800CꢀT/Bꢀisꢀplacedꢀinꢀreadꢀarrayꢀmode.ꢀFurthermore,ꢀprogramꢀorꢀeraseꢀoperationꢀwillꢀbe-
ginꢀonlyꢀafterꢀsuccessfulꢀcompletionꢀofꢀspecifiedꢀcommandꢀsequences.
POWER-UP WRITE INHIBIT
WhenꢀWE#,ꢀCE#ꢀisꢀheldꢀatꢀVilꢀandꢀOE#ꢀisꢀheldꢀatꢀVihꢀduringꢀpowerꢀup,ꢀtheꢀdeviceꢀignoresꢀtheꢀfirstꢀcommandꢀonꢀ
theꢀrisingꢀedgeꢀofꢀWE#.
POWER SUPPLY DECOUPLING
Aꢀ0.1uFꢀcapacitorꢀshouldꢀbeꢀconnectedꢀbetweenꢀtheꢀVccꢀandꢀGNDꢀtoꢀreduceꢀtheꢀnoiseꢀeffect.
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MX29F800C T/B
TABLE 3. MX29F800C T/B COMMAND DEFINITIONS
AutomaticꢀSelect
Commandꢀ
ReadꢀMode ResetꢀMode
ManufacturerꢀID
DeviceꢀID
Word
555
AA
SectorꢀProtectꢀVerify
Word
555
AA
Byte
AAA
AA
Byte
AAA
AA
Word
555
AA
Byte
AAA
AA
Addr
Data
Addr
Data
Addr
Data
Addr
Addr
Data
XXX
1stꢀBusꢀ
Cycle
F0
2AA
55
555
55
2AA
55
555
55
2AA
55
555
55
2ndꢀBusꢀ
Cycle
555
90
AAA
90
555
90
AAA
90
555
90
AAA
90
3rdꢀBusꢀꢀ
Cycle
X00
X00
X01
X02
(Sector)X02 (Sector)X04
4thꢀBusꢀ
Cycle
Data
00C2
C2
ID
ID
XX00/XX01 00/01
Addr
Data
Addr
Data
5thꢀBusꢀꢀ
Cycle
6thꢀBusꢀꢀ
Cycle
Eraseꢀ
Suspend Resume
Eraseꢀ
Program
Word Byte
ChipꢀErase
SectorꢀErase
SectorꢀProtect
Commandꢀ
Word
Byte
AAA
AA
Word
555
AA
Byte
Word
XXX
60
Byte
XXX
60
555
AA
AAA
AA
555
AA
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
AAA
AA
Sector
B0
Sector
30
1stꢀBusꢀ
Cycle
2AA
55
555
A0
Addr
Data
555
55
AAA
A0
Addr
Data
2AA
55
555
80
555
AA
2AA
55
555
55
AAA
80
AAA
AA
555
55
2AA
55
555
80
555
AA
2AA
55
555
55
AAA
80
AAA
AA
555
55
sector
60
sector
40
sector
00/01
sector
60
sector
40
sector
00/01
2ndꢀBusꢀ
Cycle
3rdꢀBusꢀꢀ
Cycle
4thꢀBusꢀ
Cycle
5thꢀBusꢀꢀ
Cycle
555
10
AAA
10
Sector
30
Sector
30
6thꢀBusꢀꢀ
Cycle
Notes:
1.ꢀꢀDeviceꢀID:ꢀꢀ22D6H/D6HꢀforꢀTopꢀBootꢀSectorꢀdevice.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 2258H/58HꢀforꢀBottomꢀBootꢀSectorꢀdevice.
2.ꢀꢀForꢀsectorꢀprotectꢀverifyꢀresult,ꢀXX00H/00Hꢀmeansꢀsectorꢀisꢀnotꢀprotected,ꢀXX01H/01Hꢀmeansꢀsectorꢀhasꢀ
beenꢀprotected.
3.ꢀꢀSectorꢀProtectꢀcommandꢀisꢀvalidꢀduringꢀVhvꢀatꢀRESET#ꢀpin,ꢀVihꢀatꢀA1ꢀpinꢀandꢀVilꢀatꢀA0,ꢀA6ꢀpins.ꢀTheꢀlastꢀBusꢀ
cycꢀisꢀforꢀprotectꢀverify.
4.ꢀ Itꢀisꢀnotꢀallowedꢀtoꢀadoptꢀanyꢀotherꢀcodeꢀwhichꢀisꢀnotꢀinꢀtheꢀaboveꢀcommandꢀdefinitionꢀtable.
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
RESET
Inꢀtheꢀfollowingꢀsituations,ꢀexecutingꢀresetꢀcommandꢀwillꢀresetꢀdeviceꢀꢀbackꢀtoꢀreadꢀarrayꢀmode:
•ꢀ Amongꢀeraseꢀcommandꢀsequenceꢀ(beforeꢀtheꢀfullꢀcommandꢀsetꢀisꢀcompleted)
•ꢀ Sectorꢀeraseꢀtime-outꢀperiod
•ꢀ Eraseꢀfailꢀ(whileꢀQ5ꢀisꢀhigh)
•ꢀ Amongꢀprogramꢀcommandꢀsequenceꢀ(beforeꢀtheꢀfullꢀcommandꢀsetꢀisꢀcompleted,ꢀerase-suspendedꢀprogramꢀ
included)
•ꢀ Programꢀfailꢀ(whileꢀQ5ꢀisꢀhigh,ꢀandꢀerase-suspendedꢀprogramꢀfailꢀisꢀincluded)
•ꢀ ReadꢀsiliconꢀIDꢀmode
•ꢀ Sectorꢀprotectꢀverify
Whileꢀdeviceꢀisꢀatꢀtheꢀstatusꢀofꢀprogramꢀfailꢀorꢀeraseꢀfailꢀ(Q5ꢀisꢀhigh),ꢀuserꢀmustꢀissueꢀresetꢀcommandꢀtoꢀresetꢀ
deviceꢀꢀbackꢀtoꢀreadꢀarrayꢀmode.ꢀWhileꢀtheꢀdeviceꢀisꢀinꢀreadꢀsiliconꢀIDꢀmodeꢀorꢀꢀsectorꢀprotectꢀverifyꢀmode,ꢀuserꢀ
mustꢀissueꢀresetꢀcommandꢀtoꢀresetꢀdeviceꢀꢀbackꢀtoꢀreadꢀarrayꢀmode.ꢀꢀꢀ
Whenꢀtheꢀdeviceꢀisꢀinꢀtheꢀprogressꢀofꢀprogrammingꢀ(notꢀprogramꢀfail)ꢀorꢀerasingꢀ(notꢀeraseꢀfail),ꢀdeviceꢀwillꢀꢀig-
noreꢀresetꢀcommand.
AUTOMATIC SELECT COMMAND SEQUENCE
AutomaticꢀSelectꢀmodeꢀisꢀusedꢀtoꢀaccessꢀtheꢀmanufacturerꢀID,ꢀdeviceꢀIDꢀandꢀtoꢀverifyꢀwhetherꢀorꢀnotꢀaꢀsectorꢀisꢀ
protected.ꢀTheꢀautomaticꢀselectꢀmodeꢀhasꢀfourꢀcommandꢀcycles.ꢀTheꢀfirstꢀtwoꢀareꢀunlockꢀcycles,ꢀandꢀfollowedꢀbyꢀ
aꢀspecificꢀcommand.ꢀTheꢀfourthꢀcycleꢀisꢀaꢀnormalꢀreadꢀcycle,ꢀandꢀuserꢀcanꢀreadꢀatꢀanyꢀaddressꢀanyꢀnumberꢀofꢀ
timesꢀwithoutꢀenteringꢀanotherꢀcommandꢀsequence.ꢀTheꢀresetꢀcommandꢀisꢀnecessaryꢀtoꢀexitꢀtheꢀAutomaticꢀSe-
lectꢀmodeꢀandꢀbackꢀtoꢀreadꢀarray.ꢀTheꢀfollowingꢀtableꢀshowsꢀtheꢀidentificationꢀcodeꢀwithꢀcorrespondingꢀaddress.
Address
Dataꢀ(Hex)
00C2
Representation
Word
Byte
Word
Byte
Word
Byte
X00
ManufacturerꢀID
DeviceꢀID
X00
X01
C2
22D6/2258
D6/58
Top/BottomꢀBootꢀSector
Top/BottomꢀBootꢀSector
Unprotected/protected
Unprotected/protected
X02
(Sectorꢀaddress)ꢀXꢀ02
(Sectorꢀaddress)ꢀXꢀ04
00/01
SectorꢀProtectꢀVerify
00/01
ThereꢀisꢀanꢀalternativeꢀmethodꢀtoꢀthatꢀshownꢀinꢀTableꢀ2,ꢀwhichꢀisꢀintendedꢀforꢀEPROMꢀprogrammersꢀandꢀrequiresꢀ
VhvꢀonꢀaddressꢀbitꢀA9.
P/N:PM1493
Rev. 1.3, December 13, 2017
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MX29F800C T/B
AUTOMATIC PROGRAMMING
TheꢀMX29F800CꢀT/BꢀcanꢀprovideꢀtheꢀuserꢀprogramꢀfunctionꢀbyꢀtheꢀformꢀofꢀByte-ModeꢀorꢀWord-Mode.ꢀAsꢀlongꢀ
asꢀtheꢀusersꢀenterꢀtheꢀrightꢀcycleꢀdefinedꢀinꢀtheꢀTable.3ꢀ(includingꢀ2ꢀunlockꢀcyclesꢀandꢀA0H),ꢀanyꢀdataꢀuserꢀinputsꢀ
willꢀautomaticallyꢀbeꢀprogrammedꢀintoꢀtheꢀarray.
Onceꢀtheꢀprogramꢀfunctionꢀisꢀexecuted,ꢀtheꢀinternalꢀwriteꢀstateꢀcontrollerꢀwillꢀautomaticallyꢀexecuteꢀtheꢀalgo-
rithmsꢀandꢀtimingsꢀnecessaryꢀforꢀprogramꢀandꢀverification,ꢀwhichꢀincludesꢀgeneratingꢀsuitableꢀprogramꢀpulse,ꢀ
verifyingꢀwhetherꢀtheꢀthresholdꢀvoltageꢀofꢀtheꢀprogrammedꢀcellꢀisꢀhighꢀenoughꢀandꢀrepeatingꢀtheꢀprogramꢀpulseꢀ
ifꢀanyꢀofꢀtheꢀcellsꢀdoesꢀnotꢀpassꢀverification.ꢀMeanwhile,ꢀtheꢀinternalꢀcontrolꢀwillꢀprohibitꢀtheꢀprogrammingꢀtoꢀcellsꢀ
thatꢀpassꢀverificationꢀwhileꢀtheꢀotherꢀcellsꢀfailꢀinꢀverificationꢀinꢀorderꢀtoꢀavoidꢀover-programming.
Programmingꢀwillꢀonlyꢀchangeꢀtheꢀbitꢀstatusꢀfromꢀ"1"ꢀtoꢀ"0".ꢀThatꢀisꢀtoꢀsay,ꢀitꢀisꢀimpossibleꢀtoꢀconvertꢀtheꢀbitꢀstatusꢀ
fromꢀ"0"ꢀtoꢀ"1"ꢀbyꢀprogramming.ꢀMeanwhile,ꢀtheꢀinternalꢀwriteꢀverificationꢀonlyꢀdetectsꢀtheꢀerrorsꢀofꢀtheꢀ"1"ꢀthatꢀisꢀ
notꢀsuccessfullyꢀprogrammedꢀtoꢀ"0".ꢀ
Anyꢀcommandꢀwrittenꢀtoꢀtheꢀdeviceꢀduringꢀprogrammingꢀwillꢀbeꢀignoredꢀexceptꢀhardwareꢀreset,ꢀwhichꢀwillꢀtermi-
nateꢀtheꢀprogramꢀoperationꢀafterꢀaꢀperiodꢀofꢀtimeꢀnoꢀmoreꢀthanꢀTready.ꢀWhenꢀtheꢀembeddedꢀprogramꢀalgorithmꢀ
isꢀcompleteꢀorꢀtheꢀprogramꢀoperationꢀisꢀterminatedꢀbyꢀhardwareꢀreset,ꢀtheꢀdeviceꢀwillꢀreturnꢀtoꢀtheꢀreadingꢀarrayꢀ
dataꢀmode.
Withꢀtheꢀinternalꢀwriteꢀstateꢀcontroller,ꢀtheꢀdeviceꢀrequiresꢀtheꢀuserꢀtoꢀwriteꢀtheꢀprogramꢀcommandꢀandꢀdataꢀonly.ꢀ
TheꢀtypicalꢀchipꢀprogramꢀtimeꢀatꢀroomꢀtemperatureꢀofꢀtheꢀMX29F800CꢀT/Bꢀisꢀ3ꢀseconds.ꢀ(Word-Mode)
Whenꢀtheꢀembeddedꢀprogramꢀoperationꢀisꢀonꢀgoing,ꢀuserꢀcanꢀconfirmꢀifꢀtheꢀembeddedꢀoperationꢀisꢀfinishedꢀorꢀ
notꢀbyꢀtheꢀfollowingꢀmethods:
Status
Inꢀprogress*1
Finished
Q7
Q7#
Q7
Q6
Q5
0
RY/BY#*2
Toggling
0
1
0
Stopꢀtoggling
Toggling
0
Exceedꢀtimeꢀlimit
Q7#
1
*1:ꢀTheꢀstatusꢀ"inꢀprogress"ꢀmeansꢀbothꢀprogramꢀmodeꢀandꢀerase-suspendedꢀprogramꢀmode.
*2:ꢀRY/BY#ꢀisꢀanꢀopenꢀdrainꢀoutputꢀpinꢀandꢀshouldꢀbeꢀweaklyꢀconnectedꢀtoꢀVDDꢀthroughꢀaꢀpull-upꢀresistor.
*3:ꢀWhenꢀanꢀattemptꢀisꢀmadeꢀtoꢀprogramꢀaꢀprotectedꢀsector,ꢀQ7ꢀwillꢀoutputꢀitsꢀcomplementꢀdataꢀorꢀQ6ꢀcontinuesꢀ
toꢀtoggleꢀforꢀaboutꢀ1usꢀandꢀtheꢀdeviceꢀreturnsꢀtoꢀreadꢀarrayꢀstateꢀwithoutꢀprogramingꢀtheꢀdataꢀinꢀtheꢀprotectedꢀ
sector.
P/N:PM1493
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MX29F800C T/B
CHIP ERASE
ChipꢀEraseꢀisꢀtoꢀeraseꢀallꢀtheꢀdataꢀwithꢀ"1"ꢀandꢀ"0"ꢀasꢀallꢀ"1".ꢀItꢀneedsꢀ6ꢀcyclesꢀtoꢀwriteꢀtheꢀactionꢀin,ꢀandꢀtheꢀfirstꢀ
twoꢀcyclesꢀareꢀ"unlock"ꢀcycles,ꢀtheꢀthirdꢀoneꢀisꢀaꢀconfigurationꢀcycle,ꢀtheꢀfourthꢀandꢀfifthꢀareꢀalsoꢀ"unlock"ꢀcycles,ꢀ
andꢀtheꢀsixthꢀcycleꢀisꢀtheꢀchipꢀeraseꢀoperation.ꢀ
Duringꢀchipꢀerasing,ꢀallꢀtheꢀcommandsꢀwillꢀnotꢀbeꢀacceptedꢀexceptꢀhardwareꢀrestsꢀorꢀtheꢀworkingꢀvoltageꢀisꢀtooꢀ
lowꢀthatꢀchipꢀeraseꢀwillꢀbeꢀinterrupted.ꢀAfterꢀChipꢀErase,ꢀtheꢀchipꢀwillꢀreturnꢀtoꢀtheꢀstateꢀofꢀReadꢀArray.
Whenꢀtheꢀembeddedꢀchipꢀeraseꢀoperationꢀisꢀonꢀgoing,ꢀuserꢀcanꢀconfirmꢀifꢀtheꢀembeddedꢀoperationꢀisꢀfinishedꢀorꢀ
notꢀbyꢀtheꢀfollowingꢀmethods:ꢀ
Status
Inꢀprogress
Finished
Q7
0
Q6
Q5
0
Q2
Toggling
1
RY/BY#
Toggling
0
1
0
1
Stopꢀtoggling
Toggling
0
Exceedꢀtimeꢀlimit
0
1
Toggling
SECTOR ERASE
SectorꢀEraseꢀisꢀtoꢀeraseꢀallꢀtheꢀdataꢀinꢀaꢀsectorꢀwithꢀ"1"ꢀandꢀ"0"ꢀasꢀallꢀ"1".ꢀItꢀrequiresꢀsixꢀcommandꢀcyclesꢀtoꢀis-
sue.ꢀTheꢀfirstꢀtwoꢀcyclesꢀareꢀ"unlockꢀcycles",ꢀtheꢀthirdꢀoneꢀisꢀaꢀconfigurationꢀcycle,ꢀtheꢀfourthꢀandꢀfifthꢀareꢀalsoꢀ
"unlockꢀcycles"ꢀandꢀtheꢀsixthꢀcycleꢀisꢀtheꢀsectorꢀeraseꢀcommand.ꢀAfterꢀtheꢀsectorꢀeraseꢀcommandꢀsequenceꢀisꢀ
issued,ꢀthereꢀisꢀaꢀtime-outꢀperiodꢀofꢀ40usꢀcountedꢀinternally.ꢀDuringꢀtheꢀtime-outꢀperiod,ꢀadditionalꢀsectorꢀad-
dressꢀandꢀsectorꢀeraseꢀcommandꢀcanꢀbeꢀwrittenꢀmultiply.ꢀOnceꢀuserꢀentersꢀanotherꢀsectorꢀeraseꢀcommand,ꢀtheꢀ
time-outꢀperiodꢀofꢀ40usꢀisꢀrecounted.ꢀIfꢀuserꢀentersꢀanyꢀcommandꢀotherꢀthanꢀsectorꢀeraseꢀorꢀeraseꢀsuspendꢀdur-
ingꢀtime-outꢀperiod,ꢀtheꢀeraseꢀcommandꢀwouldꢀbeꢀabortedꢀandꢀtheꢀdeviceꢀisꢀresetꢀtoꢀreadꢀarrayꢀcondition.ꢀTheꢀ
numberꢀofꢀsectorsꢀcouldꢀbeꢀfromꢀoneꢀsectorꢀtoꢀallꢀsectors.ꢀAfterꢀtime-outꢀperiodꢀpassingꢀby,ꢀadditionalꢀeraseꢀcom-
mandꢀisꢀnotꢀacceptedꢀandꢀeraseꢀembeddedꢀoperationꢀbegins.
Duringꢀsectorꢀerasing,ꢀallꢀcommandsꢀwillꢀnotꢀbeꢀacceptedꢀexceptꢀhardwareꢀresetꢀandꢀeraseꢀsuspendꢀandꢀuserꢀ
canꢀcheckꢀtheꢀstatusꢀasꢀchipꢀerase.
Whenꢀtheꢀembeddedꢀeraseꢀoperationꢀisꢀonꢀgoing,ꢀuserꢀcanꢀconfirmꢀifꢀtheꢀembeddedꢀoperationꢀisꢀfinishedꢀorꢀnotꢀ
byꢀtheꢀfollowingꢀmethods:
Status
Time-outꢀperiod
Inꢀprogress
Q7
0
Q6
Q5
0
Q3
0
Q2
RY/BY#*2
Toggling
Toggling
Toggling
1
0
0
1
0
0
Toggling
0
1
Finished
1
Stopꢀtoggling
Toggling
0
1
Exceedꢀtimeꢀlimit
0
1
1
Toggling
ꢀ
*1:ꢀTheꢀstatusꢀQ3ꢀisꢀtheꢀtime-outꢀperiodꢀindicator.ꢀWhenꢀQ3=0,ꢀtheꢀdeviceꢀisꢀinꢀtime-outꢀperiodꢀandꢀisꢀacceptibleꢀ
toꢀanotherꢀsectorꢀaddressꢀtoꢀbeꢀerased.ꢀWhenꢀQ3=1,ꢀtheꢀdeviceꢀisꢀinꢀeraseꢀoperationꢀandꢀonlyꢀeraseꢀsuspendꢀisꢀ
valid.
*2:ꢀRY/BY#ꢀisꢀopenꢀdrainꢀoutputꢀpinꢀandꢀshouldꢀbeꢀweaklyꢀconnectedꢀtoꢀVDDꢀthroughꢀaꢀpull-upꢀresistor.
*3:ꢀWhenꢀanꢀattemptꢀisꢀmadeꢀtoꢀeraseꢀaꢀprotectedꢀsector,ꢀQ7ꢀwillꢀoutputꢀitsꢀcomplementꢀdataꢀorꢀQ6ꢀcontinuesꢀtoꢀ
toggleꢀforꢀ100usꢀandꢀtheꢀdeviceꢀreturnedꢀtoꢀreadꢀarrayꢀstatusꢀwithoutꢀerasingꢀtheꢀdataꢀinꢀtheꢀprotectedꢀsector.
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MX29F800C T/B
SECTOR ERASE SUSPEND
Duringꢀsectorꢀerasure,ꢀsectorꢀeraseꢀsuspendꢀisꢀtheꢀonlyꢀvalidꢀcommand.ꢀIfꢀuserꢀissueꢀeraseꢀsuspendꢀcommandꢀ
inꢀtheꢀtime-outꢀperiodꢀofꢀsectorꢀerasure,ꢀdeviceꢀtime-outꢀperiodꢀwillꢀbeꢀoverꢀimmediatelyꢀandꢀtheꢀdeviceꢀwillꢀgoꢀ
backꢀtoꢀerase-suspendedꢀreadꢀarrayꢀmode.ꢀIfꢀuserꢀissueꢀeraseꢀsuspendꢀcommandꢀduringꢀtheꢀsectorꢀeraseꢀisꢀbe-
ingꢀoperated,ꢀdeviceꢀwillꢀsuspendꢀtheꢀongoingꢀeraseꢀoperation,ꢀandꢀafterꢀtheꢀTready1(<=20us)ꢀsuspendꢀfinishesꢀ
andꢀtheꢀdeviceꢀwillꢀenterꢀerase-suspendedꢀreadꢀarrayꢀmode.ꢀUserꢀcanꢀjudgeꢀifꢀtheꢀdeviceꢀhasꢀfinishedꢀeraseꢀsus-
pendꢀthroughꢀQ6,ꢀQ7,ꢀandꢀRY/BY#.
Afterꢀdeviceꢀhasꢀenteredꢀerase-suspendedꢀreadꢀarrayꢀmode,ꢀuserꢀcanꢀreadꢀotherꢀsectorsꢀnotꢀatꢀeraseꢀsuspendꢀ
byꢀtheꢀspeedꢀofꢀTaa;ꢀwhileꢀreadingꢀtheꢀsectorꢀinꢀerase-suspendꢀmode,ꢀdeviceꢀwillꢀoutputꢀitsꢀstatus.ꢀUserꢀcanꢀuseꢀ
Q6ꢀandꢀQ2ꢀtoꢀjudgeꢀtheꢀsectorꢀisꢀerasingꢀorꢀtheꢀeraseꢀisꢀsuspended.
Status
Q7
1
Q6
Noꢀtoggle
Data
Q5
0
Q3
Q2
RY/BY#
Eraseꢀsuspendꢀreadꢀinꢀeraseꢀsuspendedꢀsector
Eraseꢀsuspendꢀreadꢀinꢀnon-eraseꢀsuspendedꢀsector
Eraseꢀsuspendꢀprogramꢀinꢀnon-eraseꢀsuspendedꢀsector
N/A Toggle
1
1
0
Data
Q7#
Data
0
Data
N/A
Data
N/A
Toggle
Whenꢀtheꢀdeviceꢀhasꢀsuspendedꢀerasing,ꢀuserꢀcanꢀexecuteꢀtheꢀcommandꢀsetsꢀexceptꢀsectorꢀeraseꢀandꢀchipꢀ
erase,ꢀsuchꢀasꢀreadꢀsiliconꢀID,ꢀsectorꢀprotectꢀverify,ꢀprogram,ꢀandꢀeraseꢀresume.ꢀ
SECTOR ERASE RESUME
Sectorꢀeraseꢀresumeꢀcommandꢀisꢀvalidꢀonlyꢀwhenꢀtheꢀdeviceꢀisꢀinꢀeraseꢀsuspendꢀstate.ꢀAfterꢀeraseꢀresume,ꢀuserꢀ
canꢀissueꢀanotherꢀeraseꢀsuspendꢀcommand,ꢀbutꢀthereꢀshouldꢀbeꢀaꢀ400usꢀintervalꢀbetweenꢀeraseꢀresumeꢀandꢀ
theꢀnextꢀeraseꢀsuspend.ꢀIfꢀuserꢀissueꢀinfiniteꢀsuspend-resumeꢀloop,ꢀorꢀsuspend-resumeꢀexceedsꢀ1024ꢀtimes,ꢀtheꢀ
timeꢀforꢀerasingꢀwillꢀincrease.
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
ABSOLUTE MAXIMUM STRESS RATINGS
SurroundingꢀTemperatureꢀwithꢀBias
StorageꢀTemperature
VCCꢀꢀ
-65°Cꢀtoꢀ+125°C
-65°Cꢀtoꢀ+150°C
-0.5Vꢀtoꢀ+7.0V
-0.5Vꢀtoꢀ+12.5V
-0.5VꢀtoꢀVCC+0.7V
200ꢀmA
VoltageꢀRange
RESET#,ꢀA9
Theꢀotherꢀpins.
OutputꢀShortꢀCircuitꢀCurrentꢀ(lessꢀthanꢀoneꢀsecond)
OPERATING TEMPERATURE AND VOLTAGE
Aꢀ
Commercial (C) Grade
Industrial (I) Grade
SurroundingꢀTemperatureꢀ(T )
0°Cꢀtoꢀ+70°C
Aꢀ
SurroundingꢀTemperatureꢀ(T )
-40°Cꢀtoꢀ+85°C
+4.5ꢀVꢀtoꢀ5.5ꢀV
ꢀ
range
VCC
Supply Voltages
VCC
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
DC CHARACTERISTICS ꢀ
Symbol Description
Min.
Typ.
Max.
±1.0uA
10uA
Remark
Iilk
Iolk
Iilk9
Icr1
Icr2
InputꢀLeak
ꢀ
OutputꢀLeak
A9ꢀLeak
35uA
A9:ꢀ12.5V
ReadꢀCurrentꢀ(10MHz)
ReadꢀCurrentꢀ(5MHz)
50mA
40mA
CE#=Vil,ꢀOE#=Vih
CE#=Vil,ꢀOE#=Vih
Vcc=Vccꢀmax,ꢀ
CE#=Vih
Isb1
StandbyꢀCurrentꢀ(TTL)
ꢀ
1mA
otherꢀpinꢀdisable
Vcc=Vccmax,ꢀ
Isb2
Icw
Standbyꢀcurrentꢀ(CMOS)
WriteꢀCurrent
1uA
ꢀ
50uA
CE#=vccꢀ+0.3V,ꢀ
otherꢀpinꢀdisable
CE#=Vil,ꢀOE#=Vih,
WE#=Vil
ꢀ
50mA
Vil
InputꢀLowꢀVoltage
InputꢀHighꢀVoltage
-0.3V
ꢀ
ꢀ
0.8V
Vih
0.7xVcc
Vcc+0.3V
VeryꢀHighꢀVoltageꢀforꢀhardwareꢀProtect/
Unprotect/AutoꢀSelect/
Vhv
11.5V
12V
12.5V
0.45V
TemporaryꢀUnprotect
Iol=2.1mA,ꢀ
Vol
OutputꢀLowꢀVoltage
Vcc=Vccꢀmin
Voh1
Voh2
OuputꢀHighꢀVoltageꢀ(TTL)
2.4V
Ioh1=-2mA
OuputꢀHighꢀVoltageꢀ(CMOS)
Vcc-0.4V
Ioh2=-100uA
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MX29F800C T/B
SWITCHING TEST CIRCUITS
Vcc
R2
TESTED DEVICE
V
0.1uF
CL
R1
DIODES=IN3064
OR EQUIVALENT
R1=6.2Kꢀohm
R2=2.7Kꢀohm
TestꢀConditionꢀ
OutputꢀLoadꢀ:ꢀ1ꢀTTLꢀgate
OutputꢀLoadꢀCapacitance,CLꢀ:ꢀ30PFꢀforꢀ70ns
Rise/FallꢀTimesꢀ:ꢀ10ns
Inputꢀpulseꢀlevels:ꢀ0.45V/0.7xVcc
Referenceꢀlevelsꢀforꢀmeasuringꢀtimingꢀ:0.8V,ꢀ2.0V
SWITCHING TEST WAVEFORMS
0.7xVCC
2.0V
2.0V
TEST POINTS
0.8V
0.8V
0.45V
INPUT
OUTPUT
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
AC CHARACTERISTICS
Symbol Description
Speed Option -70
Unit
Min.
Typ.
Max.
70
Taa
Tce
Toe
Tdf
Validꢀdataꢀoutputꢀafterꢀaddressꢀ
ns
ns
ns
ns
ValidꢀdataꢀoutputꢀafterꢀCE#ꢀlow
ValidꢀdataꢀoutputꢀafterꢀOE#ꢀlow
DataꢀoutputꢀfloatingꢀafterꢀOE#ꢀhigh
70
30
20
OutputꢀholdꢀtimeꢀfromꢀtheꢀearliestꢀrisingꢀedgeꢀofꢀAddress,ꢀ
CE#,ꢀOE#
Toh
0
ꢀ
ns
Trc
Readꢀperiodꢀtime
70
70
70
0
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
ns
ns
Twc Writeꢀperiodꢀtime
Tcwc Commandꢀwriteꢀperiodꢀtime
Tas
Tah
Tds
Addressꢀsetupꢀtime
Addressꢀholdꢀtime
Dataꢀsetupꢀtime
45
30
0
Tdh Dataꢀholdꢀtime
Tvcs Vccꢀsetupꢀtime
50
0
Tcs
Tch
CE#ꢀSetupꢀtime
CE#ꢀholdꢀtime
0
Toes Outputꢀenableꢀsetupꢀtime
0
Read
0
Toeh Outputꢀenableꢀholdꢀtime
Toggleꢀ &ꢀ Data#ꢀ
Polling
10
ns
Tws WE#ꢀsetupꢀtime
Twh WE#ꢀholdꢀtime
0
ns
ns
ns
ns
ns
0
Tcep CE#ꢀpulseꢀwidth
Tceph CE#ꢀpulseꢀwidthꢀhigh
Twp WE#ꢀpulseꢀwidth
35
20
35
Twph WE#ꢀpulseꢀwidthꢀhigh
30
0
ns
Tghwl Readꢀrecoverꢀtimeꢀbeforeꢀwrite
Tbusy Program/EraseꢀactiveꢀtimeꢀbyꢀRY/BY#
ns
ns
90
300
360
32
Byte
9
11
8
us
Tavt Programꢀoperation
Word
us
Taetc ChipꢀEraseꢀoperationꢀ
Taetb SectorꢀEraseꢀoperation
Tbal Sectorꢀaddressꢀholdꢀtime
sec
sec
us
0.7
15
40
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
Figure 1. COMMAND WRITE OPERATION
Tcwc
Vih
CE#
Vil
Tch
Tcs
Vih
WE#
Vil
Twph
Toes
Twp
Vih
Vil
OE#
Vih
Vil
Addresses
VA
Tah
Tas
Tdh
Tds
Vih
Vil
Data
DIN
VA: Valid Address
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MX29F800C T/B
READ/RESET OPERATION
Figure 2. READ TIMING WAVEFORMS
Tce
Vih
CE#
Vil
Vih
WE#
Vil
Tdf
Toe
Vih
OE#
Vil
Toh
Taa
Trc
Vih
ADD Valid
Addresses
Vil
HIGH Z
HIGH Z
Voh
Vol
Outputs
DATA Valid
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
AC CHARACTERISTICS
Item Description
Setup Speed
Unit
us
Trp1 RESET#ꢀPulseꢀWidthꢀ(DuringꢀAutomaticꢀAlgorithms)
Trp2 RESET#ꢀPulseꢀWidthꢀ(NOTꢀDuringꢀAutomaticꢀAlgorithms)
MIN
MIN
MIN
MIN
MIN
MAX
MAX
10
500
0
ns
Trh
RESET#ꢀHighꢀTimeꢀBeforeꢀRead
ns
Trb1 RY/BY#ꢀRecoveryꢀTimeꢀ(toꢀCE#,ꢀOE#ꢀgoꢀlow)
0
ns
Trb2 RY/BY#ꢀRecoveryꢀTimeꢀ(toꢀWE#ꢀgoꢀlow)
50
20
500
ns
Tready1 RESET#ꢀPINꢀLowꢀ(DuringꢀAutomaticꢀAlgorithms)ꢀtoꢀReadꢀorꢀWriteꢀ
Tready2 RESET#ꢀPINꢀLowꢀ(NOTꢀDuringꢀAutomaticꢀAlgorithms)ꢀtoꢀReadꢀorꢀWriteꢀ
us
ns
Figure 3. RESET# TIMING WAVEFORM
Trb1
CE#, OE#
Trb2
WE#
Tready1
RY/BY#
RESET#
Trp1
Reset Timing during Automatic Algorithms
CE#, OE#
Trh
RY/BY#
RESET#
Trp2
Tready2
Reset Timing NOT during Automatic Algorithms
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Rev. 1.3, December 13, 2017
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MX29F800C T/B
ERASE/PROGRAM OPERATION
Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM
CE#
Tch
Taetc
WE#
Tcs
OE#
Last 2 Erase Command Cycle
Read Status
Tah
Twc
Tas
VA
VA
2AAh
SA
Address
Tds
Tdh
In
Complete
Progress
55h
10h
Data
Tbusy
Trb
RY/BY#
SA: 555h for chip erase
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MX29F800C T/B
Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 80H Address 555H
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 10H Address 555H
Data# Polling Algorithm or
Toggle Bit Algorithm
NO
Data=FFh ?
YES
Auto Chip Erase Completed
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MX29F800C T/B
Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM
Read Status
CE#
Tch
Taetb
WE#
Tcs
OE#
Tbal
Last 2 Erase Command Cycle
Twc
Tas
Sector
Address 0
Sector
Address 1
Sector
Address n
VA
VA
2AAh
Address
Tah
Tds Tdh
In
Progress
Complete
55h
30h
30h
30h
Data
Tbusy
Trb
RY/BY#
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MX29F800C T/B
Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 80H Address 555H
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data 30H Sector Address
NO
Last Sector
to Erase
YES
Data# Polling Algorithm or
Toggle Bit Algorithm
NO
Data=FFh
YES
Auto Sector Erase Completed
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MX29F800C T/B
Figure 8. ERASE SUSPEND/RESUME FLOWCHART
START
Write Data B0H
ERASE SUSPEND
NO
Toggle Bit checking Q6
not toggled
YES
Read Array or
Program
Reading or
NO
Programming End
YES
Write Data 30H
ERASE RESUME
Continue Erase
Another
NO
Erase Suspend ?
YES
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MX29F800C T/B
Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS
CE#
Tch
Tavt
WE#
Tcs
OE#
Last 2 Program Command Cycle
Last 2 Read Status Cycle
Tah
Tas
VA
VA
555h
PA
Address
Tdh
Tds
Status
A0h
PD
DOUT
Data
Tbusy
Trb
RY/BY#
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MX29F800C T/B
Figure 10. CE# CONTROLLED WRITE TIMING WAVEFORM
WE#
Tavt or Taetb
Tcep
Twh
Tws
CE#
OE#
Tceph
Tghwl
Tah
Tas
VA
VA
555h
PA
Address
Tdh
Tds
Status
A0h
PD
DOUT
Data
Tbusy
RY/BY#
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MX29F800C T/B
Figure 11. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART
START
Write Data AAH Address 555H
Write Data 55H Address 2AAH
Write Data A0H Address 555H
Write Program Data/Address
Data# Polling Algorithm or
Toggle Bit Algorithm
next address
No
Read Again Data:
Program Data?
YES
No
Last Word to be
Programed
YES
Auto Program Completed
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MX29F800C T/B
SECTOR PROTECT/CHIP UNPROTECT
Figure 12. SECTOR PROTECT/CHIP UNPROTECT WAVEFORM (RESET# Control)
150uS: Sector Protect
1us
15mS: Chip Unprotect
CE#
WE#
OE#
Verification
40h
Status
VA
Data
60h
60h
VA
SA, A6
A1, A0
VA
Vhv
Vih
RESET#
VA: valid address
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MX29F800C T/B
Figure 13-1. IN-SYSTEM SECTOR PROTECT WITH RESET#=Vhv
START
Retry count=0
RESET#=Vhv
Wait 1us
Temporary Unprotect Mode
No
First CMD=60h?
Yes
Write Sector Address
with [A6,A1,A0]:[0,1,0]
data: 60h
Wait 150us
Reset
PLSCNT=1
Write Sector Address
with [A6,A1,A0]:[0,1,0]
data: 40h
Retry Count +1
Read at Sector Address
with [A6,A1,A0]:[0,1,0]
No
No
Data=01h?
Yes
Retry Count=25?
Yes
Device fail
Yes
Protect another
sector?
No
Temporary Unprotect Mode
RESET#=Vih
Write RESET CMD
Sector Protect Done
P/N:PM1493
Rev. 1.3, December 13, 2017
31
MX29F800C T/B
Figure 13-2. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv
START
Retry count=0
RESET#=Vhv
Wait 1us
Temporary Unprotect
No
First CMD=60h?
Yes
No
All sectors
protected?
Protect All Sectors
Yes
Write [A6,A1,A0]:[1,1,0]
data: 60h
Wait 15ms
Write [A6,A1,A0]:[1,1,0]
data: 40h
Retry Count +1
Read [A6,A1,A0]:[1,1,0]
No
No
Retry Count=1000?
Data=00h?
Yes
Yes
Device fail
Temporary Unprotect
Write reset CMD
Chip Unprotect Done
P/N:PM1493
Rev. 1.3, December 13, 2017
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MX29F800C T/B
Table 5. TEMPORARY SECTOR UNPROTECT
Parameter Alt Description
Condition Speed
Unit
ns
Trpvhh Tvidr RESET#ꢀRiseꢀTimeꢀtoꢀVhvꢀandꢀVhvꢀFallꢀTimeꢀtoꢀRESET#
Tvhhwl Trsp RESET#ꢀVhvꢀtoꢀWE#ꢀLow
MIN
MIN
500
4
us
Figure 14. TEMPORARY SECTOR UNPROTECT WAVEFORMS
Program or Erase Command Sequence
CE#
WE#
Tvhhwl
RY/BY#
Vhv 12V
RESET#
0 or 5V
0 or 5V
Trpvhh
Trpvhh
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MX29F800C T/B
Figure 15. TEMPORARY SECTOR UNPROTECT FLOWCHART
Start
Apply RESET# pin Vhv Volt
Enter Program or Erase Mode
Mode Operation Completed
(1) Remove Vhv Volt from RESET#
(2) RESET# = Vih
Completed Temporary Sector
Unprotected Mode
Notes:
1.ꢀTemporaryꢀunprotectꢀallꢀprotectedꢀsectorsꢀVhv=11.5ꢀ~ꢀ12.5V.
2.ꢀTheꢀprotectedꢀconditionsꢀofꢀtheꢀprotectedꢀsectorsꢀareꢀtheꢀsameꢀtoꢀtemporaryꢀsectorꢀunprotectꢀmode.
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MX29F800C T/B
Figure 16. SILICON ID READ TIMING WAVEFORM
Vih
CE#
Vil
Tce
Vih
WE#
Vil
Toe
Vih
OE#
Vil
Tdf
Toh
Toh
Vhv
Vih
A9
Vil
Vih
A0
Vil
Taa
Taa
Vih
A1
Vil
Vih
ADD
Vil
Vih
DATA
Q0-Q7
DATA OUT
C2H
DATA OUT
Vil
23H (TOP boot)
ABH (Bottom boot)
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MX29F800C T/B
WRITE OPERATION STATUS
Figure 17. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tce
CE#
Tch
WE#
Toe
OE#
Toeh
Tdf
Trc
VA
VA
Address
Taa
Toh
High Z
High Z
Complement
Complement
Status Data
True
True
Valid Data
Valid Data
Q7
Q0-Q6
Status Data
Tbusy
RY/BY#
P/N:PM1493
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MX29F800C T/B
Figure 18. DATA# POLLING ALGORITHM
Start
Read Q7~Q0 at valid address
(Note 1)
No
Q7 = Data# ?
Yes
No
Q5 = 1 ?
Yes
Read Q7~Q0 at valid address
No
Q7 = Data# ?
(Note 2)
Yes
FAIL
Pass
Notes:
1.ꢀꢀForꢀprogramming,ꢀvalidꢀaddressꢀmeansꢀprogramꢀaddress.
ꢀꢀꢀꢀꢀForꢀerasing,ꢀvalidꢀaddressꢀmeansꢀeraseꢀsectorsꢀaddress.
2.ꢀQ7ꢀshouldꢀbeꢀrecheckedꢀevenꢀQ5="1"ꢀbecauseꢀQ7ꢀmayꢀchangeꢀsimultaneouslyꢀwithꢀQ5.
P/N:PM1493
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37
MX29F800C T/B
Figure 19. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS)
Tce
CE#
Tch
WE#
OE#
Toe
Tdf
VA
VA
VA
VA
Address
Taa
Toh
Valid Status
(second read)
Valid Status
(first read)
Valid Data
Valid Data
Q6/Q2
(stops toggling)
Tbusy
RY/BY#
Notes:
1. VA : Valid Address
2. CE# must be toggled when toggle bit toggling.
P/N:PM1493
Rev. 1.3, December 13, 2017
38
MX29F800C T/B
Figure 20. TOGGLE BIT ALGORITHM
Start
Read Q7-Q0 Twice
(Note1)
NO
Q6 Toggle ?
YES
NO
Q5 = 1?
YES
Read Q7~Q0 Twice
(Note1, 2)
NO
Q6 Toggle ?
YES
Program/Erase fail
Write Reset CMD
Program/Erase Complete
Notes:
1.ꢀReadꢀtoggleꢀbitꢀtwiceꢀtoꢀdetermineꢀwhetherꢀorꢀnotꢀitꢀisꢀtoggling.
2.ꢀRecheckꢀtoggleꢀbitꢀbecauseꢀitꢀmayꢀstopꢀtogglingꢀasꢀQ5ꢀchangesꢀtoꢀ"1".
P/N:PM1493
Rev. 1.3, December 13, 2017
39
MX29F800C T/B
RECOMMENDED OPERATING CONDITIONS
At Device Power-Up
ACꢀtimingꢀillustratedꢀinꢀFigureꢀAꢀisꢀrecommendedꢀforꢀtheꢀsupplyꢀvoltagesꢀandꢀtheꢀcontrolꢀsignalsꢀatꢀdeviceꢀpower-
up.ꢀIfꢀtheꢀtimingꢀinꢀtheꢀfigureꢀisꢀignored,ꢀtheꢀdeviceꢀmayꢀnotꢀoperateꢀcorrectly.
Vcc(min)
Vcc
GND
Tvr
Tvcs
Tf
Tce
Tr
Vih
Vil
CE#
WE#
OE#
Vih
Vil
Tf
Toe
Tr
Vih
Vil
Taa
Tr or Tf
Tr or Tf
Vih
Vil
Valid
Address
ADDRESS
DATA
Voh
Vol
High Z
Valid
Ouput
Figure A. AC Timing at Device Power-Up
Symbol
Tvr
Tr
Tf
Tvcs
Parameter
VccꢀRiseꢀTime
InputꢀSignalꢀRiseꢀTime
InputꢀSignalꢀFallꢀTime
Vccꢀsetupꢀtime
Min.
20
ꢀ
ꢀ
Max.
500000
20
Unit
us/V
us/V
us/V
us
20
50
P/N:PM1493
Rev. 1.3, December 13, 2017
40
MX29F800C T/B
ERASE AND PROGRAMMING PERFORMANCE
ꢀ
ꢀ
Limits
Units
Parameter
Min.
Typ.
9
Max.
300
360
8
ByteꢀProgrammingꢀTime
WordꢀProgrammingꢀTime
SectorꢀEraseꢀTime
us
us
11
0.7
8
sec
ChipꢀEraseꢀTime
32ꢀ
27
sec
ByteꢀMode
WordꢀMode
10
7.5
sec
ChipꢀProgrammingꢀTime
Erase/ProgramꢀCycles
17
sec
100,000
Cycles
Note:ꢀ 1.ꢀTypicalꢀconditionꢀmeansꢀ25 C,ꢀ5V.
°
ꢀ
2.ꢀMaximumꢀconditionꢀmeansꢀ85 C,ꢀ4.5V,ꢀ100Kꢀcycles.
°
LATCH-UP CHARACTERISTICS
Min.
Max.
12.5V
InputꢀVoltageꢀvoltageꢀdifferenceꢀwithꢀGNDꢀonꢀA9,ꢀReset#ꢀpins
InputꢀVoltageꢀvoltageꢀdifferenceꢀwithꢀGNDꢀonꢀallꢀnormalꢀpinsꢀinputs
Inputꢀcurrentꢀpulse
-1.0V
-1.0V
Vccꢀ+ꢀ1.0V
+100mA
-100mA
IncludesꢀallꢀpinsꢀexceptꢀVcc.ꢀꢀTestꢀconditions:ꢀVccꢀ=ꢀ5V,ꢀoneꢀpinꢀperꢀtesting
PIN CAPACITANCE
Parameter Symbol Parameter Description
Test Set
VIN=0
Typ.
Max.
Unit
pF
CIN2
COUT
CIN
ControlꢀPinꢀCapacitance
OutputꢀCapacitance
InputꢀCapacitance
12
12
8
VOUT=0
VIN=0
pF
pF
P/N:PM1493
Rev. 1.3, December 13, 2017
41
MX29F800C T/B
ORDERING INFORMATION
Access Time
Temperature
Range
Part No.
Package
Remark
(ns)
RoHSꢀ
Compliant
RoHSꢀ
Compliant
RoHSꢀ
Compliant
RoHSꢀ
Compliant
RoHSꢀ
MX29F800CTMI-70G
MX29F800CBMI-70G
MX29F800CTTI-70G
MX29F800CBTI-70G
MX29F800CTXEI-70G
MX29F800CBXEI-70G
70
-40oC~85oC
-40oC~85oC
-40oC~85oC
-40oC~85oC
-40oC~85oC
-40oC~85oC
44ꢀPinꢀSOP
70
70
70
70
70
44ꢀPinꢀSOP
48ꢀPinꢀTSOPꢀ(NormalꢀType)
48ꢀPinꢀTSOPꢀ(NormalꢀType)
48ꢀBallꢀLFBGAꢀ(6x8mm)
48ꢀBallꢀLFBGAꢀ(6x8mm)
Compliant
RoHSꢀ
Compliant
P/N:PM1493
Rev. 1.3, December 13, 2017
42
MX29F800C T/B
PART NAME DESCRIPTION
MX 29 F 800 C T T
I
70 G
OPTION:
G: RoHS Compliant
SPEED:
70:70ns
TEMPERATURE RANGE:
I: Industrial (-40°C to 85°C)
PACKAGE:
M:SOP
T: TSOP
XE: LFBGA (6x8x1.3mm, Pitch 0.8mm, 0.4mm Ball)
BOOT BLOCK TYPE:
T: Top Boot
B: Bottom Boot
REVISION:
C
DENSITY & MODE:
800: 8M, x8/x16 Boot Sector
TYPE:
F: 5V
DEVICE:
29: Flash
P/N:PM1493
Rev. 1.3, December 13, 2017
43
MX29F800C T/B
PACKAGE INFORMATION
P/N:PM1493
Rev. 1.3, December 13, 2017
44
MX29F800C T/B
P/N:PM1493
Rev. 1.3, December 13, 2017
45
MX29F800C T/B
P/N:PM1493
Rev. 1.3, December 13, 2017
46
MX29F800C T/B
REVISION HISTORY
Revision No. Description
Page
Date
1.0ꢀ
1.ꢀRemovedꢀ"Preliminary"ꢀ
P1ꢀ
NOV/17/2009
ꢀ
ꢀ
ꢀ
2.ꢀRemovedꢀ90nsꢀgradeꢀatꢀOrderꢀInformationꢀ
3.ꢀModifiedꢀTbalꢀspecꢀfromꢀ50usꢀtoꢀ40usꢀ
4.ꢀModifiedꢀtypicalꢀchipꢀprogrammingꢀtimeꢀꢀ
P1,18,42,43
P13,17
P41
1.1ꢀ
ꢀ
1.ꢀAddedꢀTvcs,ꢀToeh,ꢀTwp,ꢀTwphꢀandꢀTghwlꢀ
2.ꢀModifiedꢀdescriptionꢀwordingꢀforꢀ"RoHSꢀCompliant"ꢀ
P18,19,40ꢀ NOV/21/2011
P1,42,43
1.2ꢀ
1.ꢀModifiedꢀ48-ballꢀLFBGAꢀpackageꢀtypeꢀ
P1,3,42,43ꢀ JUL/05/2012
1.3ꢀ
ꢀ
ꢀ
1.ꢀAddedꢀTrc,ꢀTwsꢀ&ꢀTwhꢀvaluesꢀ
2.ꢀRevisedꢀ48-TSOPꢀ&ꢀ44-SOPꢀpackageꢀoutlineꢀ
3.ꢀFormatꢀmodification.ꢀ
P18,28ꢀ
P44,45
P44-46
DEC/13/2017
P/N:PM1493
Rev. 1.3, December 13, 2017
47
MX29F800C T/B
Exceptꢀforꢀcustomizedꢀproductsꢀwhichꢀhasꢀbeenꢀexpresslyꢀidentifiedꢀinꢀtheꢀapplicableꢀagreement,ꢀMacronix'sꢀ
productsꢀareꢀdesigned,ꢀdeveloped,ꢀand/orꢀmanufacturedꢀforꢀordinaryꢀbusiness,ꢀindustrial,ꢀpersonal,ꢀand/orꢀ
householdꢀapplicationsꢀonly,ꢀandꢀnotꢀforꢀuseꢀinꢀanyꢀapplicationsꢀwhichꢀmay,ꢀdirectlyꢀorꢀindirectly,ꢀcauseꢀdeath,ꢀ
personalꢀinjury,ꢀorꢀsevereꢀpropertyꢀdamages.ꢀInꢀtheꢀeventꢀMacronixꢀproductsꢀareꢀusedꢀinꢀcontradictedꢀtoꢀtheirꢀ
targetꢀusageꢀabove,ꢀtheꢀbuyerꢀshallꢀtakeꢀanyꢀandꢀallꢀactionsꢀtoꢀensureꢀsaidꢀMacronix'sꢀproductꢀqualifiedꢀforꢀitsꢀ
actualꢀuseꢀinꢀaccordanceꢀwithꢀtheꢀapplicableꢀlawsꢀandꢀregulations;ꢀandꢀMacronixꢀasꢀwellꢀasꢀit’sꢀsuppliersꢀand/orꢀ
distributorsꢀshallꢀbeꢀreleasedꢀfromꢀanyꢀandꢀallꢀliabilityꢀarisenꢀtherefrom.ꢀ
Copyright©ꢀMacronixꢀInternationalꢀCo.,ꢀLtd.ꢀ2009~2017.ꢀAllꢀrightsꢀreserved,ꢀincludingꢀtheꢀtrademarksꢀandꢀ
tradenameꢀthereof,ꢀsuchꢀasꢀMacronix,ꢀMXIC,ꢀMXICꢀLogo,ꢀMXꢀLogo,ꢀIntegratedꢀSolutionsꢀProvider,ꢀNbit,ꢀ
MacronixꢀNBit,ꢀeLiteFlash,ꢀHybridNVM,ꢀHybridFlash,ꢀHybridXFlash,ꢀXtraROM,ꢀPhines,ꢀKHꢀLogo,ꢀBE-SONOS,ꢀ
KSMC,ꢀKingtech,ꢀMXSMIO,ꢀMacronixꢀvEE,ꢀMacronixꢀMAP,ꢀRichꢀBook,ꢀRichꢀTV,ꢀOctaRAM,ꢀOctaBus,ꢀOctaFlashꢀ
andꢀFitCAM.ꢀTheꢀnamesꢀandꢀbrandsꢀofꢀthirdꢀpartyꢀreferredꢀtheretoꢀ(ifꢀany)ꢀareꢀforꢀidentificationꢀpurposesꢀonly.
Forꢀtheꢀcontactꢀandꢀorderꢀinformation,ꢀpleaseꢀvisitꢀMacronix’sꢀWebꢀsiteꢀat:ꢀhttp://www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
48
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