TESVSP0E475M8L [NEC]
CAPACITOR, TANTALUM, SOLID, POLARIZED, 2.5V, 4.7uF, SURFACE MOUNT, 0805, CHIP;
| 型号： | TESVSP0E475M8L |
| 厂家： | 
NEC |
| 描述： | CAPACITOR, TANTALUM, SOLID, POLARIZED, 2.5V, 4.7uF, SURFACE MOUNT, 0805, CHIP |
| 文件： | 总16页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA S HEET
SOLID TANTALUM CAPACITOR
SVS SERIES
Surface m ount resin m olded, Ultra m iniaturized chip
The SVS series is a line-up of high perform ance ultra m iniaturized tantalum chip capacitors.
The case dim ensions are 2.0 m m × 1.25 m m × 1.2 m m as shown below.
FEATURES
™ The sm allest m olded chip tantalum capacitor (half size of the EIA standard A case)
™ Available up to 10 µF with case dim ension of 2.0 m m × 1.25 m m × 1.2 m m (case code P)
APPLICATIONS
™ Portable stereos
™ VCR cam eras
™ Hearing aids
DIMENSIONS
2.0 ±0.2
1.25 ±0.2
1.2 max.
0.5 ± 0 .2
0.5 ± 0 .2
0.9 ±0 .1
(Unit : mm)
The inform ation in this docum ent is subject to change w ithout notice.
Docum ent No. EC0062EJ 6V0DS00 (6th edition)
Date Published February 1998 M
Printed in J apan
( )
1992 1996
©
SVS SERIES
PRODUCT LINE-UP AND MARKING CODE
UR
(Vdc)
2.5
4
6.3
10
16
Capacitance
(µF)
0.33
CN
CS
0.47
0.68
AW
AA
AE
AJ
CW
CA
1
J A
J E
1.5
GE
GJ
2.2
eJ
eN
J J
3.3
GN
GS
J N
J S
AN
4.7
eS
6.8
10
eW
7eA
GW
7GA
J W
7J A
UR : Rated voltage
Marking detail
up to 6.8
µ
F
10 µF
+
Polarity
Production date code
(indicated by dots)
J A
7 J A
Marking code
(corresponding to rated
voltage and capacitance)
Implement date code on trial.
PART NUMBER SYSTEM
[BULK]
[TAPE & REEL]
SVS
P
0J 105
M
TE SVSP0J 105M 8 R
Capacitance tolerance ±20%
Packing orientation
Part number of bulk
(see left)
R : (Standard)
Capacitance code in pF
Orientation
Tape
Feed direction
Feed direction
First two digits represent significant
figures. Third digit specifies number
of zeros to follow.
Polarity mark
Polarity mark
L : (Non-Standard)
Orientation
Rated voltage
Tape and reel
0E : 2.5 V, 0G : 4 V, 0J : 6.3 V
1A : 10 V, 1C : 16 V
Tape
Case code
SVS series
Tape width 8 mm
2
SVS SERIES
RATINGS
Rated Voltage
Capacitance
Leakage Current
Tangent of loss angle
Part Num ber
(Vdc)
(µF)
(µA)
2.2
3.3
4.7
6.8
10
0.1
0.1
0.2
0.2
0.2
0.1
0.1
0.2
0.2
0.2
0.2
0.1
0.1
0.2
0.2
0.2
0.2
0.2
0.1
0.1
0.2
0.2
0.2
0.1
0.1
0.1
0.2
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.6
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
SVSP0E225M
SVSP0E335M
SVSP0E475M
SVSP0E685M
SVSP0E106M
SVSP0G155M
SVSP0G225M
SVSP0G335M
SVSP0G475M
SVSP0G685M
SVSP0G106M
SVSP0J 105M
SVSP0J 155M
SVSP0J 225M
SVSP0J 335M
SVSP0J 475M
SVSP0J 685M
SVSP0J 106M
SVSP1A684M
SVSP1A105M
SVSP1A155M
SVSP0A225M
SVSP0A335M
SVSP1C334M
SVSP1C474M
SVSP1C684M
SVSP1C105M
2.5
1.5
2.2
3.3
4.7
6.8
10
4
1
1.5
2.2
3.3
4.7
6.8
10
6.3
0.68
1
10
16
1.5
2.2
3.3
0.33
0.47
0.68
1
3
SVS SERIES
SPECIFICATIONS
No.
Item s
Specifications
–55 to +125˚C
Test Conditions
Over 85˚C, applied voltage shall be derated
on the basis of the Derated Voltage at
125˚C specified in this table item no.4.
1
Operating Tem p. Range
2
3
4
5
6
7
8
Rated Voltage
2.5
3.3
1.6
4
6.3
8
10
13
16
20
10
Vdc
Vdc
Vdc
up to 85˚C
Surge Voltage
5.2
2.5
up to 85˚C
Derated Voltage
4
6.3
at 125˚C
Capacitance Range
Capacitance Tolerance
Leakage Current
Tangent of loss angle
0.33 to 10 µF
±20%
at 120 Hz
at 120 Hz
0.5 µA m ax.
5 m in. after rated voltage applied
at 25˚C, 120 Hz
0.1 m ax. / 0.2 m ax. (Refer to ratings)
at 85˚C
C/C
: ±20%
∆
Surge voltage for 30 sec. (Rs = 1 kΩ)
Discharge for 5 m in. 30 sec.
1 000 cycles
Tangent of loss angle : Initial requirem ent
9
Surge Voltage Resistance
Tem p.
Leakage Current
: Initial requirem ent
–55˚C
+85˚C
+125˚C
0
+20
0
+20
Step1 : +25˚C
Step2 : –55˚C
Step3 : +25˚C
Step4 : +85˚C
Step5 : +125˚C
Step6 : +25˚C
C/C
%
%
%
∆
–20
0
Characteris-
tics at high
and low
Tangent of
loss angle
150% of initial
requirem ent
Initial
requirem ent
150%of initial
requirem ent
10
0.1 CV or 5 µA 0.125 CV or 6.25 µA
tem perature
Leakage
Current
––
whichever is
greater
whichever is
greater
IEC68-2-14 Te s t N a n d IEC68-2-33
C/C
: ±20%
∆
Guidance
–55 to +125˚C
5 cycles
Tangent of loss angle : Initial requirem ent
11 Rapid change of tem perature
12 Resistance to soldering
13 Dam p Heat (Steady state)
Leakage Current
: Initial requirem ent
C/C
: ±20%
IEC68-2-58 Test Td
∆
Tangent of loss angle : Initial requirem ent
Fully im m ersion to solder at 260˚C for
5 sec
Leakage Current
: Initial requirem ent
C/C
: ±20%
∆
IEC68-2-3 Test Ca
Tangent of loss angle : 150% of Intial requirem ent
at 40˚C, 90 to 95% RH, for 500H
Leakage Current
: Initial requirem ent
C/C
: ±20%
∆
at 85˚C & 125˚C (Derated Voltage),
rated voltage applied for 2 000 H
Tangent of loss angle : Initial requirem ent
Leakage Current : 200% of Initial requirem ent
14 Endurance
15 Failure Rate
at 85˚C & 125˚C (Derated Voltage),
rated voltage applied for 1 000 H
λ0 = 1% /1 000 h
C/C : Capacitance change ratio
∆
4
SVS SERIES
TAPE AND REEL SPECIFICATION
[Carrier Tape Specification and Packing Quantity]
sprocket hole
embossed cavity
D
0
E
F
W
B
0
t
A0
P
1
P
2
P
0
K
Feed direction
(Unit : m m )
+0.1
A0±0.2
B0±0.2
W±0.3
F±0.05
E±0.1
P1±0.1
4.0
P2±0.05
P0±0.1
D0
K±0.2
t
Q'ty/Reel
3000
0
φ
1.4
2.2
8.0
3.5
1.75
2.0
4.0
1.5
1.4
0.2
[Reel Specification]
W
1
B
D
C
N
A
R
W
2
(Unit : m m )
Tape width
8
A
N
C
D
B
W1
W2
R
1
φ178 ±2.0
φ50 m in.
φ13 ±0.5
φ21±0.5
2.0 ±0.5
10.0 ±1.0
14.5 m ax.
5
SVS SERIES
CHARACTERISTICS DATA
Characteristics at high and low tem perature
30
20
10
0
30
20
10
0
∆
∆
–10
–10
–20
–30
–20
–30
δ
δ
0.08
0.08
0.06
0.04
0.02
0
0.06
0.04
0.02
0
0.1
0.1
µ
µ
0.01
0.01
0.001
0.001
25˚C –55˚C 25˚C 85˚C 125˚C 25˚C
2.5 V/2.2 µF
25˚C –55˚C 25˚C 85˚C 125˚C 25˚C
6.3 V/1 µF
6
SVS SERIES
Resistance to soldering (im m ersing for 10 sec. at 260˚C)
(reference data)
15
10
5
15
10
5
0
0
∆
∆
–5
–5
–10
–15
–10
–15
δ
δ
0.08
0.06
0.04
0.02
0
0.08
0.06
0.04
0.02
0
0.1
0.1
µ
µ
0.01
0.01
0.001
0.001
Initial
Final
Initial
Final
2.5 V/2.2 µF
6.3 V/1 µF
7
SVS SERIES
Dam p heat, steady state (65˚C, 90 to 90% RH)
(reference data)
15
10
5
15
10
5
0
0
∆
∆
–5
–5
–10
–15
–10
–15
δ
δ
0.08
0.06
0.04
0.02
0
0.08
0.06
0.04
0.02
0
0.1
0.1
µ
µ
0.01
0.01
0.001
0.001
0 h
500 h
1 000 h
0 h
500 h
1 000 h
2.5 V/2.2
µ
F
6.3 V/1 µF
8
SVS SERIES
Endurance (85˚C, Rated voltage × 1.3 applied)
(reference data)
30
20
30
20
10
0
10
0
∆
∆
–10
–20
–30
–10
–20
–30
δ
δ
0.08
0.06
0.04
0.02
0
0.08
0.06
0.04
0.02
0
0.1
0.1
µ
µ
0.01
0.01
0.001
0.001
0 h
500 h
1 000 h
0 h
500 h
6.3 V/1 µF
1 000 h
2.5 V/2.2 µF
9
SVS SERIES
Im pedance – Frequency characteristics (reference data)
1 k
100
10
6.3 V/1 µF
1
1 k
10 k
100 k
1 M
10 M
Frequency (Hz)
10
SVS SERIES
GUIDE TO APPLICATIONS FOR TANTALUM CHIP CAPACITORS
The failure of the solid tantalum capacitor is m ostly classified into a short-circuiting m ode and a large leakage
current m ode. Refer to the following for reliable circuit design.
1. Expecting Reliability
SVS series tantalum chip capacitors are typically applied to decoupling, blocking, bypassing and filtering.
The SVS series has a very high reliability (low failure rate) in the field. For exam ple, the m axim um field failure
rate of an SVS series capacitor with a DC rated voltage of 16 V is 0.0004% / 1000 hour (4 Fit) at an applied voltage
of 5 V, operating tem perature of 25˚C and series resistance of 3 Ω.
The m axim um failure rate in the field is estim ated by the following expression :
3
T-T
10
0
V
λ = λ 0
× 2
V0
λ : Maxim um field failure rate
λ0 : 1% /1000 hour (The failure rate of the SVS series at the full DC rated voltage at operating
te m p e rature of 85˚C and series resistance of 3 Ω.)
V : Applied voltage in actual use
V0 : DC Rated voltage
T : Operating tem perature in actual use
T0 : 85˚C
The nomograph is provided for quick estimation of
maximum field failure rates.
120
110
100
90
102
7
Connect operating temperature
T and applied
4
voltage ratio V/V of interest with a straight line.
0
2
The failure rate multiplier F is given at the inter-
101
7
section of this line with the model scale. The failure
•
rate is obtained as λ = λ
0
F.
4
2
1.0
0.9
Examples :
100
7
Given V/V
F = 4 × 10 –3
Hence, λ = 0.004% /1000 hour (40 Fit).
Given V/V = 0.3 and T = 25˚C, read
F = 4 × 10 –4
Hence, λ = 0.0004% /1000 hour (4 Fit).
0
= 0.4 and T = 45˚C. read
0.8
4
0.7
2
80
0
0.6
0.5
10–1
7
4
70
2
0.4
0.3
10–2
7
60
4
2
10–3
7
50
0.2
0.1
4
2
40
10–4
7
4
30
2
10–5
20
11
SVS SERIES
2. Series resistance
As shown in Figure 1, reliability is increased by inserting a series resistance of at least 3 Ω/ V into circuits
where current flow is m om entary (switching circuits, charge /discharge circuits, etc).
If the capacitor is in a low-im pedance circuit, the voltage applied to the capacitor should be less than 1/2 to
1/3 of the DC rated voltage.
10
1
0.1
0.1
1
10
100
Series Resistance (Ω/ V)
Figure 1 Effects of series resistance
3. Ripple voltage
The sum of DC voltage and peak ripple voltage should not exceed the DC rated voltage of the capacitor.
100
Case : P @ 25˚C
10
16 V
10 V
6.3 V
4 V
1
2.5 V
0.1
0.1
1
10
100
Frequency (kHz)
Figure 2 Perm issible ripple voltage vs. frequency
Figure 2 is based on an am bient tem perature of 25˚C. For higher tem perature, perm issible ripple voltage shall
be derated as follows.
Perm issible voltage at 50˚C = 0.7 × perm issible voltage at 25˚C
Perm issible voltage at 85˚C = 0.5 × perm issible voltage at 25˚C
Perm issible voltage at 125˚C = 0.3 × perm issible voltage at 25˚C
4. Reverse voltage
Because the capacitors are polarized, reverse voltage should not be applied.
If reverse voltage cannot be avoided because of circuit design, the voltage application should be for a very
short tim e and should not exceed the following.
10% of DC rated voltage at 25˚C
5% of DC rated voltage at 85˚C
1% of DC rated voltage at 125˚C
12
SVS SERIES
5. Mounting
(1) Direct soldering
Keep in m ind the following points when soldering the capacitor by m eans of jet soldering or dip soldering:
(a) Tem porarily fixing resin
Because the SVS series solid tantalum capacitors are larger in size and subject to m ore force than the chip
multilayer ceramic capacitors or chip resistors, more resin is required to temporarily secure the solid tantalum
capacitors. However, if too m uch resin is used, the resin adhering to the patterns on a printed circuit board
m ay adversely affect the solderability.
(b) Pattern design
b
a
c
a
Case
P
a
b
c
2.2
1.4
0.7
The above dim ensions are for reference only. If the capacitor is to be m ounted by this m ethod, and if the
pattern is too sm all, the solderability m ay be degraded.
(e) Tem perature and tim e
Keep the peak tem perature and tim e to within the following values:
Solder tem perature ....... 260˚C m ax.
Tim e ....... 5 seconds m ax.
Whenever possible, perform preheating (at 150˚C m ax.) for sm ooth tem perature profile. To m aintain the
reliability, m ount the capacitor at a low tem perature and in a short tim e whenever possible.
(d) Com ponent layout
If m any types of chip com ponents are m ounted on a printed circuit board which is to be soldered by m eans
of jet soldering, solderability m ay not be uniform over the entire board depending on the layout and
density of the com ponents on the board (also take into consideration generation of flux gas).
(e) Flux
Use resin-based flux. Do not use flux with strong acidity.
13
SVS SERIES
(2)
Reflow soldering
Keep in m ind the following points when soldering the capacitor in a soldering oven or with a hot plate:
(a) Pattern design (In accordance w ith IEC1182)
X
G
Z
Case
P
G m ax.
0.5
Z m in.
2.6
X m in.
1.2
The above dim ensions are recom m ended. Note that if the pattern is too big, the com ponent m ay not be
m ounted in place.
(b) Tem perature and tim e
Keep the peak tem perature and tim e to within the following values:
Solder tem perature …… 260˚C m ax.
Tim e : 10 seconds m ax.
Whenever possible, perform preheating (at 150˚C m ax.) for sm ooth tem perature profile. To m aintain the
reliability, m ount the capacitor at a low tem perature and in a short tim e whenever possible. The peak
tem perature and tim e shown above are applicable when the capacitor is to be soldered in a soldering oven
or with a hot plate. When the capacitor is soldered by m eans of infrared reflow soldering, the internal
tem perature of the capacitor m ay rise beyond the surface tem perature.
(3) Using soldering iron
When soldering the capacitor with a soldering iron, controlling the tem perature at the tip of the soldering iron
is very difficult. However, it is recom m ended that the following tem perature and tim e be observed to m aintain
the reliability of the capacitor:
lron tem perature …… 300˚C m ax.
Tim e ……………………… 3 seconds m ax.
Iron power …………… 30 W m ax.
14
SVS SERIES
6. Cleaning
Generally, several organic solvents are used for flux cleaning of an electronic com ponent after soldering.
Many cleaning m ethods, such as im m ersion cleaning, rinse cleaning, brush cleaning, shower cleaning, vapor
cleaning, and ultrasonic cleaning, are available, and one of these cleaning m ethods m ay be used alone or two
or m ore m ay be used in com bination. The tem perature of the organic solvent m ay vary from room tem perature
to several 10˚C, depending on the desired effect. If cleaning is carried out with em phasis placed only on cleaning
effect, however, the m arking on the electronic com ponent cleaned m ay be erased, the appearance of the com -
ponent m ay be dam aged, and in the worst case, the com ponent m ay be functionally dam aged. It is therefore
recom m ended that the SVS series solid tantalum capacitor be cleaned under the following conditions:
[Recom m ended conditions of flux cleaning]
(1) Cleaning solvent ……… Chlorosen, isopropyl alcohol
(2) Cleaning m ethod …… Shower cleaning, rinse cleaning, vapor cleaning
(3) Cleaning tim e ………… 5 m inutes m ax.
Ultrasonic cleaning
This cleaning m ethod is extrem ely effective for elim inating dust that has been generated as a result of m e-
chanical processes, but m ay pose a problem depending on the condition. As a result of an experim ent conducted
by NEC, it was confirm ed that the external term inals of the capacitor were cut when it was cleaned with som e
ultrasonic cleaning m achines. The cause of this phenom enon is considered m etal fatigue of the capacitor term i-
nals that occurred due to ultrasonic cleaning. To prevent the term inal from being cut, decreasing the output
power of the ultrasonic cleaning m achine or shortening the cleaning tim e m ay be a possible solution. However,
it is difficult to specify the safe cleaning conditions because there are m any factors involved such as the conver-
sion efficiency of the ultrasonic oscillator, transfer efficiency of the cleaning bath, difference in cleaning effect
depending on the location in the cleaning bath, the size and quantity of the printed circuit boards to be cleaned,
and the securing states of the com ponents on the boards. It is therefore recom m ended that ultrasonic cleaning
be avoided as m uch as possible.
If ultrasonic cleaning is essential, m ake sure through experim ents that no abnorm ality occur as a result of the
cleaning. For further inform ation, consult NEC.
7. Others
(1) Do not apply excessive vibration and shock to the capacitor.
(2) The solderability of the capacitor m ay be degraded by hum idity. Store the capacitor at (–5 to +40˚C) room
tem perature and (40 to 60% RH) hum idity.
(3) Exercise care that no external force is applied to the tape packaged products (if the packaging m aterial is
deform ed, the capacitor m ay not be autom atically m ounted by a chip m ounter).
15
SVS SERIES
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
NEC Corporation does not assume any liability for infringement of patents. copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from us e of s uch de vice . No lice ns e , e ithe r e xpre s s , im plie d or othe rw is e , is grante d unde r any pate nts ,
copyrights or other intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its Electronic Conponents,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC Electronic Conponents, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
“Standard”, “Special”, and “Specific”. The Specific quality grade applies only to devices developed based on
a customer designated “quality assurance program” for a specific application. The recommended applications
of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each
device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and
visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots
Spe cial: Trans portation e quipm e nt (autom obile s , trains , s hips , e tc.), traffic control s ys te m s , anti-dis as te r
syste ms, anti-crime syste ms, safe ty e quipme nt and me dical e quipme nt (not spe cifically de signe d for life
support)
Specific: Aircrafis, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support
systems or medical equipment for life support, etc.
The quality grade of NEC devices is “Standard” unless otherwise specified in NEC's Data Sheets or Data
Books.
If cus tom e rs inte nd to us e NEC de vice s for applications othe r than thos e s pe cifie d for Standard quality
grade, they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
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