UPA1810GR-9JG [NEC]

P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING; P沟道MOS场效应晶体管切换
UPA1810GR-9JG
型号: UPA1810GR-9JG
厂家: NEC    NEC
描述:

P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING
P沟道MOS场效应晶体管切换

晶体 晶体管 场效应晶体管 开关
文件: 总8页 (文件大小:64K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
MOS FIELD EFFECT TRANSISTOR  
PA1810  
µ
P-CHANNEL MOS FIELD EFFECT TRANSISTOR  
FOR SWITCHING  
DESCRIPTION  
PACKAGE DRAWING (Unit : mm)  
The µPA1810 is a switching device which can be  
driven directly by a 2.5 V power source.  
8
5
The µPA1810 features a low on-state resistance and  
excellent switching characteristics, and is suitable for  
applications such as power switch of portable machine  
and so on.  
1, 5, 8 :Drain  
2, 3, 6, 7:Source  
1.2 MAX.  
1.0±0.05  
4
:Gate  
0.25  
+5°  
–3°  
3°  
FEATURES  
0.5  
0.1±0.05  
Can be driven by a 2.5 V power source  
Low on-state resistance  
+0.15  
–0.1  
0.6  
1
4
DS(on)1  
R
DS(on)2  
R
DS(on)3  
R
GS  
D
= 55 mMAX. (V = –4.5 V, I = –2.0 A)  
GS  
D
= 60 mMAX. (V = –4.0 V, I = –2.0 A)  
6.4 ±0.2  
4.4 ±0.1  
3.15 ±0.15  
3.0 ±0.1  
GS  
D
= 100 mMAX. (V = –2.5 V, I = –2.0 A)  
1.0 ±0.2  
ORDERING INFORMATION  
PART NUMBER  
PACKAGE  
0.65  
0.8 MAX.  
0.1  
µPA1810GR-9JG  
Power TSSOP8  
+0.03  
0.27  
0.10 M  
–0.08  
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)  
EQUIVALENT CIRCUIT  
DSS  
Drain to Source Voltage  
Gate to Source Voltage  
Drain Current (DC)  
Drain Current (pulse) Note1  
Total Power Dissipation Note2  
Channel Temperature  
Storage Temperature  
V
V
–12  
10/+5  
±4.0  
±16  
V
V
Drain  
GSS  
D(DC)  
I
A
Body  
D(pulse)  
I
A
Diode  
Gate  
T
P
2.0  
W
°C  
Gate  
ch  
T
150  
Protection  
Diode  
Source  
stg  
T
–55 to +150 °C  
Notes 1. PW 10 µs, Duty Cycle 1 %  
2. Mounted on ceramic substrate of 5000 mm2 x 1.1 mm  
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.  
When this device actually used, an additional protection circuit is externally required if a voltage  
exceeding the rated voltage may be applied to this device.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No.  
Date Published June 1999 NS CP(K)  
Printed in Japan  
D11819EJ1V0DS00 (1st edition)  
1996, 1999  
©
µ
PA1810  
ELECTRICAL CHARACTERISTICS (TA = 25 °C)  
CHARACTERISTICS  
Zero Gate Voltage Drain Current  
Gate Leakage Current  
SYMBOL  
IDSS  
TEST CONDITIONS  
VDS = –12 V, VGS = 0 V  
MIN. TYP. MAX. UNIT  
–10  
±10  
–1.5  
µA  
µA  
V
IGSS  
VGS = ±10 V, VDS = 0 V  
VDS = –10 V, ID = –1 mA  
VDS = –10 V, ID = –2.0 A  
VGS = –4.5 V, ID = –2.0 A  
VGS = –4.0 V, ID = –2.0 A  
VGS = –2.5 V, ID = –2.0 A  
VDS = –10 V  
Gate Cut-off Voltage  
VGS(off)  
| yfs |  
RDS(on)1  
RDS(on)2  
RDS(on)3  
Ciss  
–0.5  
2.5  
–0.8  
8.5  
41  
Forward Transfer Admittance  
Drain to Source On-state Resistance  
S
55  
60  
mΩ  
mΩ  
mΩ  
pF  
pF  
pF  
ns  
43  
71  
100  
Input Capacitance  
1100  
750  
240  
40  
Output Capacitance  
Reverse Transfer Capacitance  
Turn-on Delay Time  
Rise Time  
Coss  
VGS = 0 V  
Crss  
f = 1 MHz  
td(on)  
tr  
td(off)  
tf  
VDD = –10 V  
ID = –2.0 A  
100  
90  
ns  
Turn-off Delay Time  
Fall Time  
VGS(on) = –4.0 V  
RG = 5 Ω  
ns  
70  
ns  
Total Gate Charge  
Gate to Source Charge  
Gate to Drain Charge  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
QG  
VDD = –10 V  
35  
nC  
nC  
nC  
V
QGS  
ID = –4.0 A  
5
QGD  
VF(S-D)  
trr  
VGS = –4.0 V  
16  
IF = 4.0 A, VGS = 0 V  
0.75  
50  
IF = 4.0 A, VGS = 0 V  
ns  
di/dt = 100 A/µS  
Qrr  
35  
nC  
TEST CIRCUIT 1 SWITCHING TIME  
TEST CIRCUIT 2 GATE CHARGE  
D.U.T.  
D.U.T.  
I
G
= 2 mA  
V
GS  
R
L
R
L
90 %  
V
GS  
Wave Form  
VGS(on)  
10 %  
0
R
G
PG.  
PG.  
VDD  
VDD  
50 Ω  
R = 10 Ω  
G
90 %  
I
D
90 %  
10 %  
I
D
V
0
GS  
10 %  
I
D
0
Wave Form  
t
r
t
d(on)  
td(off)  
t
f
τ
t
on  
toff  
τ = 1µ s  
Duty Cycle 1 %  
2
Data Sheet D11819EJ1V0DS00  
µ
PA1810  
TYPICAL CHARACTERISTICS (TA = 25 °C)  
DERATING FACTOR OF FORWARD BIAS  
SAFE OPERATING AREA  
FORWARD BIAS SAFE OPERATING AREA  
100  
10  
1  
100  
80  
60  
40  
20  
ID(pulse)  
ID(DC)  
0.1  
T
A
= 25 ˚C  
Single Pulse  
Mounted on Ceramic  
2
Substrate of 50cm x 1.1mm  
0.01  
0.1  
10  
100  
1  
0
30  
60  
90  
120  
150  
VDS - Drain to Source Voltage - V  
T
A - Ambient Temperature - ˚C  
TRANSFER CHARACTERISTICS  
DS = 10 V  
GATE TO SOURCE CUT-OFF VOLTAGE vs.  
CHANNEL TEMPERATURE  
100  
10  
1  
V
1.0  
0.9  
VDS = 10 V  
ID = 1 mA  
0.8  
0.7  
TA  
= 125˚C  
75˚C  
0.1  
0.01  
25˚C  
25˚C  
0.6  
0.5  
0.001  
0
0.5  
1.0  
1.5 2.0  
2.5 3.0  
150  
50  
0
50  
100  
VGS - Gate to Sorce Voltage - V  
Tch - Channel Temperature - ˚C  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
DRAIN CURRENT  
FORWARD TRANSFER ADMMITTANCE Vs.  
DRAIN CURRENT  
100  
10  
1
100  
V
DS = 10V  
V
GS = 2.5 V  
80  
T
A
= 25 ˚C  
T
A
= 125˚C  
75˚C  
25 ˚C  
75 ˚C  
125 ˚C  
60  
40  
20  
25˚C  
25˚C  
0.1  
0.1  
10  
D - Drain Current - A  
100  
1  
1  
- Drain Current - A  
10  
100  
0.01  
0.1  
I
ID  
3
Data Sheet D11819EJ1V0DS00  
µ
PA1810  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
CHANNEL TEMPERATURE  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
DRAIN CURRENT  
100  
80  
60  
40  
20  
80  
I
D
= 2.0 A  
V
GS = 4.0 V  
V
GS = 2.5 V  
4.0 V  
60  
40  
20  
T
A
= 125˚C  
75˚C  
25˚C  
25˚C  
1  
- Drain Current - A  
10  
100  
0.01  
0.1  
50  
0
50  
100  
150  
T
ch - Channel Temperature -˚C  
ID  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.  
GATE TO SOURCE VOLTAGE  
CAPACITANCE vs. DRAIN TO  
SOURCE VOLTAGE  
100  
10000  
1000  
f = 1MHz  
I
D
=
2.0 A  
VGS = 0V  
80  
Ciss  
Coss  
60  
40  
20  
C
rss  
100  
10  
1  
10  
DS - Drain to Source Voltage - V  
100  
0
4  
2  
6  
8  
10  
V
VGS - Gate to Source Voltage - V  
SWITCHING CHARACTERISTICS  
SOURCE TO DRAIN DIODE FORWARD VOLTAGE  
100  
1000  
100  
10  
tr  
tf  
10  
1
td(off)  
td(on)  
V
V
R
DD = 10 V  
on) = 4.0V  
= 5 Ω  
GS  
(
G
0.1  
0.4  
0.1  
1  
- Drain Current - A  
10  
0.6  
0.8  
1.0  
1.2  
I
D
V
F(S-D) - Source to Drain Voltage - V  
4
Data Sheet D11819EJ1V0DS00  
µ
PA1810  
DYNAMIC INPUT CHARACTERISTICS  
10  
8  
ID = 4.0 A  
VDD = 10 V  
6  
4  
2  
0
0
10  
20  
30  
40  
50  
60  
Qg - Gate Charge - nC  
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH  
1000  
100  
Mounted on ceramic  
substrate of50 cm2 x 1.1 mm  
Single Pulse  
62.5˚C/W  
10  
1
0.1  
0.001  
0.01  
0.1  
100  
1000  
1
10  
PW - Pulse Width - s  
5
Data Sheet D11819EJ1V0DS00  
µ
PA1810  
[MEMO]  
6
Data Sheet D11819EJ1V0DS00  
µ
PA1810  
[MEMO]  
7
Data Sheet D11819EJ1V0DS00  
µ
PA1810  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
No part of this document may be copied or reproduced in any form or by any means without the prior written  
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in  
this document.  
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property  
rights of third parties by or arising from use of a device described herein or any other liability arising from use  
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other  
intellectual property rights of NEC Corporation or others.  
Descriptions of circuits, software, and other related information in this document are provided for illustrative  
purposes in semiconductor product operation and application examples. The incorporation of these circuits,  
software, and information in the design of the customer's equipment shall be done under the full responsibility  
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third  
parties arising from the use of these circuits, software, and information.  
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,  
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or  
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety  
measures in its design, such as redundancy, fire-containment, and anti-failure features.  
NEC devices are classified into the following three quality grades:  
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a  
customer designated "quality assurance program" for a specific application. The recommended applications of  
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device  
before using it in a particular application.  
Standard: Computers, office equipment, communications equipment, test and measurement equipment,  
audio and visual equipment, home electronic appliances, machine tools, personal electronic  
equipment and industrial robots  
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster  
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed  
for life support)  
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life  
support systems or medical equipment for life support, etc.  
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.  
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,  
they should contact an NEC sales representative in advance.  
M7 98. 8  

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