UPA1820GR-9JG [NEC]
N-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING; N沟道MOS场效应晶体管开关
| 型号： | UPA1820GR-9JG |
| 厂家： | 
NEC |
| 描述： | N-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING |
| 文件： | 总6页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µPA1820
N-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
PACKAGE DRAWING (Unit: mm)
The µPA1820 is a switching device which can be
driven directly by a 2.5 V power source.
8
5
This device features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as DC/DC Converters and power
management of notebook computers and so on.
1,2,3 :Source
1.2 MAX.
1.0±0.05
4
:
G
a
te
5,6,7,8 :Drain
0.25
FEATURES
+5°
–3°
3°
0.5
• 2.5 V drive available
0.1±0.05
+0.15
–0.1
0.6
• Low on-state resistance
1
4
RDS(on)1 = 8.6 mΩ MAX. (VGS = 4.5 V, ID = 6.0 A)
RDS(on)2 = 8.8 mΩ MAX. (VGS = 4.0 V, ID = 6.0 A)
RDS(on)3 = 12 mΩ MAX. (VGS = 2.5 V, ID = 6.0 A)
• Built-in G-S protection diode against ESD
6.4 ±0.2
4.4 ±0.1
3.15 ±0.15
3.0 ±0.1
1.0 ±0.2
ORDERING INFORMATION
PART NUMBER
PACKAGE
0.65
0.8 MAX.
0.1
µPA1820GR-9JG
Power TSSOP8
+0.03
–0.08
0.27
0.10 M
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
EQUIVALENT CIRCUIT
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
VDSS
VGSS
ID(DC)
ID(pulse)
PT
20
V
V
±12
±12
±48
2.0
Drain
A
Drain Current (pulse) Note1
A
Body
Diode
Gate
Note2
Total Power Dissipation
W
°C
Gate
Channel Temperature
Storage Temperature
Tch
150
Protection
Diode
Tstg
−55 to +150
°C
Source
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on ceramic substrate of 5000 mm2 x 1.1 mm
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G16274EJ1V0DS00 (1st edition)
Date Published October 2002 NS CP(K)
Printed in Japan
2002
©
µPA1820
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
SYMBOL
IDSS
TEST CONDITIONS
VDS = 20 V, VGS = 0 V
MIN. TYP. MAX. UNIT
1.0
±10
1.5
µA
µA
V
IGSS
VGS = ±12 V, VDS = 0 V
VDS = 10 V, ID = 1.0 mA
VDS = 10 V, ID = 6.0 A
VGS = 4.5 V, ID = 6.0 A
VGS = 4.0 V, ID = 6.0 A
VGS = 2.5 V, ID = 6.0 A
VDS = 10 V
Gate Cut-off Voltage
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
RDS(on)3
Ciss
0.5
11
1.0
21.5
6.8
7.0
8.7
2020
600
430
18
Forward Transfer Admittance
Drain to Source On-state Resistance
S
8.6
8.8
12
mΩ
mΩ
mΩ
pF
pF
pF
ns
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Coss
VGS = 0 V
Crss
f = 1.0 MHz
td(on)
tr
td(off)
tf
VDD = 10 V, ID = 6.0 A
VGS = 4.0 V
56
ns
Turn-off Delay Time
Fall Time
RG = 10 Ω
75
ns
52
ns
Total Gate Charge
QG
VDD = 16 V
27
nC
nC
nC
V
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
QGS
VGS = 4.0 V
2.6
13
QGD
VF(S-D)
trr
ID = 12 A
IF = 12 A, VGS = 0 V
IF = 12 A, VGS = 0 V
di/dt = 100 A / µs
0.81
61
ns
Qrr
40
nC
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
V
GS
RL
D.U.T.
90%
V
GS
V
GS
10%
Wave Form
I
G
= 2 mA
0
RG
RL
PG.
V
DD
90%
I
D
90%
10%
PG.
V
DD
50 Ω
I
D
V
0
GS
10%
I
D
0
Wave Form
t
r
t
d(on)
t
d(off)
t
f
τ
t
on
toff
τ = 1µs
Duty Cycle ≤ 1%
2
Data Sheet G16274EJ1V0DS
µPA1820
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
120
100
80
60
40
20
0
2.5
2
Mounted on Ceramic
Substrate of
5000 mm2 x 1.1 mm
1.5
1
0.5
0
Mounted on FR-4 board
of 2500 mm2 x 1.6 mm
0
25
50
75
100
125
150
175
0
25
50
75
100 125 150 175
TA - Ambient Temperature - °C
TA - Ambient Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
100
ID(pulse)
ID(DC)
PW = 1 ms
10
1
10 ms
RDS(on) Limited
(VGS = 4.5 V)
100 ms
0.1
0.01
DC
Single pulse
Mounted on Ceramic Substrate
of 5000 mm2 x 1.1 mm
0.1
1
10
100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
10
Single pulse
ontd n -4 bad
Mounted on FR-4 board
2
of 2500 mm x 1.6 mm
125°C/W
Mounted on Ceramic
Substrate of 5000 mm2 x 1.1 mm
62.5°C/W
1
1 m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
3
Data Sheet G16274EJ1V0DS
µPA1820
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
80
70
60
50
40
30
20
10
0
100
VGS =
4.0 V
4.5 V
VDS = 10 V
Pulsed
10
1
2.5 V
TA = 125°C
75°C
25°C
−25°C
0.1
0.01
0.001
0.0001
Pulsed
0
0.5
1
1.5
2
2.5
0
0.5
1
1.5
2
2.5
VDS - Drain to Source Voltage - V
VGS - Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
1.2
1.0
0.8
0.6
0.4
100
10
1
VDS = 10 V
ID = 1.0 mA
A
T
= −25°C
25°C
75°C
125°C
DS
V
= 10 V
Pulsed
0.1
-50
0
50
100
150
0.01
0.1
1
10
100
Tch - Channel Temperature - °C
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
20
20
ID = 6.0 A
Pulsed
ID = 6.0 A
Pulsed
15
15
10
5
VGS = 2.5 V
4.0 V
10
4.5 V
5
0
0
-50
0
50
100
150
0
2
4
6
8
10
Tch - Channel Temperature - °C
VGS - Gate to Source Voltage - V
4
Data Sheet G16274EJ1V0DS
µPA1820
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
20
15
10
5
10000
1000
100
ID = 6.0 A
Pulsed
VGS = 0 V
f= 1.0 MHz
Ciss
VGS = 2.5 V
4.0 V
Coss
Crss
4.5 V
0
0.01
0.1
1
10
100
0.1
1
10
100
ID - Drain Current - A
VDS - Drain to Source Voltage - V
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
SWITCHING CHARACTERISTICS
1000
100
10
100
10
VDD = 10 V
VGS = 4.0 V
RG = 10 Ω
VGS = 0 V
Pulsed
1
td(off)
tr
tf
0.1
0.01
td(on)
0.1
1
10
100
0.4
0.6
0.8
1.0
1.2
ID - Drain Current - A
VF(S-D) - Source to Drain Voltage - V
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
5
ID = 12 A
4
VDD = 4.0 V
10 V
16 V
3
2
1
0
0
5
10
15
20
25
30
35
QG - Gate Charge - nC
5
Data Sheet G16274EJ1V0DS
µPA1820
•
The information in this document is current as of October, 2002. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or
data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all
products and/or types are available in every country. Please check with an NEC sales representative
for availability and additional information.
•
•
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
third parties by or arising from the use of NEC semiconductor products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
patents, copyrights or other intellectual property rights of NEC or others.
•
•
•
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of customer's equipment shall be done under the full
responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
parties arising from the use of these circuits, software and information.
While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers
agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
risks of damage to property or injury (including death) to persons arising from defects in NEC
semiconductor products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment, and anti-failure features.
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"Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products
developed based on a customer-designated "quality assurance program" for a specific application. The
recommended applications of a semiconductor product depend on its quality grade, as indicated below.
Customers must check the quality grade of each semiconductor product before using it in a particular
application.
"Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio
and visual equipment, home electronic appliances, machine tools, personal electronic equipment
and industrial robots
"Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems and medical equipment for life support, etc.
The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's
data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not
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(Note)
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NEC (as defined above).
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