UPA1981TE-T2 [NEC]
Small Signal Field-Effect Transistor, 2.8A I(D), 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, MINIMOLD, SC-95, 3 PIN;
| 型号： | UPA1981TE-T2 |
| 厂家： | 
NEC |
| 描述： | Small Signal Field-Effect Transistor, 2.8A I(D), 2-Element, N-Channel and P-Channel, Silicon, Metal-oxide Semiconductor FET, MINIMOLD, SC-95, 3 PIN 开关 光电二极管 晶体管 |
| 文件： | 总4页 (文件大小：95K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
INTEGRATED LOAD SWITCH
µ PA1981
N-CHANNEL/P-CHANNEL MOS FET PAIR
FOR LOAD SWITCH
PACKAGE DRAWING (Unit: mm)
DESCRIPTION
+0.1
+0.1
–0.06
0.32
–0.05
0.16
The µ PA1981 is a N-Channel/P-Channel MOS FET pair for compact
power management in portable electronic equipment where 2.5 to 8 V
input and 2.8 A output current capability are needed.
This load switch integrated a small N-Channel MOS FET (Q1), which
drives a large P-Channel MOS FET (Q2) in one tiny package (SC-95).
0 to 0.1
0.65
FEATURES
0.95 0.95
1.9
• VS2D21 = 0.2 V MAX. (VS2S1 = 5.0 V, ID2 = −2.8 A, RD2S2(on)1 = 70 mΩ)
0.9 to 1.1
2.9 ±0.2
• VS2D22 = 0.2 V MAX. (VS2S1 = 2.5 V, ID2 = −1.9 A, RD2S2(on)2 = 105 mΩ)
ORDERING INFORMATION
PART NUMBER
PACKAGE
µ PA1981TE
SC-95 (Mini Mold Thin Type)
Marking: TZ
PIN CONNECTION (Top View)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Source2 to Source1 Input Voltage Range
Gate1 to Source1 On Voltage Range
Drain2 Current (DC) Note1
VS2S1
VG1S1
ID2(DC)
ID2(pulse)
PT
2.5 to 8.0
1.5 to 7.0
−2.8
−10.0
1.0
V
V
A
6
5
4
1. S1(Q1)
2. D2(Q2)
3. D2(Q2)
4. S2(Q2)
Drain2 Current (pulse) Note2
Total Power Dissipation Note1
Channel Temperature
A
5. G1(Q1)
6. G2/D1
W
°C
°C
Tch
Tstg
150
−55 to +150
Storage Temperature
1
2
3
Notes 1. Mounted on FR-4 Board of 2500 mm2 x 1.6 mm, t ≤ 5 sec
2. PW ≤ 10 µs, Duty Cycle ≤ 1%
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G17263EJ1V0DS00 (1st edition)
Date Published July 2004 NS CP(K)
Printed in Japan
2004
µ PA1981
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN. TYP. MAX. UNIT
OFF CHARACTERISTICS
µA
µA
Q2-S2 to D2 Leakage Current
Q1-D1 to S1 Leakage Current
ON CHARACTERISTICS
IS2D2
ID1S1
VS2D2 = 8.0 V, VG1S1 = 0 V
1.0
1.0
VD1S1 = 8.0 V, VG1S1 = 0 V
Note
Q2-S2 to D2 Voltage
VS2D21
VS2D22
VS2S1 = 5.0 V, VG1S1 = 3.3 V, ID2 = −2.8 A
VS2S1 = 2.5 V, VG1S1 = 3.3 V, ID2 = −1.9 A
VG2S2 = −5.0 V, ID2 = −2.8A
0.15
0.15
52
0.2
0.2
70
V
V
Note
Q2-Static On-Resistance
RD2S2(on)1
RD2S2(on)2
IS2D21
mΩ
mΩ
A
VG2S2 = −2.5 V, ID2 = −1.9 A
76
105
Note
Q2-S2 to D2 Current
VS2D2 = 0.2 V, VS2S1 = 5.0 V, VG1S1 = 3.3 V
2.8
1.9
IS2D22
VS2D2 = 0.2 V, VS2S1 = 2.5 V, VG1S1 = 3.3 V
A
Note Pulsed: PW ≤ 350 µs, Duty Cycle ≤ 2%
CIRCUIT1 EXAMPLE OF APPLICATION CIRCUIT
µ
PA1981
Q2
S2
D2
+Vin
R1
G2/D1
G1
Q1
LOAD
Ci
Co
VON/OFF
S1
GND
RECOMMENDATION OF CIRCUIT1
Co ≤ 1 µF for applications
R1 is required to turn Q2 off.
Select R1 in the range of 10 to 470 kΩ.
2
Data Sheet G17263EJ1V0DS
µ PA1981
TYPICAL CHARACTERISTICS (TA = 25°C)
ON-STATE VOLTAGE (Pch) vs.
DRAIN2 CURRENT
ON-STATE VOLTAGE (Pch) vs.
CHANNEL TEMPERATURE
0.20
0.20
0.16
0.12
0.08
0.04
0
T
ch = 125°C
0.16
0.12
0.08
0.04
0
T
ch = 125°C
25°C
25°C
Pulsed
Pulsed
V
V
S2S1 = 2.5 V
G1S1 = 1.5 to 7.0 V
V
V
S2S1 = 5.0 V
G1S1 = 1.5 to 7.0 V
0
-0.5
-1
-1.5
-2
-2.5
-3
0
-0.5
-1
-1.5
-2
-2.5
-3
ID2 - Drain2 (Pch) Current - A
ID2 - Drain2 (Pch) Current - A
ON-STATE RESISTANCE (Pch) vs.
INPUT VOLTAGE
ON-STATE RESISTANCE (Pch) vs.
CHANNEL TEMPERATURE
12
10
8
14
12
10
8
Pulsed
Pulsed
G1S1 = 1.5 to 7.0 V
V
S2S1 = 2.5 V
I
D2 = −2.8 A
V
I
D2 = −1.9 A
V
G1S1 = 1.5 to 7.0 V
6
6
V
S2S1 = 5.0 V
I
D2 = −2.8 A
4
4
2
2
0
0
1
2
3
4
5
6
7
8
-50 -25
0
25 50 75 100 125 150
VS2S1 - Source2 to Source Input Voltage - V
Tch - Channel Temperature - °C
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
10
1
Single pulse
Mounted on FR-4 board of 2500 mm2 x 1.6 mm
0.1
1 m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
3
Data Sheet G17263EJ1V0DS
µ PA1981
•
The information in this document is current as of July, 2004. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
•
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property rights of third parties by or arising from the use of NEC Electronics products listed in this document
or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
•
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redundancy, fire-containment and anti-failure features.
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(1)
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M8E 02. 11-1
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