UPA2520T1H-T1-AT [NEC]
Small Signal Field-Effect Transistor, 10A I(D), 30V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, VSOF, 8 PIN;
| 型号： | UPA2520T1H-T1-AT |
| 厂家： | 
NEC |
| 描述： | Small Signal Field-Effect Transistor, 10A I(D), 30V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, VSOF, 8 PIN 光电二极管 |
| 文件： | 总6页 (文件大小：160K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
μPA2520
N-CHANNEL MOS FET
FOR SWITCHING
DESCRIPTION
PACKAGE DRAWING (Unit: mm)
The μ PA2520 is N-channel MOS Field Effect Transistor
designed for DC/DC converter and power management
applications of portable equipments.
2.9 0.1
0.65
A
0.17 0.05
0 to 0.025
8
5
FEATURES
• Low on-state resistance
RDS(on)1 = 13.2 mΩ MAX. (VGS = 10 V, ID = 10 A)
RDS(on)2 = 17 mΩ MAX. (VGS = 4.5 V, ID = 5.0 A)
• Built-in gate protection diode
4
0.05 M S A
1
0.32 0.05
• Small and surface mount package (8-pin VSOF (2429))
• Pb-free (This product does not contain Pb in external electrode
and other parts.)
1, 2, 3 : Source
4
: Gate
5, 6, 7, 8: Drain
S
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
30
V
20
V
10
A
Drain Current (pulse) Note1
EQUIVALENT CIRCUIT
40
A
Total Power Dissipation Note2
Total Power Dissipation (PW = 5 sec) Note2
Channel Temperature
1.0
W
W
°C
°C
A
Drain
PT2
2.2
150
Tch
Body
Storage Temperature
Tstg
−55 to +150
10
Diode
Gate
Single Avalanche Current Note3
Single Avalanche Energy Note3
IAS
EAS
10
mJ
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
2. Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mmt
3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G19186EJ1V0DS00 (1st edition)
Date Published March 2008 NS
Printed in Japan
2008
μPA2520
ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
Gate Leakage Current
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
VDS = 30 V, VGS = 0 V
10
10
μA
μA
V
VGS = 20 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 5.0 A
VGS = 10 V, ID = 10 A
VGS = 4.5 V, ID = 5.0 A
VDS = 15 V,
Gate to Source Cut-off Voltage
1.5
4.4
2.5
Note
Forward Transfer Admittance
S
Note
Drain to Source On-state Resistance
9.4
12.5
1100
240
88
13.2
17
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Coss
Crss
td(on)
tr
VGS = 0 V,
f = 1 MHz
VDD = 15 V, ID = 5.0 A,
VGS = 10 V,
10
5.5
40
Turn-off Delay Time
Fall Time
td(off)
tf
RG = 10 Ω
6.2
10.8
3.3
3.6
0.82
26
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
QG
VDD = 15 V,
QGS
QGD
VF(S-D)
trr
VGS = 5 V,
ID = 10 A
Note
Body Diode Forward Voltage
IF = 10 A, VGS = 0 V
IF = 10 A, VGS = 0 V,
di/dt = 100 A/μs
f = 1 MHz
Reverse Recovery Time
Reverse Recovery Charge
Gate Resistance
ns
nC
Ω
Qrr
19
RG
1.6
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
D.U.T.
V
GS
RG
= 25 Ω
50 Ω
R
L
90%
V
GS
Wave Form
VGS
10%
0
R
G
PG.
VDD
PG.
GS = 20 → 0 V
V
DD
V
VDS
90%
90%
V
DS
V
0
GS
BVDSS
10% 10%
V
DS
Wave Form
0
IAS
VDS
ID
τ
td(on)
tr
td(off)
tf
VDD
ton
toff
τ = 1
μs
Duty Cycle ≤ 1%
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
= 2 mA
IG
R
L
50 Ω
PG.
VDD
2
Data Sheet G19186EJ1V0DS
μPA2520
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
FORWARD BIAS SAFE OPERATING AREA
120
100
80
60
40
20
0
100
10
I
D(pulse)
I
D(DC)
1
0.1
0.01
Single Pulse
Mounted on FR-4 board of
25.4 mm x 25.4 mm x 0.8 mmt
0
20 40 60 80 100 120 140 160
0.01
0.1
1
10
100
TA - Ambient Temperature - °C
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
10
R
th(ch-A) = 125°C/Wi
1
Single Pulse
Mounted on FR-4 board of 25.4 mm x 25.4 mm x 0.8 mmt
0.1
100 μ
1 m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
40
30
20
10
0
30
20
10
0
10 V
V
DS = 10 V
3.6 V
3.4 V
4.5 V
4.0 V
3.8 V
Pulsed
3.2 V
T
A
= 125°C
75°C
V
GS = 3.0 V
25°C
−25°C
Pulsed
0.8 1
0
1
2
3
4
0
0.2
0.4
0.6
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
3
Data Sheet G19186EJ1V0DS
μPA2520
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
3
2
1
0
100
10
1
T
A
= 125°C
75°C
25°C
−55°C
V
DS = 10 V
= 1 mA
V
DS = 10 V
I
D
Pulsed
0.1
-75
-25
25
75
125
175
0.01
0.1
1
10
100
ID - Drain Current - A
Tch - Channel Temperature - °C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
30
30
20
10
Pulsed
20
10
0
V
GS = 4.5 V
10 V
I = 10 A
D
Pulsed
0
0.1
1
10
100
0
5
10
15
20
ID - Drain Current - A
VGS - Gate to Source Voltage - V
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
30
Pulsed
Ciss
1000
100
10
20
10
0
VGS = 4.5 V, ID = 5.0 A
Coss
Crss
10 V, 10 A
VGS = 0 V
f = 1 MHz
0.1
1
10
100
-75
-25
25
75
125
175
VDS - Drain to Source Voltage - V
Tch - Channel Temperature - °C
4
Data Sheet G19186EJ1V0DS
μPA2520
DYNAMIC INPUT CHARACTERISTICS
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
6
5
4
3
2
1
0
100
10 V
V
GS = 4.5 V
V
DD = 6 V
15 V
10
24 V
0 V
1
0.1
0.01
Pulsed
1
D
I = 10 A
0
0.2
0.4
0.6
0.8
1.2
0
5
10
15
VF(S-D) - Source to Drain Voltage - V
QG - Gate Charge - nC
ORDERING INFORMATION
PART NUMBER
LEAD PLATING
Pure Sn
PACKING
PACKAGE
μ PA2520T1H-T1-AT Note
μ PA2520T1H-T2-AT Note
8 mm embossed taping
3000 p/reel
8-pin VSOF (2429)
Note Pb-free (This product does not contain Pb in external electrode and other parts.)
5
Data Sheet G19186EJ1V0DS
μPA2520
•
The information in this document is current as of March, 2008. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
•
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•
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defined above).
M8E 02. 11-1
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