UPA2728GR [NEC]
Power Field-Effect Transistor, 13A I(D), 30V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, POWER SOP-8;
| 型号： | UPA2728GR |
| 厂家： | 
NEC |
| 描述： | Power Field-Effect Transistor, 13A I(D), 30V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, POWER SOP-8 |
| 文件： | 总6页 (文件大小：163K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
μPA2728GR
SWITCHING
N-CHANNEL POWER MOS FET
PACKAGE DRAWING (Unit: mm)
DESCRIPTION
The μ PA2728GR is N-channel MOS Field Effect Transistor
designed for DC/DC converter and power management
applications of notebook computer.
8
5
1, 2, 3 : Source
4
: Gate
5, 6, 7, 8: Drain
FEATURES
• Low on-state resistance
RDS(on)1 = 10.5 mΩ MAX. (VGS = 10 V, ID = 7.0 A)
RDS(on)2 = 18 mΩ MAX. (VGS = 4.5 V, ID = 7.0 A)
• Low gate to drain charge
6.0 ±0.3
4.4
1
4
5.37 MAX.
0.8
QGD = 3.5 nC TYP. (VDD = 15 V, ID = 13 A)
• Built-in gate protection diode
• Small and surface mount package (Power SOP8)
• RoHS Compliant
0.5 ±0.2
0.10
1.27 0.78 MAX.
+0.10
0.40
0.12 M
–0.05
ORDERING INFORMATION
PART NUMBER
LEAD PLATING
Sn-Bi
PACKING
PACKAGE
μ PA2728GR-E1-A Note
μ PA2728GR-E2-A Note
μ PA2728GR-E1-AT Note
μ PA2728GR-E2-AT Note
Power SOP8
0.08 g TYP.
Tape 2500 p/reel
Pure Sn
Note Pb-free (This product does not contain Pb in external electrode and other parts).
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
EQUIVALENT CIRCUIT
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
30
V
V
Drain
25
13
A
Drain Current (pulse) Note1
Body
Diode
52
A
Gate
Total Power Dissipation Note2
Total Power Dissipation (PW = 10 sec) Note2
Channel Temperature
1.1
W
W
°C
°C
A
PT2
2.5
150
Gate
Protection
Diode
Tch
Source
Storage Temperature
Tstg
−55 to +150
13
Single Avalanche Current Note3
Single Avalanche Energy Note3
IAS
EAS
17
mJ
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
2. Mounted on glass epoxy board of 1 inch2 x 0.8 mm
3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G18295EJ1V0DS00 (1st edition)
Date Published March 2007 NS CP(K)
Printed in Japan
2006, 2007
μPA2728GR
ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
Gate Leakage Current
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
VDS = 30 V, VGS = 0 V
1
μA
μA
V
VGS = 25 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 7.0 A
VGS = 10 V, ID = 7.0 A
VGS = 4.5 V, ID = 7.0 A
VDS = 10 V,
10
2.5
Gate to Source Cut-off Voltage
1.5
7
Note
Forward Transfer Admittance
S
Note
Drain to Source On-state Resistance
8.3
12
10.5
18
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
1120
310
110
10
Coss
Crss
td(on)
tr
VGS = 0 V,
f = 1 MHz
VDD = 15 V, ID = 7.0 A,
VGS = 10 V,
3.7
34
Turn-off Delay Time
Fall Time
td(off)
tf
RG = 10 Ω
7
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
QG
VDD = 15 V,
11
QGS
QGD
VF(S-D)
trr
VGS = 5 V,
3.6
3.5
0.82
25
ID = 13 A
Note
Body Diode Forward Voltage
IF = 13 A, VGS = 0 V
IF = 13 A, VGS = 0 V,
di/dt = 100 A/μs
f = 1 MHz
Reverse Recovery Time
Reverse Recovery Charge
Gate Resistance
ns
nC
Ω
Qrr
22
RG
1.2
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
D.U.T.
V
V
GS
RG
= 25 Ω
50 Ω
R
L
90%
V
GS
Wave Form
V
GS
10%
0
R
G
PG.
V
DD
PG.
GS = 20 → 0 V
V
DD
V
DS
90%
d(on)
90%
V
DS
V
0
GS
BVDSS
10% 10%
V
DS
Wave Form
0
I
AS
V
DS
I
D
τ
t
t
r
t
d(off)
t
f
V
DD
t
on
t
off
τ = 1
μs
Duty Cycle ≤ 1%
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
= 2 mA
I
G
RL
50 Ω
PG.
V
DD
2
Data Sheet G18295EJ1V0DS
μPA2728GR
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
FORWARD BIAS SAFE OPERATING AREA
100
10
120
100
80
I
D(pulse)
I
D(DC)
1
60
40
0.1
Single Pulse
20
Mounted on a glass epoxy board of
1 inch2 x 0.8 mm
0
0.01
0
20
40 60
80 100 120 140 160
0.01
0.1
1
10
100
TA - Ambient Temperature - °C
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
10
Rth(ch-A) = 114°C/Wi
1
Single Pulse
Mounted on a glass epoxy board of 1 inch2 x 0.8 mm
0.1
100 μ
1 m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
60
50
40
30
20
10
0
30
V
GS = 10 V
20
10
0
4.5 V
TA = −25°C
25°C
75°C
125°C
VDS = 10 V
Pulsed
Pulsed
0
0.2
0.4
0.6
0.8
1
0
1
2
3
4
5
VDS - Drain to Source Voltage - V
VGS - Gate to Source Voltage - V
Data Sheet G18295EJ1V0DS
3
μPA2728GR
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
3
2
1
0
100
10
1
T
A
= −25°C
25°C
75°C
125°C
V
DS = 10 V
= 1 mA
V
DS = 10 V
I
D
Pulsed
0.1
0.01
0.1
1
10
100
-50
0
50
100
150
ID - Drain Current - A
Tch - Channel Temperature - °C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
30
30
I
D
= 7.0 A
Pulsed
20
10
0
20
10
0
V
GS = 4.5 V
10 V
Pulsed
10 100
0
5
10
15
20
0.01
0.1
1
VGS - Gate to Source Voltage - V
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
25
20
15
10
5
10000
1000
100
I
D
= 7.0 A
Pulsed
C
iss
V
GS = 4.5 V
C
oss
rss
10 V
C
V
GS = 0 V
f = 1 MHz
0
10
-50
0
50
100
150
0.1
1
10
100
Tch - Channel Temperature - °C
VDS - Drain to Source Voltage - V
4
Data Sheet G18295EJ1V0DS
μPA2728GR
SWITCHING CHARACTERISTICS
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
100
10
1
6
5
4
3
2
1
0
V
DD = 24 V
t
d(off)
15 V
6 V
t
f
t
d(on)
t
r
V
V
DD = 15 V
GS = 10 V
I
D
= 13 A
12
R = 10
Ω
G
0.1
1
10
100
0
2
4
6
8
10
14
ID - Drain Current - A
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
100
10
1000
100
10
V
GS = 0 V
Pulsed
1
0.1
0.01
V
GS = 0 V
di/dt = 100 A/μs
1
0
0.2
0.4
0.6
0.8
1
1.2
0.1
1
10
100
VF(S-D) - Source to Drain Voltage - V
IF - Diode Forward Current - A
Data Sheet G18295EJ1V0DS
5
μPA2728GR
•
The information in this document is current as of March, 2007. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
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•
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•
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M8E 02. 11-1
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