UPA2741GR-E1-AT [NEC]
Power Field-Effect Transistor, 14A I(D), 35V, 0.012ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, POWER, SOP-8;
| 型号： | UPA2741GR-E1-AT |
| 厂家： | 
NEC |
| 描述： | Power Field-Effect Transistor, 14A I(D), 35V, 0.012ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, POWER, SOP-8 开关 脉冲 光电二极管 晶体管 |
| 文件： | 总3页 (文件大小：98K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY PRODUCT INFORMATION
MOS FIELD EFFECT TRANSISTOR
μ PA2741GR
SWITCHING
N-CHANNEL POWER MOSFET
DESCRIPTION
PACKAGE DRAWING (Unit: mm)
The μ PA2741GR is N-channel MOS Field Effect Transistor
designed for power management applications of a notebook
computer and Lithium-Ion battery protection circuit.
8
5
1, 2, 3 : Source
4
: Gate
5, 6, 7, 8: Drain
FEATURES
• Low on-state resistance
RDS(on)1 = 7.0 mΩ MAX. (VGS = 10 V, ID = 7 A)
RDS(on)2 = 12 mΩ MAX. (VGS = 5 V, ID = 7 A)
• Low input capacitance
6.0 ±0.3
4.4
1
4
5.37 MAX.
0.8
Ciss = 3600 pF TYP. (VDS = 10 V, VGS = 0 V)
• Built-in gate protection diode
• Small and surface mount package (Power SOP8)
• RoHS Compliant
0.5 ±0.2
0.10
1.27 0.78 MAX.
+0.10
0.40
0.12 M
–0.05
ORDERING INFORMATION
PART NUMBER
μ PA2741GR-E1-AT Note
μ PA2741GR-E2-AT Note
LEAD PLATING
Pure Sn
PACKING
PACKAGE
Power SOP8
0.08 g TYP.
Tape 2500 p/reel
Note Pb-free (This product does not contain Pb in the external electrode and other parts.)
EQUIVALENT CIRCUIT
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
35
25
V
V
Drain
14
A
Drain Current (pulse) Note1
Body
Diode
140
A
Gate
Total Power Dissipation Note2
Total Power Dissipation (PW = 10 sec) Note2
Channel Temperature
1.1
W
W
°C
°C
A
PT2
2.5
Gate
Protection
Diode
Tch
150
Source
Storage Temperature
Tstg
−55 to +150
14
Single Avalanche Current Note3
Single Avalanche Energy Note3
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
IAS
EAS
19.6
mJ
2. Mounted on glass epoxy board of 1 inch x 1 inch x 0.8 mm
3. Starting Tch = 25°C, VDD = 17.5 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
The information contained in this document is being issued in advance of the production cycle for the
product. The parameters for the product may change before final production or NEC Electronics
Corporation, at its own discretion, may withdraw the product prior to its production.
Not all products and/or types are availabe in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
2007
Document No. G18871EJ1V0PM00 (1st edition)
Date Published July 2007 NS
Printed in Japan
μ PA2741GR
ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
Gate Leakage Current
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
VDS = 35 V, VGS = 0 V
1
μA
μA
V
VGS = 20 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 7 A
VGS = 10 V, ID = 7 A
VGS = 5 V, ID = 7 A
VDS = 10 V,
10
3.0
Gate to Source Cut-off Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
1.0
8
S
5.6
7.0
12
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
Input Capacitance
3600
300
260
17
18
80
20
28
9
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Coss
Crss
td(on)
tr
VGS = 0 V,
f = 1 MHz
VDD = 17.5 V, ID = 7 A,
VGS = 10 V,
Turn-off Delay Time
Fall Time
td(off)
tf
RG = 10 Ω
Total Gate Charge
QG
VDD = 17.5 V,
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage Note
Reverse Recovery Time
Reverse Recovery Charge
QGS
QGD
VF(S-D)
trr
VGS = 5 V,
ID = 14 A
9
IF = 14 A, VGS = 0 V
IF = 14 A, VGS = 0 V,
di/dt = 100 A/μs
0.8
30
21
ns
nC
Qrr
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
D.U.T.
V
V
GS
RG
= 25 Ω
50 Ω
R
L
90%
V
GS
Wave Form
V
GS
10%
90%
0
R
G
PG.
V
DD
PG.
GS = 20 → 0 V
V
DD
V
DS
90%
V
DS
V
0
GS
BVDSS
10% 10%
V
DS
Wave Form
0
I
AS
V
DS
I
D
τ
t
d(on)
t
r
t
d(off)
t
f
V
DD
t
on
t
off
τ = 1
μs
Duty Cycle ≤ 1%
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
= 2 mA
I
G
RL
50 Ω
PG.
V
DD
2
Preliminary Product Information G18871EJ1V0PM
μ PA2741GR
•
•
The information contained in this document is being issued in advance of the production cycle for the
product. The parameters for the product may change before final production or NEC Electronics
Corporation, at its own discretion, may withdraw the product prior to its production.
No part of this document may be copied or reproduced in any form or by any means without the prior written consent
of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document.
• NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
patents, copyrights or other intellectual property rights of NEC Electronics or others.
• Descriptions of circuits, software and other related information in this document are provided for illustrative purposes
in semiconductor product operation and application examples. The incorporation of these circuits, software and
information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC
Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of
these circuits, software and information.
While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products,
customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and
anti-failure features.
•
NEC Electronics products are classified into the following three quality grades: "Standard", "Special", and "Specific".
The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-designated
"quality assurance program" for a specific application. The recommended applications of an NEC Electronics
product depend on its quality grade, as indicated below. Customers must check the quality grade of each NEC
Electronics products before using it in a particular application.
•
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visual equipment, home electronic appliances, machine tools, personal electronic equipment and
industrial robots.
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support).
"Standard":
"Special":
"Specific":
Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support
systems and medical equipment for life support, etc.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications
not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to
determine NEC Electronics' willingness to support a given application.
(Note)
(1)
"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
(2)
"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
M5 02. 11-1
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