UPD29F008ALGZ-C12TX-LKH

PRELIMINARY DATA SHEET

MOS INTEGRATED CIRCUIT

µ

PD29F008AL-X

8M-BIT CMOS LOW-VOLTAGE FLASH MEMORY

1M-WORD BY 8-BIT

EXTENDED TEMPERATURE OPERATION

Description

The µPD29F008AL-X is a low-voltage (2.2 to 2.7 V, 2.7 to 3.6 V) flash memory configured as 8,388,608 bits

(1,048,576 words × 8 bits) in 19 sectors.

It is available as a T type in which the boot sector is allocated to the highest address (sector), and a B type in which

the boot sector is allocated to the lowest address (sector).

The package is a 40-pin plastic TSOP (I).

Features

• Word configuration : 1,048,576 words × 8 bits

• Sector configuration : 19 sectors (16 Kbytes × 1 sector, 8 Kbytes × 2 sectors, 32 Kbytes × 1 sector, 64 Kbytes × 15

sectors)

• 2 types of sector configuration

T type : Boot sector allocated to the highest address (sector)

B type : Boot sector allocated to the lowest address (sector)

• Automatic program

• Unlock bypass program

• Automatic erase

• Chip erase

• Sector erase (sectors can be combined freely)

• Erase suspend / resume

• Program / Erase completion detection

• Detection through data polling and toggle bits

• Detection through RY (/BY) pin

• Sector protection

• Any sector can be protected

• Any protected sector can be temporary unprotected

• Hardware reset and standby using /RESET pin

Operating supply

voltage

Power supply current

(Active mode)

Standby current

(CMOS level input)

µA (MAX.)

Access time

ns (MAX.)

Part number

V (MAX.)

mA (MAX.)

µPD29F008AL-BX

µPD29F008AL-CX

3.0 +0.6 / –0.3

2.4 +0.3 / –0.2

90, 120

30

5

120, 150

• Extended operating temperature : −25 to +85 °C

• Program / erase time

• Program : 9.0 µs / byte (TYP.)

• Sector erase : 1.0 s (TYP.)

• Number of program / erase : 100,000 times (MIN.)

The information in this document is subject to change without notice.

Document No. M13579EJ3V0DS00 (3rd edition)

Date Published September 1998 NS CP (K)

Printed in Japan

The mark • shows major revised points.

1998

©

µPD29F008AL-X

Ordering Information

Operating

supply voltage

V (MAX.)

Access time

ns (MAX.)

Part number

Boot sector

Package

µPD29F008ALGZ-B90TX-LJH

µPD29F008ALGZ-B12TX-LJH

µPD29F008ALGZ-B90BX-LJH

µPD29F008ALGZ-B12BX-LJH

µPD29F008ALGZ-B90TX-LKH

µPD29F008ALGZ-B12TX-LKH

µPD29F008ALGZ-B90BX-LKH

µPD29F008ALGZ-B12BX-LKH

µPD29F008ALGZ-C12TX-LJH

µPD29F008ALGZ-C15TX-LJH

µPD29F008ALGZ-C12BX-LJH

µPD29F008ALGZ-C15BX-LJH

µPD29F008ALGZ-C12TX-LKH

µPD29F008ALGZ-C15TX-LKH

µPD29F008ALGZ-C12BX-LKH

µPD29F008ALGZ-C15BX-LKH

90

2.7 to 3.6

Top address (sector)

(T type)

40-pin plastic TSOP (I)

120

90

(10 × 20 mm) (Normal bent)

Bottom address (sector)

(B type)

120

90

Top address (sector)

(T type)

40-pin plastic TSOP (I)

120

90

(10 × 20 mm) (Reverse bent)

Bottom address (sector)

(B type)

120

150

120

150

120

150

120

150

2.2 to 2.7

Top address (sector)

(T type)

40-pin plastic TSOP (I)

(10 × 20 mm) (Normal bent)

Bottom address (sector)

(B type)

Top address (sector)

(T type)

40-pin plastic TSOP (I)

(10 × 20 mm) (Reverse bent)

Bottom address (sector)

(B type)

Remark For address configuration of sectors, see section 2. Sector Configuration / Sector Address Table.

2

Preliminary Data Sheet

µPD29F008AL-X

Pin Configuration (Marking Side)

/xxx indicates active low signal.

40-pin Plastic TSOP (I) (10 × 20 mm) (Normal Bent)

[ µPD29F008ALGZ-×××TX-LJH ]

[ µPD29F008ALGZ-×××BX-LJH ]

A16

A15

1

40

A17

GND

NC

2

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

A14

3

A13

4

A19

A10

I/O7

I/O6

I/O5

I/O4

Vcc

NC

A12

5

A11

6

A9

7

A8

8

/WE

/RESET

NC

9

10

11

12

13

14

15

16

17

18

19

20

RY(/BY)

A18

A7

I/O3

I/O2

I/O1

I/O0

/OE

GND

/CE

A0

A6

A5

A4

A3

A2

A1

A0 - A19

: Address inputs

I/O0 - I/O7 : Data Inputs / Outputs

/CE

: Chip Enable

/WE

: Write Enable

/OE

: Output Enable

: Hardware reset input

: Ready (Busy) output

: Supply Voltage

: Ground

/RESET

RY (/BY)

V^CC

GND

NC ^Note

: No Connection

Note Some signals can be applied because this pin is not internally connected.

Preliminary Data Sheet

3

µPD29F008AL-X

40-pin Plastic TSOP (I) (10 × 20 mm) (Reverse Bent)

[ µPD29F008ALGZ-×××TX-LKH ]

[ µPD29F008ALGZ-×××BX-LKH ]

A17

GND

NC

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

1

2

A16

A15

A14

A13

A12

A11

A9

3

A19

A10

I/O7

I/O6

I/O5

I/O4

Vcc

NC

4

5

6

7

8

A8

9

/WE

/RESET

NC

10

11

12

13

14

15

16

17

18

19

20

RY(/BY)

A18

A7

I/O3

I/O2

I/O1

I/O0

/OE

GND

/CE

A0

A6

A5

A4

A3

A2

A1

A0 - A19

: Address inputs

I/O0 - I/O7 : Data Inputs / Outputs

/CE

: Chip Enable

/WE

: Write Enable

/OE

: Output Enable

: Hardware reset input

: Ready (Busy) output

: Supply Voltage

: Ground

/RESET

RY (/BY)

V^CC

GND

NC ^Note

: No Connection

Note Some signals can be applied because this pin is not internally connected.

4

Preliminary Data Sheet

µPD29F008AL-X

Block Diagram

RY (/BY)

I/O0 - I/O7

Sector

V^CC

GND

switches

Erase voltage

generator

Input / Output

buffers

/RESET

/WE

State

control

Command

register

PGM voltage

Generator

Chip enable

Output enable

logic

Data latch

STB

/CE

/OE

Y-decoder

Y-gating

STB

V^CCdetector

Timer

X-decoder

Cell matrix

A0 - A19

Preliminary Data Sheet

5

µPD29F008AL-X

Contents

1. Input / Output Pin Function ................................................................................................................. 7

2. Sector Configuration / Sector Address Table ................................................................................... 8

3. Bus Operations .................................................................................................................................. 10

3.1 Read ............................................................................................................................................................ 10

3.2 Write ............................................................................................................................................................ 10

3.3 Standby ....................................................................................................................................................... 10

3.4 Output Disable ........................................................................................................................................... 10

3.5 Hardware Reset .......................................................................................................................................... 11

3.6 Sector Protect ............................................................................................................................................ 11

3.7 Temporary Sector Unprotect ................................................................................................................... 13

3.8 Read Product ID Code ............................................................................................................................... 13

4. Commands .......................................................................................................................................... 14

4.1 Writing Commands .................................................................................................................................... 14

4.2 Read / Reset ............................................................................................................................................... 15

4.3 Read Product ID Code ............................................................................................................................... 15

4.4 Program ...................................................................................................................................................... 15

4.5 Chip Erase .................................................................................................................................................. 16

4.6 Sector Erase ............................................................................................................................................... 16

4.7 Erase Suspend / Resume .......................................................................................................................... 17

4.8 Unlock Bypass .......................................................................................................................................... 17

4.8.1 Unlock Bypass Set ......................................................................................................................... 17

4.8.2 Unlock Bypass Program ................................................................................................................ 17

4.8.3 Unlock Bypass Reset ..................................................................................................................... 17

4.9 Sector Protect (By Command Input) ........................................................................................................ 19

4.10 Sector Unprotect ........................................................................................................................................ 20

5. Hardware Sequence Flags ................................................................................................................ 22

5.1 I/O7 (Data Polling) ...................................................................................................................................... 22

5.2 I/O6 (Toggle Bit) ......................................................................................................................................... 24

5.3 I/O2 (Toggle Bit II) ...................................................................................................................................... 25

5.4 I/O5 (Exceeding Timing Limits) ................................................................................................................ 25

5.5 I/O3 (Sector Erase Timer) .......................................................................................................................... 25

5.6 RY (/BY) (Ready / Busy) ............................................................................................................................. 26

6. Hardware Data Protection ................................................................................................................. 27

6.1 Low V^CCWrite Inhibit ................................................................................................................................. 27

6.2 Logical Inhibit ............................................................................................................................................ 27

6.3 Power-Up Write Inhibit .............................................................................................................................. 27

7. Electrical Characteristics .................................................................................................................. 28

8. Package Drawings ............................................................................................................................. 39

9. Recommended Soldering Conditions .............................................................................................. 41

6

Preliminary Data Sheet

µPD29F008AL-X

1. Input / Output Pin Function

Function

Pin name

A0 - A19

A9

Input / Output

Input

Address input bus

Address input pin.

Input

If 11.5 to 12.5 V is applied to A9, the chip enters the read product ID code mode.

In this mode, and input to A0 causes the following codes to be output.

A0 = Low level : Manufacturer code is output.

A0 = High level : Device code is output.

Data input / output bus.

I/O0 - I/O7

/CE

Input / Output

Input

This pin inputs the signal that activates the chip.

When high level, the chip enters the standby mode.

This pin inputs the read operation control signal.

When high level, output is disabled.

/OE

Input

This pin inputs the write operation control signal.

When low level, command input is accepted.

/WE

This pin inputs hardware reset.

/RESET

When low level, hardware reset is performed.

If 11.5 to 12.5 V is applied to /RESET, the chip enters the temporary sector unprotect mode.

This pin indicates whether automatic program / erase is currently being executed. It uses

open drain connection.

RY (/BY)

Output

Low level indicates the busy state during which the device is performing automatic program /

erase.

High level indicates the device is in the ready state and will accept the next operation. In this

case, the device is either in the erase suspend mode or the standby mode.

Supply Voltage

Ground

V^CC

–

GND

NC

No Connection

Preliminary Data Sheet

7

µPD29F008AL-X

2. Sector Configuration / Sector Address Table

[ µPD29F008ALGZ-×××TX ]

Sector Layout

Sector Address Table

A19 A18 A17 A16 A15 A14 A13

Sector

address

Address

FFFFFH

16 Kbytes

8 Kbytes

SA18

SA17

SA16

1

0

×

1

0

FC000H

FBFFFH

FA000H

F9FFFH

F8000H

F7FFFH

32 Kbytes

64 Kbytes

SA15

SA14

1

0

×

F0000H

EFFFFH

×

E0000H

DFFFFH

SA13

SA12

SA11

SA10

SA9

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

SA0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

×

64 Kbytes

D0000H

CFFFFH

C0000H

BFFFFH

B0000H

AFFFFH

A0000H

9FFFFH

64 Kbytes

9 0 0 0 0 H

8FFFFH

8 0 0 0 0 H

7FFFFH

7 0 0 0 0 H

6FFFFH

64 Kbytes

6 0 0 0 0 H

5FFFFH

5 0 0 0 0 H

4FFFFH

64 Kbytes

4 0 0 0 0 H

3FFFFH

3 0 0 0 0 H

2FFFFH

2 0 0 0 0 H

1FFFFH

1 0 0 0 0 H

0FFFFH

0 0 0 0 0 H

8

Preliminary Data Sheet

µPD29F008AL-X

[ µPD29F008ALGZ-×××BX ]

Sector Layout

Sector Address Table

A19 A18 A17 A16 A15 A14 A13

Sector

address

Address

FFFFFH

SA18

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

×

64 Kbytes

F0000H

EFFFFH

SA17

SA16

SA15

SA14

SA13

SA12

SA11

SA10

SA9

E0000H

DFFFFH

D0000H

CFFFFH

C0000H

BFFFFH

B0000H

AFFFFH

64 Kbytes

64K bytes

A0000H

9FFFFH

9 0 0 0 0 H

8FFFFH

8 0 0 0 0 H

7FFFFH

64 Kbytes

7 0 0 0 0 H

6FFFFH

6 0 0 0 0 H

5FFFFH

SA8

64 Kbytes

5 0 0 0 0 H

4FFFFH

SA7

4 0 0 0 0 H

3FFFFH

SA6

3 0 0 0 0 H

2FFFFH

SA5

2 0 0 0 0 H

1FFFFH

SA4

SA3

0

1

0

×

64 Kbytes

32 Kbytes

1 0 0 0 0 H

0FFFFH

1

0 8 0 0 0 H

07FFFH

8 Kbytes

16 Kbytes

SA2

SA1

SA0

0

1

0

1

0

×

0 6 0 0 0 H

05FFFH

0 4 0 0 0 H

03FFFH

0 0 0 0 0 H

Preliminary Data Sheet

9

µPD29F008AL-X

3. Bus Operations

The Operation modes of this device are described below.

Table 3-1. Bus Operation

Operation

/CE

L

/OE

L

/WE

A9

A6

A1

A0

I/O0 - I/O7

Data output

Data input

Hi-Z

/RESET

Read

H

Address input

H

L

Write

L

H

×

L

×

Standby

H

L

×

L

×

L

×

H

×

L

×

L

×

L

H

Output disable

Hardware reset

Sector protect

H

×

H

Hi-Z

×

Hi-Z

L

V^ID

L

Pulse

H

V^ID

×

H

V^ID

H

Verify sector protect

L

Code

×

Temporary sector unprotect

×

Read product

ID code ^Note

Manufacturer code

Device code

L

H

V^ID

Code

L

H

Note The manufacturer code and device code can also be read by using commands. See section 4.3 Read

Product ID Code.

IH

IL

ID

Remark H : V , L : V , × : Don't care, V : 12.0 V ± 0.5 V

3.1 Read

At power ON or reset (hardware reset or reset command), the device is reset to read mode.

When the device is in read mode, no command is necessary for reading data. Data can be read using the standard

microprocessor read cycle.

The read mode is maintained until the contents of the command register are changed.

3.2 Write

Command write can be done using the standard microprocessor write timing.

The command is written to the command register. The command register has the function to latch the address and

data necessary for executing an instruction, and does not take up memory.

When an incorrect address or data is written, or addresses and data are written in an incorrect sequence, the device

is reset to the read mode.

3.3 Standby

When no write or read is performed, the device can be placed in standby mode. In this mode, the power

consumption is considerably reduced.

The device goes into standby mode when the /CE and /RESET pins are maintained at V^IH. At this time, the supply

CC

current can be kept at 5 µA or below by maintaining the /CE and /RESET at V ± 0.3 V.

3.4 Output Disable

IH

The output of the device can be disabled by maintaining /OE at V , at which time the output goes into high

impedance.

10

Preliminary Data Sheet

µPD29F008AL-X

3.5 Hardware Reset

IL

RP

The device can be reset to read mode by maintaining the /RESET pin at V at least during the t period.

IL

While the /RESET pin is held at V , all write and read commands are ignored. Moreover, all output pins go into high

impedance. At this time, the supply current can be kept at 5 µA or below by maintaining /RESET at GND ± 0.2 V.

When performing reset, the operations in progress are all interrupted. Therefore, when reset is performed during

program or erase (including erase suspend), the address or sector data become undefined. In this case, after reset is

completed, perform the program or erase operation again.

3.6 Sector Protect

The sector protect function enables protection of any sector. Protected sectors cannot be programmed or erased,

and any combination of up to 19 sectors can be protected.

ID

IL

IH

IL

To select the sector protect mode, apply V to A9 and /OE. Moreover, input V , V , and V to A0, A1, and A6,

IL

respectively, input the sector address of the sector to be protected to A13 to A19, and input V to /CE.

Sector protection starts at the falling edge of the /WE pulse and ends at the rising edge of the same pulse. Maintain

the sector address at a constant level during the /WE pulse interval.

ID

IL

IH

IL

To perform sector protect verification, apply V to A9. Also input V , V , and V to A0, A1, and A6, respectively,

IL

and the sector address of the sector to be verified to A13 to A19. The other address pins are Don't Care (V is

recommended.)

When read from the input sector address is performed, the sector protect verification result is output to I/O0. If the

verified sector is protected, "1" is output to I/O0. If it is not protected, "0" is output.

ID

Sector protect enables writing commands by applying V to /RESET. Moreover, it is also possible to unprotect the

sector with the same method. For details, see section 4.9 Sector Protect (by Command Input), and section 4.10

Sector Unprotect.

Figure 3-1. Sector Protect Timing Chart

A13 - A19 (Input)

A0 (Input)

SAx

SAy

A1 (Input)

A6 (Input)

V

ID

IH

A9 (Input)

t

VLHT

(Sector protect)

(Verify sector protect)

V

ID

IH

/OE (Input)

t

OESP

t

WPP

t

VLHT

tVLHT

/WE (Input)

/CE (Input)

I/O (Output)

t

CSP

01H ^Note

t

OE

Note The sector protect verification result is output.

01H : The sector is protected.

00H : The sector is not protected.

Preliminary Data Sheet

11

µPD29F008AL-X

Figure 3-2. Sector Protect Timing Chart

Start

Setup sector address

A13 to A19 = SA

Pulse count = 1

/OE = A9 = VID, /CE = VIL

,

A0 = V^IL, A1 = VIH, A6 = VIL

,

/RESET = V^IH

Increment pulse count

Add /WE pulse

Wait 100 µs

/WE = VIH, /CE = /OE = VIL

(A9 is still VID

)

Read from sector address

A13 to A19 = SA,

A0 = V^IL, A1 = VIH, A6 = VIL

No

Pulse count = 25?

Yes

No

Data = 01H?

Yes

Protect other sector?

No

Remove VID from A9,

write reset command

Yes

Fail

Remove VID from A9,

write reset command

Sector protect complete

12

Preliminary Data Sheet

µPD29F008AL-X

3.7 Temporary Sector Unprotect

Protected sector can be temporary unprotected in order to perform data program and erase.

ID

To select the temporary sector unprotect mode, apply V to /RESET. While this mode is selected, program and

erase can be performed even for protected sectors.

ID

When V stops being applied to /RESET, the sector is again protected.

Figure 3-3. Temporary Sector Unprotect Timing Chart

V

ID

IH

/RESET (Input)

(Program or erase command sequence)

/WE (Input)

/CE (Input)

t

VLHT

t

VLHT

RY (/BY) (Output)

3.8 Read Product ID Code

The read product ID code function enables reading the manufacturer code and device code from the device.

This function is used for example to switch the algorithm of the program device according to the device.

ID

IL

To select the read product ID code mode, apply V to A9. Moreover, input V to A1 and A6, and input V to A0 to

IH

IL

read the manufacturer code, and V to read the device code. Other addresses are Don't Care (V is recommended.)

When read is performed, the code described in Table 3-2 is output.

ID

The manufacturer code and device code can be read by using a command. In this case, V need not be applied to

A9. See section 4.3 Read Product ID Code.

Table 3-2. Product ID Code

Product ID code

Inputs

A1

Code outputs

A6

V^IL

A0

V^IL

V^IH

I/O7

0

I/O6

0

I/O5

0

I/O4

I/O3

0

I/O2

I/O1

0

I/O0

0

Hex

10H

3EH

37H

4EH

47H

Manufacturer code

Device code

V^IL

1

0

1

-B××TX

-B××BX

-C××TX

-C××BX

V^IL

0

1

0

V^IL

0

1

0

1

V^IL

0

1

0

1

0

V^IL

0

1

0

1

Preliminary Data Sheet

13

µPD29F008AL-X

4. Commands

The commands of this device and the command write method are described below.

4.1 Writing Commands

The write cycle of a standard microprocessor is used for command write.

Commands are written to the command register. The command register functions to latch addresses and data

required for instruction execution, and does not take up memory.

When an incorrect address or data is written, or addresses and data are written in an incorrect sequence, the device

is reset to the read mode.

Table 4-1 lists the commands and command sequence.

Table 4-1. Command Sequence

Command sequence

Bus

1st bus cycle

2nd bus cycle

3rd bus cycle

4th bus cycle

5th bus cycle

6th bus cycle

cycles Address Data Address Data Address Data Address Data Address Data Address Data

Read / Reset ^{Note 1}

1

3

4

6

1

3

2

H

F0H

AAH

B0H

30H

AAH

A0H

90H

–

F0H

90H

A0H

80H

–

RA

IA

–

RD

ID

–

×××

Read / Reset ^{Note 1}

Read product ID code

Program

555H

2AAH

–

55H

–

555H

–

PA

555H

–

PD

AAH

–

Chip erase

2AAH

55H

–

555H

SA

–

10H

30H

–

Sector erase

2AAH

Sector erase suspend ^{Note 2}

Sector erase resume ^{Note 3}

Unlock bypass set

Unlock bypass program

Unlock bypass reset

H

×××

–

H

×××

–

555H

2AAH

PA

55H

PD

00H

555H

–

20H

–

H

–

×××

H

–

×××

Notes 1. The device is reset to read mode by either the read or reset command.

2. If B0H is input to any address during sector erase, erase is suspended.

3. If 30H is input to any address during sector erase suspend, erase is resumed.

Remarks 1. RA : Read address.

RD : Read data.

PA : Program address.

PD : Program data.

SA : Erase address. Select the sector to be erased with a combination of A13 to A19. See section 2.

Sector Configuration / Sector Address Table.

IA : 00000H (If reading the manufacturer code).

: 00001H (If reading the device code).

ID : 10H (manufacturer code).

: 3EH (B××T type device code), 4EH (C××T type device code)

: 37H (B××B type device code), 47H (C××B type device code)

2. A11 to A19 are Don't Care except when selecting a program / erase address.

3. For the bus operation, see section 3. Bus Operation.

14

Preliminary Data Sheet

µPD29F008AL-X

4.2 Read / Reset

This command resets the device to the read mode.

When the device is in the read mode, no command is necessary for reading data. Data read can be performed

using the read cycle of a standard microprocessor.

The read mode is maintained until the contents of the command register are changed.

4.3 Read Product ID code

This command is used to read the manufacturer code or the device code of the device.

The manufacturer code (10H) is output by inputting 00000H in the address using the fourth write cycle. The device

code is output when 00001H is input.

ID

The manufacturer code and device code can be read by selecting the read product ID code mode by applying V to

the A9 pin (See section 3.8 Read Product ID Code). However, applying a high voltage to the address pin is not

desirable due to system design considerations. Using this command allows reading the manufacturer code and

device code without applying a high voltage to the pin.

4.4 Program

This command is used to program data.

Program is performed in 1-byte units. Program can be performed regardless of the address sequence, even if the

sector limit is exceeded. However, "0" cannot be changed back into "1" through the program operation. If overwriting

"1" to "0" is attempted, the program operation is interrupted and "1" is output to I/O5, or successful program is

indicated in data polling, but actually the data is "0" as before.

Following write by command sequence, the pulse required for program is automatically generated inside the device

and program verification is automatically performed, so that control from external is not required.

During automatic program, all commands that have been written are ignored. However, automatic program is

interrupted when hardware reset is performed. Since the programmed data is not guaranteed in this case, reexecute

the program command following completion of reset.

Upon completion of automatic program, the device returns to the read mode.

The operation status of automatic program can be determined by using the hardware sequence flags (I/O7, I/O6, RY

(/BY) pins).

See sections 5.1 I/O7 (Data Polling), 5.2 I/O6 (Toggle Bit), and 5.6 RY (/BY) (Ready / Busy).

Figure 4-1. Program Flow Chart

Start

Write program

command sequence

Data poll from system

No

I/O7 = Data?

Yes

No

Last address?

Yes

Increment address

Programing

completed

Preliminary Data Sheet

15

µPD29F008AL-X

4.5 Chip Erase

This command is used to erase the entire chip.

Following command sequence write, erase is performed after "0" is written to all memory cells and verification is

performed, using the automatic erase function. Program before erase and control from external are not required.

During automatic erase, all commands that have been written are ignored. However, automatic erase is interrupted

by hardware reset. Since erase is not guaranteed in this case, execute the chip erase command again after reset is

completed.

Upon completion of automatic erase, the device returns to read mode.

The automatic erase operation status can be determined with the hardware sequence flags (I/O7, I/O6, RY (/BY)

pins). See sections 5.1 I/O7 (Data Polling), 5.2 I/O6 (Toggle Bit), and 5.6 RY (/BY) (Ready / Busy).

4.6 Sector Erase

This command is used to erase sectors one at a time.

Following command sequence write, erase is performed after "0" is written to all sectors to be erased and

verification is performed, using the automatic erase function. Data program before erase and control from external

are not required.

Sector erase timeout starts after command sequence write. During this timeout, sectors to be erased can be added

and selected. At this time, write the sector address and data (30H) of the sectors to be erased that have been added.

If the selected sectors include both protected sectors and unprotected sectors, only the unprotected sectors will be

erased and the protected sectors will be ignored.

If a command other than sector erase or erase suspend is input during timeout, the device is reset to the read

mode.

Automatic erase starts upon timeout completion. At this time, erase is started even if the last write cycle is not

completed.

During automatic erase, all commands other than erase suspend are ignored. However, when hardware reset is

performed, erase is interrupted. Since sector erase is not guaranteed in this case, reexecute the sector erase

command following completion of reset.

Upon completion of automatic erase, the device returns to the read mode.

The operation status of automatic erase can be determined by using the hardware sequence flags (I/O7, I/O6, I/O2,

RY (/BY) pins). See sections 5.1 I/O7 (Data Polling), 5.2 I/O6 (Toggle Bit), 5.3 I/O2 (Toggle Bit II), and 5.6 RY

(/BY) (Ready / Busy).

Figure 4-2. Sector / Chip Erase Flow Chart

Start

Write erase

command sequence

Data poll from system

No

Data = FFH?

Yes

Erasure completed

16

Preliminary Data Sheet

µPD29F008AL-X

Figure 4-3. Sector / Chip Erase Timing Chart

t

WC

t

AS

SA ^Note

Address (Input)

/CE (Input)

555H

2AAH

555H

2AAH

t

AH

t

GHWL

CH

t

/OE (Input)

/WE (Input)

I/O (Input)

t

WP

t

CS

t

WPH

DH

(10H for chip erase)

30H

t

AAH

55H

80H

AAH

55H

t

DS

t

VCS

V

CC

Note SA is the sector address of the sector to be erased. For chip erase, input 555H.

4.7 Erase Suspend / Resume

This command suspends automatic erase. During erase suspend, sectors for which erase is not performed can be

written to.

Suspend can be performed for sector erase (including the timeout period), but it cannot be performed for chip erase

and automatic program. Suspend can be performed for all sectors for which erase is being performed.

Following command sequence write, 20 µs are required until automatic erase is suspended.

While automatic erase is suspended, any sector for which erase is not being performed can be read and

programmed.

Whether automatic erase is suspended can be determined with the hardware sequence flags (I/O7, I/O6, I/O2 pins).

See sections 5.1 I/O7 (Data Polling), 5.2 I/O6 (Toggle Bit), and 5.3 I/O2 (Toggle Bit II).

To resume erase after it has been suspended, write the command (30H) again during erase suspend.

4.8 Unlock Bypass

This device provides an unlock bypass mode to shorten the write time.

Normally, 2 unlock cycles are required during program. In contrast, with the unlock bypass mode, it is possible to

perform program without unlock cycles.

In the unlock bypass mode, all commands except unlock bypass program and unlock bypass reset are ignored.

4.8.1 Unlock Bypass Set

This command sets the device to the unlock bypass mode.

4.8.2 Unlock Bypass Program

This command is used to perform program in the unlock bypass mode.

4.8.3 Unlock Bypass Reset

This command is used to quit the unlock bypass mode.

When this command is executed, the device returns to the read mode.

Preliminary Data Sheet

17

µPD29F008AL-X

Figure 4-4. Unlock Bypass Flow Chart

Start

Address= 555H

Data = AAH

Address = 2AAH

Data = 55H

Unlock bypass set

Address = 555H

Data = 20H

Address = Don't Care

Data = A0H

Address = Program address

Data = Program data

Data polling

Unlock bypass program

No

I/O7 = Data?

Yes

Last address?

Next address

Yes

Programming completed

Address = Don't Care

Data = 90H

Unlock bypass reset

Address = Don't Care

Data = 00H

End

18

Preliminary Data Sheet

µPD29F008AL-X

4.9 Sector Protect (By Command Input)

This command performs sector protect.

ID

By applying V to /RESET and writing 60H to any address, the device enters the sector protect or unprotect mode.

IL

Sector protect is started by inputting the sector address of the sector to be protected to A13 to A19, inputting V to

IH

A0 and A6, inputting V to A1, and writing 60H. After a timeout of 100 µs, sector protect is completed.

IL

Next, with the sector address input to A13 to A19, the device enters the sector protect verify mode by inputting V to

IH

A0 and A6, V to A1, and writing 40H. When read is performed in this state, the sector protect verify result is output

to I/O0. If "1" is output to I/O0, the verified sector is protected. If "1" was not output to I/O0, sector protect failed, so

perform sector protect again.

ID

Sector protect can also be performed by inputting V to A9 and /OE. For details, see section 3.6 Sector Protect.

Figure 4-5. Sector Protect (By Command Input)

Start

/RESET = VID

Wait 4 µs

No

Temporary sector

unprotect mode

Protect sectors?

Yes

Sector protect (unprotect) mode

Address = Don't care

Data = 60H

Pulse count = 1

Sector protect

A0 = A6 = V^IL, A1 = VIH

,

A13 - A19 = SA, Data = 60H

Increment pulse count

Wait 100µs

Verify sector protect

A0 = A6 = V^IL, A1 = VIH

,

A13 - A19 = SA, Data = 40H

Read from sector address

A0 = A6 = V^IL, A1 = VIH

,

A13 - A19 = SA

No

Pulse count = 25?

Yes

No

Data = 01H?

Yes

Protect other sector?

No

Remove VID from /RESET‚

write reset command

Yes

Fail

Remove VID from /RESET‚

write reset command

Sector protect complete

Preliminary Data Sheet

19

µPD29F008AL-X

4.10 Sector Unprotect

This command performs sector unprotect.

Sector unprotect is performed for all sectors. Unprotect cannot be performed for specific sectors. Moreover, all

sectors must be protected prior to unprotect.

ID

The device enters the sector protect or unprotect mode by applying V to /RESET and writing 60H to any address.

If unprotected sectors exist, first perform sector protect for these sectors. To perform sector protect, input the sector

IL

IH

address of the sector to be protected to A13 to A19, V to A0 and A6, and V to A1, and write 60H. See section 4.9

Sector Protect (By Command Input).

IL

IH

Sector unprotect is started by inputting V to A0, V to A1 and A6, and writing 60H with the sector address of the

sector to be unprotected input to A13 to A19. Following a timeout of 15 ms, sector unprotect is completed.

Unprotect verification must be performed for each sector.

IL

The device enters the sector unprotect mode by inputting the sector address to A13 to A19 and writing 40H, with V

IH

input to A0 and V input to A1 and A6.

If reading is performed in this state, the sector unprotect verification result is output to I/O0. If the verified sector is

unprotected, "0" is output to I/O0. If "0" is not output to I/O0, this means that unprotect failed, so perform sector

unprotect again.

20

Preliminary Data Sheet

µPD29F008AL-X

Figure 4-6. Sector Unprotect Flow Chart

Start

/RESET = VID

Wait 4µs

Sector Protect

Address = Don't Care, Data = 60H

Yes

All sectors protected?

No

n = 0

Verify sector protect

A0 = A6 = V^IL, A1 = VIH

,

A13-A19 = SA, Data = 40H

Read from sector address

A0 = A6 = V^IL, A1 = VIH

,

A13-A19 = SA

No

Data = 01H?

Yes

Sector protect

No

Last sector (n=18)?

Next sector address (n=n+1)

Yes

n = 0, Pulse count = 1

Sector unprotect

A0 = V^IL, A1 = A6 = VIH

Data = 60H

,

Time out 15 ms

Verify sector unprotect

A0 = V^IL, A1 = A6 = VIH

A13-A19 = SA, Data = 40H

,

Increment Pulse

Read from sector address

A0 = V^IL, A1 = A6 = VIH

,

A13-A19 = SA

No

Pulse count = 1000?

Yes

No

Data = 00H?

Yes

Last sector (n=18)?

Yes

No

Next sector address (n=n+1)

Remove VID from /RESET

Write reset command

Remove VID from /RESET

Write reset command

Failure

Sector unprotect completed

Preliminary Data Sheet

21

µPD29F008AL-X

5. Hardware Sequence Flags

The status of automatic program / erase operations can be determined from the status of the I/O2, I/O3, I/O5, I/O6,

I/O7, and RY (/BY) pins.

Table 5-1. Hardware Sequence Flag

Status

Program

I/O7^Note1I/O6^Note2I/O5^Note3

I/O3

I/O2^Note1RY (/BY)

Progress

/I/O7

Toggle

1

0

1

0

1

0

1

Erase

0

1

Toggle

Erase suspend

Erase suspended

sector

Non-erase

Data

/I/O7

Data

0

Data

0

Data

1

0

suspended sector

Erase suspend

program

Toggle

Exceeding time limits

Program

/I/O7

0

Toggle

1

0

1

0

1

0

Erase

N/A

Erase suspend

program

/I/O7

Notes 1. To read I/O7 or I/O2, a valid address must be input.

2. To read I/O6, any address can be used.

3. For I/O5, "1" is output if the automatic program / erase time exceeds the prescribed number of internal

pulses.

5.1 I/O7 (Data Polling)

Data polling is a function to determine whether automatic program / erase is currently being performed by using I/O7.

Data polling is valid from the rise of the last /WE in the program / erase command sequence.

Whether automatic program is currently being executed can be determined by reading from the program destination

addresses. When automatic program is in progress, the complement of the data programmed last is output. Upon

completion of automatic program, the true value of the programmed data, not the complement, is output.

If write is performed to an address inside a protected sector, data polling is valid for approximately 1 µs, and then

the device is reset to the read mode.

Whether automatic erase is in progress can be determined by reading from the addresses of the sector being

erased. If erase is in progress, "0" is output to I/O7. When automatic erase is completed or suspended, "1" is output

to I/O7.

During automatic erase, if all the selected sectors are protected, data polling is valid for approximately 100 µs. The

device is then reset to the read mode. If the selected sectors include both protected and unprotected sectors, only

unprotected sectors are erased, and protected sectors are ignored.

Upon completion of automatic program / erase, after the data output to I/O7 changes from the complement to the

true value, I/O7 changes asynchronously like I/O0 to I/O6 while /OE is maintained at low level.

22

Preliminary Data Sheet

µPD29F008AL-X

Figure 5-1. Data Polling Timing Chart

/CE (Input)

t

OE

tCH

/OE (Input)

/WE (Input)

t

OEH

t

CE

t

WHWH1 or tWHWH2

Hi-Z

Note

I/O7 (Output)

/I/O7

D

OUT

Status data

Valid data

I/O0 - I/O6 (Output)

OUT

Note I/O7 = D

: True value of write data (indicates completion of automatic program / erase)

Figure 5-2. Data Polling Flow Chart

Start

Read (I/O0 - I/O7)

An = Valid address

Yes

I/O7 = Data?

No

I/O5 = 1?

Yes

Read (I/O0 - I/O7)

An = Valid address

Yes

I/O7 = Data?

No

Fail

Pass

Preliminary Data Sheet

23

µPD29F008AL-X

5.2 I/O6 (Toggle Bit)

The toggle bit is a function that uses I/O6 to determine whether automatic program / erase is in progress.

The toggle bit becomes valid from the rise of the last /WE in the program / erase command sequence.

During automatic program / erase, I/O6 is toggled when continuous read is performed from any address. Upon

automatic program / erase completion or suspend, I/O6 stops being toggled and outputs valid data for read.

Continuous read control is performed with the /OE or /CE pins.

If program is performed for addresses inside a protected sector, I/O6 is toggled approximately 2 µs, and then the

device is reset to the read mode.

Moreover, if all the sectors selected at the time of automatic erase are protected, I/O6 is toggled approximately 100

µs, and then the device is reset to the read mode. If the selected sectors include both protected and unprotected

sectors, only unprotected sectors are erased, and protected sectors are ignored.

In this way, by using I/O6, it is possible to determine whether automatic erase is in progress (or suspended), but to

determine which sector is being erased, I/O2 (toggle bit II) is used. See section 5.3 I/O2 (Toggle Bit II).

Figure 5-3. Toggle Bit Timing Chart

/CE (Input)

/WE (Input)

t

OEH

t

OES

/OE(Input)

Valid

data out

Stop

I/O6 (Input / Output)

Input data

Toggle

toggling^Note

Note I/O6 stops the toggle (indicates automatic program / erase completion).

Figure 5-4. Toggle Bit Flow Chart

Start

Read (I/O0 - I/O7)

An = Don't Care

No

I/O6 = toggle?

Yes

No

I/O5 = 1?

Yes

Read (I/O0 - I/O7)

An = Don't Care

No

I/O6 =toggle?

Yes

Fail

Pass

24

Preliminary Data Sheet

µPD29F008AL-X

5.3 I/O2 (Toggle Bit II)

Toggle bit II is a function that determines whether automatic erase (or erase suspend) is in progress for a particular

sector by using I/O2.

I/O2 is toggled when continuous read is performed from addresses in a sector during automatic erase (or erase

suspend). Either /OE or /CE is used to control continuous read.

When write to a sector that is not subject to erase suspend is attempted during erase suspend, read from sectors

that are not subject to erase suspend cannot be performed until program is completed. In this case, if continuous

read is performed from addresses in sectors that are not subject to erase suspend, "1" is not output to I/O2.

In this way, it is possible to determine whether automatic erase (including erase suspend) is in progress for sectors

specified using I/O2, but whether the state is erase in progress or erase suspend cannot be determined with I/O2. To

determine this, I/O6 (toggle bit) must be used. See section 5.2 I/O6 (Toggle Bit).

5.4 I/O5 (Exceeding Timing Limits)

If the program / erase time exceeds the prescribed number of pulses during automatic program / erase (exceeding

timing limit), "1" is output to I/O5 and automatic program / erase failure is indicated.

Moreover, if overwriting "0" to "1" is attempted, the device judges data overwrite to be impossible, and "1" is output

to I/O5 when the timing limit is exceeded.

When this happens, execute command reset.

5.5 I/O3 (Sector Erase Timer)

A 50 µs timeout period occurs following write with the sector erase command sequence before automatic erase

starts.

During this timeout period, "0" is output to I/O3. When automatic erase starts upon completion of the timeout

period, "1" is output to I/O3.

If sector erase is performed, first confirm whether the device has received a command by using I/O7 (data polling)

or I/O6 (toggle bit). Then, using I/O3, check whether automatic erase has started. If I/O3 is "0", the timeout period is

not over, and so it is possible to add sectors to erase. If I/O3 is "1", automatic erase starts and other commands

(except erase suspend) are ignored until erase is completed.

If a sector to erase is added during the sector erase timeout period, it is recommended to check I/O3 prior to and

following the addition. If I/O3 is "1" following the addition, that addition may not be accepted.

Preliminary Data Sheet

25

µPD29F008AL-X

5.6 RY (/BY) (Ready / Busy)

The RY (/BY) pin is a dedicated output pin used to check whether automatic program / erase is in progress.

During automatic program / erase, "0" is output to the RY (/BY) pin. If "1" is output, this signifies that the device is

either in the read mode (including erase suspend) or standby mode.

Since the RY (/BY) pin is an open-drain output pin, it is possible to connect several RY (/BY) pins in series by

connecting a pull-up resistor to V^CC.

Figure 5-5. RY (/BY) (Ready / Busy) Timing Chart

/CE (Input)

Rising edge of the last write pulse

/WE (Input)

Automatic program or erase

RY (/BY) (Output)

t

BUSY

26

Preliminary Data Sheet

µPD29F008AL-X

6. Hardware Data Protection

This device requires two unlock cycles for program / erase command sequence to prevent illegal program / erase.

Moreover, a hardware data protect function is provided as follows.

6.1 Low V^CCWrite Inhibit

CC

To prevent an illegal write cycle during V transition, the command register and program / erase circuit is disabled

CC

LKO

CC

and all write cycles are ignored while V is V

or lower. Write commands are ignored until V becomes equal to

LKO

or greater than V

.

6.2 Logical Inhibit

IL

IH

The write cycle is inhibited under any of the following conditions : /OE = V , /CE = V , or /WE = V . To start a write

IL

IH

cycle, /CE = V and /WE = V must be set while /OE = V .

6.3 Power-Up Write Inhibit

IL

IH

Even if /WE = /CE = V and /OE = /V are satisfied at power-up, no commands are accepted at the rising edge of

/WE. The device is automatically reset to the read mode at power ON.

Preliminary Data Sheet

27

µPD29F008AL-X

7. Electrical Characteristics

Absolute Maximum Ratings

Condition

Supply voltage

Symbol

Test condition

with respect to GND

Rating

Unit

V

V^CC

V^I

−0.5 to + 5.5

Input voltage

with respect to GND except GND, A9, /RESET, /OE −0.5^{Note 1}to +5.5^{Note 2}

−0.5^{Note 1}to +13.5^{Note 2}

V

GND, A9, /RESET, /OE

1

2

Output voltage

V^O

T^A

with respect to GND

−

0.5^Noteto V^CC+0.5^Note

V

Ambient operating temperature

Storage temperature

−25 to +85

−65 to +125

−25 to +85

°C

T^stg

T^bias

under bias

Notes 1. –2.0 V (MIN.) (pulse width ≤ 20 ns)

2. V^CC+ 2.0 V (MAX.) (pulse width ≤ 20 ns)

Caution Exposing the device to stress above those listed in Absolute Maximum Rating could cause

permanent damage. The device is not meant to be operated under conditions outside the limits

described in the operational section of this specification. Exposure to Absolute Maximum Rating

conditions for extended periods may affect device reliability.

Capacitance (T^A= 25 °C, f = 1 MHz)

Parameter

Symbol

C^I

Test condition

MIN.

TYP.

6.0

MAX.

7.5

Unit

pF

Input capacitance

Output capacitance

V^IN= 0 V

C^O

V^OUT= 0 V

8.5

12.0

pF

Recommended Operating Conditions

Parameter

Symbol

Test condition

B90X, B12X

TYP.

C15X, C12X

TYP.

Unit

MIN.

2.7

MAX.

3.6

MIN.

2.2

MAX.

2.7

Supply voltage

V^CC

V^IH

V

High level

2.0

V^CC+0.3^{Note 1}0.7×V^CC

V^CC+0.3^{Note 1}

input voltage

V^ID

V^IL

T^A

High voltage is applied

(A9, /RESET, /OE)

11.5

−0.5^{Note 2}

−25

12.5

+0.8

+85

11.5

−0.5^{Note 2}

–25

12.5

Low level

+0.8

V

input voltage

Ambient operating

temperature

+85

°C

Notes 1. V^CC+ 0.6 V (MAX.) (pulse width ≤ 20 ns)

2. –0.6 V (MIN.) (pulse width ≤ 20 ns)

28

Preliminary Data Sheet

µPD29F008AL-X

DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)

Parameter

Symbol

Test condition

-B90X, -B12X

-C12X, -C15X

Unit

V

MIN. TYP. MAX. MIN. TYP. MAX.

High level output voltage

V^OH1

V^OH2

V^OL

I^LI1

I^OH= −2.0 mA, V^CC= V^CC(MIN.)

I^OH= −100 µA, V^CC= V^CC(MIN.)

I^OL= 4.0 mA, V^CC= V^CC(MIN.)

V^I= GND to V^CC, V^CC= V^CC(MAX.)

A9, /OE, /RESET = 12.5 V

2.4

0.85

×

V

CC

V

^CC–0.4

V

^CC–0.4

Low level output voltage

Input leakage current

0.45

V

–1.0

+1.0 –1.0

35

+1.0 µA

35

under high voltage

I^LI2

Output leakage current

Supply voltage Read

I^LO

V^O= GND to V^CC, V^CC= V^CC(MAX.)

+1.0 –1.0

12

+1.0 µA

I^CC1

/CE = V^IL, /OE = V^IH, 5 MHz,

I^OUT= 0 mA

7

12

mA

Program, Erase

I^CC2

I^CC3

/CE = V^IL, /OE = V^IH

20

30

5

30

5

mA

Standby

V^CC= V^CC(MAX.), /CE = V^CC± 0.3 V,

/RESET = V^CC± 0.3 V, /OE = V^IL

0.2

0.075

µA

V^CC= V^CC(MAX.), /CE = V^IH,

/RESET = V^IH, /OE = V^IL

250

5

Standby, Reset

I^CC4

V^CC= V^CC(MAX.),

0.2

0.075

5

µA

/RESET = GND ± 0.2 V

V^CC= V^CC(MAX.), /RESET = V^IL

V^IH= V^CC± 0.2 V, V^IL= GND ± 0.2 V

/CE = V^IL, /OE = V^IH

250

5

Automatic sleep

mode

I^CC5

5

µA

250

Low V^CClock-out voltage^Note

V^LKO

2.3

2.5

1

1.5

V

Note When V^CCis equal to or lower than V^LKO, the device ignores all write cycles. See section 6.1 Low V^CCWrite

Inhibit.

Preliminary Data Sheet

29

µPD29F008AL-X

AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)

AC Test Conditions

[ µPD29F008AL-B×××X ]

Input Waveform (Rise and Fall Time ≤ 5 ns)

3.0 V

1.5 V

Test points

1.5 V

0 V

Output Waveform

3.0 V

1.5 V

0 V

[ µPD29F008AL-C×××X ]

Input Waveform (Rise and Fall Time ≤ 5 ns)

2.5 V

1.0 V

0 V

Test points

1.0 V

Output Waveform

2.5 V

1.0 V

0 V

Test points

1.0 V

[ µPD29F008AL-B×××X, C×××X ]

Output Load

1.3 V

µ

PD29F008AL-X

I/O0 - I/O7

3.3 kΩ

Test point

CL = 100 pF

L

Remark C includes capacitance of the probe and jig, and stray capacitances.

30

Preliminary Data Sheet

µPD29F008AL-X

Read Cycle

Parameter

Symbol

Test condition

-B90X

-B12X

-C12X

-C15X

Unit Note

MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.

Read cycle time

t^RC

t^ACC

t^CE

90

120

150

ns

µs

Address access time

/CE access time

/CE = /OE = V^IL

/OE = V^IL

90

35

30

120

50

120

50

150

55

/OE access time

t^OE

t^DF

t^OH

t^RH

Output disable time

Output hold time

30

40

0

/RESET high time before read

50

/RESET pin low to read mode t^READY

20

Read Cycle Timing Chart 1

t

RC

Address (Input)

/CE (Input)

t

ACC

t

CE

t

DF

/OE (Input)

tOEH

t

OE

t

OH

/WE (Input)

Hi-Z

I/O (Output)

Data out

Read Timing Chart 2

t

RC

Address (Input)

/RESET (Input)

/CE (Input)

t

RH

tACC

t

OE

t

OH

Hi-Z

I/O (Output)

Data Output

Preliminary Data Sheet

31

µPD29F008AL-X

Write Cycle (Program / Erase) (/WE Controlled)

Parameter

Symbol

-B90X

-B12X

-C12X

-C15X

Unit Note

MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX.

Write cycle time

t^WC

t^AS

90

0

120

0

120

0

150

0

ns

Address setup time

Address hold time

Data setup time

Data hold time

t^AH

45

0

50

0

65

0

65

0

t^DS

t^DH

/OE setup time

/OE hold time

t^OES

t^OEH

0

Read

0

Toggle bit,

Data poling

10

Read recovery time before write t^GHWL

0

ns

µs

/CE setup time

t^CS

t^CH

/CE hold time

0

Write pulse width

t^WP

35

30

50

30

65

35

65

35

Write pulse width high

Programming operation time

Sector erase operation time

Vcc setup time

t^WPH

t^WHWH1

t^WHWH2

t^VCS

9

1

9

1

9

1

9

1

s

1

50

4

50

4

50

4

50

4

µs

Voltage transition time

t^VLHT

t^WPP

2

Write pulse width

100

during sector protect

/OE setup time for valid /WE

/CE setup time for valid /WE

RY (/BY) recovery time

t^OESP

t^CSP

t^RB

4

µs

ns

µs

2

0

/RESET pulse width

t^RP

500

20

500

20

500

20

500

20

/RESET hold time before read

t^RH

RY (/BY) delay time

from /RESET low

t^RRB

RY (/BY) delay time from valid t^BUSY

program or erase operation

90

ns

Notes 1. The preprogramming time prior to the erase operation is not included.

2. Sector protect only.

32

Preliminary Data Sheet

µPD29F008AL-X

Write Cycle Timing Chart (/WE Controlled)

(3rd and 4th write cycle)

(Data polling)

t

WC

t

AS

Address (Input)

/CE (Input)

555H

PA

t

AH

t

RC

t

CH

t

CE

t

GHWL

/OE (Input)

/WE (Input)

t

WHWH1

t

WP

t

WPH

t

CS

t

OE

t

DH

I/O (Input / Output)

A0H

PD

/I/O7

D

OUT

DOUT

t

DS

t

OH

Remarks 1. This timing chart shows the last two write cycles among the write command sequence's four write

cycles, and data polling.

2. PA : Write address

PD : Write data

/I/O7 : The output of the complement of the data written to the device.

OUT

D

: The output of the data written to the device.

Sector / Chip Erase Timing Chart

t

WC

t

AS

SA ^Note

Address (Input)

/CE (Input)

555H

2AAH

555H

2AAH

t

AH

t

GHWL

CH

t

/OE (Input)

/WE (Input)

I/O (Input)

t

WP

t

CS

t

WPH

DH

(10H for chip erase)

30H

t

AAH

55H

80H

AAH

55H

t

DS

t

VCS

V

CC

Note SA is the sector address to be erased. In the case of chip erase, input 555H.

Preliminary Data Sheet

33

µPD29F008AL-X

Write Cycle (Program / Erase) (/CE Controlled)

Parameter

Symbol

-B90X

-B12X

-C12X

-C15X

Unit Note

MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX.

Write cycle time

t^WC

t^AS

90

0

120

0

120

0

150

0

ns

Address setup time

Address hold time

Data setup time

Data hold time

t^AH

45

0

50

0

65

0

65

0

t^DS

t^DH

/OE setup time

/OE hold time

t^OES

t^OEH

0

Read

0

Toggle bit,

Data poling

10

Read recovery time before write t^GHWL

0

ns

µs

/WE setup time

t^WS

t^WH

/WE hold time

0

Write pulse width

t^CP

35

30

50

30

65

35

65

35

Write pulse width high

Programming operation

Sector erase operation

t^CPH

t^WHWH1

t^WHWH2

9

1

9

1

9

1

9

1

s

1

Note 1. The preprogramming time prior to the erase operation is not included.

34

Preliminary Data Sheet

µPD29F008AL-X

Write Cycle Timing Chart (/CE Controlled)

(3rd and 4th write cycle)

(Data polling)

t

WC

t

AS

Address (Input)

/CE (Input)

555H

PA

t

AH

t

RC

t

CP

t

CPH

t

CE

t

GHEL

/CE (Input)

/WE (Input)

t

WHWH1

t

WH

t

WS

t

DS

t

OE

t

DH

I/O (Input / Output)

A0H

PD

/I/O7

D

OUT

DOUT

t

OH

Remarks 1. This timing chart shows the last two write cycles among the write command sequence's four write

cycles, and data polling.

2. PA : Write address

PD : Write data

/I/O7 : The output of the complement of the data written to the device.

OUT

D

: The output of the data written to the device.

Preliminary Data Sheet

35

µPD29F008AL-X

Sector Protect Timing Chart

A13 - A19 (Input)

SAx

SAy

A0 (Input)

A1 (Input)

A6 (Input)

V

ID

IH

A9 (Input)

t

VLHT

(Sector protect)

(Verify sector protect)

V

ID

IH

/OE (Input)

t

OESP

t

WPP

t

VLHT

t

VLHT

/WE (Input)

/CE (Input)

I/O (Output)

t

CSP

01H ^Note

t

OE

Remark SAx : First sector address

SAy : Next sector address

Note The sector protect verification result is output.

01H : The sector is protected.

00H : The sector is not protected.

Temporary Sector Unprotect Timing Chart

V

ID

IH

/RESET (Input)

(Program or erase command sequence)

/WE (Input)

/CE (Input)

t

VLHT

t

VLHT

RY (/BY) (Output)

36

Preliminary Data Sheet

µPD29F008AL-X

Data Polling during Automatic Program / Erase Operations Timing Chart

/CE (Input)

t

OE

tCH

/OE (Input)

/WE (Input)

t

OEH

t

CE

t

WHWH1 or tWHWH2

Hi-Z

Note

I/O7 (Output)

/I/O7

D

OUT

Status data

Valid data

I/O0 - I/O6 (Output)

OUT

Note I/O7 = D

: True value of write data (indicates automatic program / erase completion)

Toggle Bit during Automatic Program / Erase Operations Timing Chart

/CE (Input)

/WE (Input)

t

OEH

t

OES

/OE(Input)

Valid

data out

Stop

I/O6 (Input / Output)

Input data

Toggle

toggling^Note

Note I/O6 stops toggle (indicates automatic program / erase completion)

RY (/BY) during Write / Erase Operations Timing Chart

/CE (Input)

Rising edge of the last write pulse

Automatic program or erase

/WE (Input)

RY (/BY) (Output)

t

BUSY

Preliminary Data Sheet

37

µPD29F008AL-X

Reset / RY (BY) Timing Chart

/WE (Input)

/RESET (Input)

t

RB

t

RP

RY (/BY) (Output)

t

RRB

38

Preliminary Data Sheet

µPD29F008AL-X

8. Package Drawings

40 PIN PLASTIC TSOP(I) (10x20)

1

40

21

detail of lead end

S

T

20

R

Q

L

U

P

I

J

A

G

C

S

N

S

B

K

M

D

M

NOTES

ITEM MILLIMETERS

INCHES

+0.004

0.394

1. Controlling dimention

millimeter.

A

10.0±0.1

–0.005

0.45 MAX.

0.5 (T.P.)

0.018 MAX.

0.020 (T.P.)

B

C

2. Each lead centerline is located within 0.08 mm (0.003 inch) of

its true position (T.P.) at maximum material condition.

+0.002

0.009

D

G

I

0.22±0.05

0.97±0.05

18.4±0.1

0.8±0.1

–0.003

3. "A" excludes mold flash. (Includes mold flash : 10.4 mm MAX.

<0.410 inch MAX.>)

+0.003

0.038

–0.002

+0.005

0.724

–0.004

+0.005

0.031

J

–0.004

+0.004

0.006

K

0.145±0.05

–0.002

0.5

0.020

0.004

L

M

N

0.10

+0.009

0.787

P

Q

R

20.0±0.2

0.1±0.05

–0.008

+0.002

0.004

–0.003

+5°

3°

+5°

3°

–3°

S

T

1.2 MAX.

0.25

0.047 MAX.

0.010

+0.006

0.024

U

0.6±0.15

–0.007

S40GZ-50-LJH1

Preliminary Data Sheet

39

µPD29F008AL-X

40 PIN PLASTIC TSOP(I) (10x20)

1

40

21

detail of lead end

U

L

Q

R

20

T

S

M

D

M

K

N

S

B

C

S

G

A

I

J

P

NOTES

ITEM MILLIMETERS

INCHES

+0.004

0.394

1. Controlling dimention

millimeter.

A

10.0±0.1

–0.005

0.45 MAX.

0.5 (T.P.)

0.018 MAX.

0.020 (T.P.)

B

C

2. Each lead centerline is located within 0.08 mm (0.003 inch) of

its true position (T.P.) at maximum material condition.

+0.002

0.009

D

G

I

0.22±0.05

0.97±0.05

18.4±0.1

0.8±0.1

–0.003

3. "A" excludes mold flash. (Includes mold flash : 10.4 mm MAX.

<0.410 inch MAX.>)

+0.003

0.038

–0.002

+0.005

0.724

–0.004

+0.005

0.031

J

–0.004

+0.002

0.006

K

0.145±0.05

–0.003

0.5

0.020

0.004

L

M

N

0.10

+0.009

0.787

P

Q

R

20.0±0.2

0.1±0.05

–0.008

+0.002

0.004

–0.003

+5°

3°

+5°

3°

–3°

S

T

1.2 MAX.

0.25

0.047 MAX.

0.010

+0.006

0.024

U

0.6±0.15

–0.007

S40GZ-50-LKH1

40

Preliminary Data Sheet

µPD29F008AL-X

9. Recommended Soldering Conditions

Please consult with our sales offices for soldering conditions of the µPD29F008AL-X.

Type of Surface Mount Device

µPD29F008ALGZ-X-LJH : 40-pin plastic TSOP (I) (10 × 20 mm) (Normal bent)

µPD29F008ALGZ-X-LKH : 40-pin plastic TSOP (I) (10 × 20 mm) (Reverse bent)

Preliminary Data Sheet

41

µPD29F008AL-X

[ MEMO ]

42

Preliminary Data Sheet

µPD29F008AL-X

NOTES FOR CMOS DEVICES

1

PRECAUTION AGAINST ESD FOR SEMICONDUCTORS

Note: Strong electric field, when exposed to a MOS device, can cause destruction

of the gate oxide and ultimately degrade the device operation. Steps must

be taken to stop generation of static electricity as much as possible, and

quickly dissipate it once, when it has occurred. Environmental control must

be adequate. When it is dry, humidifier should be used. It is recommended

to avoid using insulators that easily build static electricity. Semiconductor

devices must be stored and transported in an anti-static container, static

shielding bag or conductive material. All test and measurement tools

including work bench and floor should be grounded. The operator should

be grounded using wrist strap. Semiconductor devices must not be touched

with bare hands. Similar precautions need to be taken for PW boards with

semiconductor devices on it.

2

HANDLING OF UNUSED INPUT PINS FOR CMOS

Note: No connection for CMOS device inputs can be cause of malfunction. If no

connection is provided to the input pins, it is possible that an internal input

level may be generated due to noise, etc., hence causing malfunction. CMOS

device behave differently than Bipolar or NMOS devices. Input levels of

CMOS devices must be fixed high or low by using a pull-up or pull-down

circuitry. Each unused pin should be connected to V^DDor GND with a

resistor, if it is considered to have a possibility of being an output pin. All

handling related to the unused pins must be judged device by device and

related specifications governing the devices.

3

STATUS BEFORE INITIALIZATION OF MOS DEVICES

Note: Power-on does not necessarily define initial status of MOS device. Produc-

tion process of MOS does not define the initial operation status of the

device. Immediately after the power source is turned ON, the devices with

reset function have not yet been initialized. Hence, power-on does not

guarantee out-pin levels, I/O settings or contents of registers. Device is not

initialized until the reset signal is received. Reset operation must be

executed imme-diately after power-on for devices having reset function.

Preliminary Data Sheet

43

µPD29F008AL-X

[MEMO]

No part of this document may be copied or reproduced in any form or by any means without the prior written

consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this

document.

NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual

property rights of third parties by or arising from use of a device described herein or any other liability arising

from use of such device. No license, either express, implied or otherwise, is granted under any patents,

copyrights or other intellectual property rights of NEC Corporation or others.

While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,

the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or

property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety

measures in its design, such as redundancy, fire-containment, and anti-failure features.

NEC devices are classified into the following three quality grades:

"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on

a customer designated "quality assurance program" for a specific application. The recommended applications

of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each

device before using it in a particular application.

Standard: Computers, office equipment, communications equipment, test and measurement equipment,

audio and visual equipment, home electronic appliances, machine tools, personal electronic

equipment and industrial robots

Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster

systems, anti-crime systems, safety equipment and medical equipment (not specifically designed

for life support)

Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life

support systems or medical equipment for life support, etc.

The quality grade of NEC devices is "Standard" unless otherwise specified in NEC’s Data Sheets or Data Books.

If customers intend to use NEC devices for applications other than those specified for Standard quality grade,

they should contact an NEC sales representative in advance.

Anti-radioactive design is not implemented in this product.

M4 96. 5


型号：	UPD29F008ALGZ-C12TX-LKH
厂家：	NEC
描述：	Flash, 1MX8, 120ns, PDSO40, 10 X 20 MM, PLASTIC, REVERSE, TSOP1-40 光电二极管
文件：	总44页 (文件大小：249K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

UPD29F008ALGZ-C12TX-LKH [NEC]

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