UPD784026 [NEC]
16-BIT SINGLE-CHIP MICROCONTROLLER; 16位单芯片微控制器型号: | UPD784026 |
厂家: | NEC |
描述: | 16-BIT SINGLE-CHIP MICROCONTROLLER |
文件: | 总32页 (文件大小:247K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PRELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
µPD78F4937
16-BIT SINGLE-CHIP MICROCONTROLLER
The µPD78F4937, 78K/IV Series' product, is a flash memory version of the µPD784937 with internal masked ROM.
Data can be written to or erased from the flash memory of the µPD78F4937 with the microcontroller mounted on the
printed wiring board.
For specific functions and other detailed information, consult the following user's manuals.
These manuals are required reading for design work.
µPD784937 Subseries User's Manual, Hardware : To be created
78K/IV Series User's Manual, Instruction
:
U10905E
FEATURES
•
•
•
•
Pin-compatible with mask ROM model (except VPP pin)
Flash memory: 192K bytes
Internal RAM: 8,192 bytes
Same operating voltage as mask ROM model (VDD = 4.0 to 5.5 V)
ORDERING INFORMATION
Part number
Package
Internal ROM
µPD78F4937GC-8EU
µPD78F4937GF-3BA
100-pin plastic LQFP (fine pitch) (14 × 14 mm)
100-pin plastic QFP (14 × 20 mm)
Flash memory
Flash memory
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Document No. U13573EJ1V0PM00 (1st edition)
Date Published August 1998 J CP(K)
Printed in Japan
1998
©
µPD78F4937
78K/IV SERIES PRODUCT DEVELOPMENT DIAGRAM
: In production
: Under development
Standard Products Development
Connectable to the I2C bus
Connectable to the multimaster I2C bus
µ
PD784038Y
µ
PD784225Y
µPD784038
µ
PD784225
Internal memory has been expanded.
Pin-compatible with the µPD784026
80 pins
µ
ROM correction function has been added.
PD784026
Connectable to the multimaster I2C bus
Connectable to the multimaster I2C bus
A/D converters,
16-bit timers, and
power management
functions have been
enhanced.
µ
µPD784216Y
PD784218Y
PD784218
µPD784216
µ
100 pins
Internal memory has been expanded.
I/O has been enhanced.
Internal memory has been expanded.
ROM correction function has been added.
µ
PD784054
µ
PD784046
Built-in 10-bit A/D converter
ASSP Development
µ
PD784955
DC inverter control
µ
PD784937
µ
PD784908
Functions of the µPD784908 have been enhanced.
Internal memory has been expanded.
Built-in IEBusTM controller
ROM correction function has been added.
Connectable to the multimaster I2C bus
µ
PD784928Y
µ
PD784928
µ
PD784915
µ
Functions of the PD784915 have been enhanced.
Software servo control
Built-in analog circuit for VCR
Timers have been enhanced.
2
Preliminary Product Information
µPD78F4937
FUNCTIONS
(1/2)
Item
Function
Number of basic instructions
(mnemonics)
113
General-purpose register
8 bits × 16 registers × 8 banks, or 16 bits × 8 registers × 8 banks (memory mapping)
160 ns/320 ns/636 ns/1.27 µs (at 12.58 MHz)
Minimum instruction execution
time
Internal
memory
Flash memory
RAM
192K bytes
8,192 bytes
Memory space
I/O ports
Program and data: 1M byte
Total
80
8
Input
Input/output
72
24
Additional
function
pinsNote
LED direct
drive outputs
Transistor
8
4
direct drive
N-ch open
drain
Real-time output ports
IEBus controller
Timer/counter
4 bits × 2, or 8 bits × 1
Incorporated (simple version)
Timer/counter 0 : Timer register × 1
Pulse output capability
• Toggle output
(16 bits)
Capture register × 1
Compare register × 2
• PWM/PPG output
• One-shot pulse output
Timer/counter 1 : Timer register × 1
Real-time output port
(16 bits)
Capture register × 1
Capture/compare register × 1
Compare register × 1
Timer/counter 2 : Timer register × 1
Pulse output capability
• Toggle output
(16 bits)
Capture register × 1
Capture/compare register × 1
Compare register × 1
• PWM/PPG output
Timer 3
(16 bits)
:
Timer register × 1
Compare register × 1
Clock timer
Interrupt requests are generated at 0.5-second intervals. (A clock timer oscillator is
incorporated.)
Either the main clock (12.58 MHz) or real-timer clock (32.768 kHz) can be selected as the
input clock.
Clock output
PWM outputs
Serial interface
Selected from fCLK, fCLK/2, fCLK/4, fCLK/8, or fCLK/16 (can be used as a 1-bit output port)
12-bit resolution × 2 channels
UART/IOE (3-wire serial I/O) : 2 channels (incorporating baud rate generator)
CSI (3-wire serial I/O)
: 2 channels
Note Additional function pins are included in the I/O pins.
Preliminary Product Information
3
µPD78F4937
(2/2)
Item
Function
A/D converter
8-bit resolution × 8 channels
Watchdog timer
1 channel
ROM correction function
External expansion function
Standby
Internal (four correction addresses can be set.)
Provided (up to 1M byte)
HALT/STOP/IDLE mode
Interrupt
27 (20 internals, 7 externals (sampling clock variable input: 1))
BRK or BRKCS instruction, operand error
1 internal, 1 external
Hardware source
Software
Nonmaskable
Maskable
19 internals, 6 externals
• 4-level programmable priority
• 3 operation statuses: vectored interrupt, macro service, context switching
Power supply voltage
Package
VDD = 4.0 to 5.5 V
• 100-pin plastic LQFP (fine pitch) (14 × 14 mm)
• 100-pin plastic QFP (14 × 20 mm)
4
Preliminary Product Information
µPD78F4937
CONTENTS
1. DIFFERENCES AMONG MODELS IN µPD784937 SUBSERIES....................................................6
2. PIN CONFIGURATION (TOP VIEW) ................................................................................................7
3. BLOCK DIAGRAM...........................................................................................................................10
4. LIST OF PIN FUNCTIONS...............................................................................................................11
4.1 Port Pins (1/2) .......................................................................................................................................11
4.1 Port Pins (2/2) .......................................................................................................................................12
4.2 Non-Port Pins (1/2) ...............................................................................................................................13
4.2 Non-Port Pins (2/2) ...............................................................................................................................14
4.3 I/O Circuits for Pins and Handling of Unused Pins ...........................................................................15
5. INTERNAL MEMORY SWITCHING (IMS) REGISTER....................................................................18
6. FLASH MEMORY PROGRAMMING................................................................................................19
6.1 Selecting the Transmission Method ...................................................................................................19
6.2 Flash Memory Programming Functions.............................................................................................20
6.3 Connecting the Flashpro III .................................................................................................................20
7. PACKAGE DRAWINGS ...................................................................................................................21
APPENDIX A DEVELOPMENT TOOLS...............................................................................................23
APPENDIX B RELATED DOCUMENTS ..............................................................................................26
Preliminary Product Information
5
µPD78F4937
1. DIFFERENCES AMONG MODELS IN µPD784937 SUBSERIES
The only difference among the µPD784935, µPD784936, and µPD784937 models lie in the internal memory
capacity.
The µPD78F4937 has a 192K-byte flash memory instead of the mask ROM featured by the µPD784935,
µPD784936, and µPD784937. Table 1-1 shows the differences among these products.
Table 1-1. Differences Among Models in µPD784937 Subseries
Product
µPD784935
µPD784936
µPD784937
µPD78F4937
Item
Internal ROM
96K bytes
128K bytes
192K bytes
Mask ROM
5,120 bytes
Provided
None
Flash memory
Internal RAM
Regulator
6,656 bytes
8,192 bytes
None
Internal memory
switching registerNote
Provided
IC pin
Provided
None
None
VPP pin
Provided
Note The internal flash memory capacity and internal RAM capacity can be changed by setting the internal
memory switching register (IMS).
6
Preliminary Product Information
µPD78F4937
2. PIN CONFIGURATION (TOP VIEW)
•
100-pin plastic LQFP (fine pitch) (14 × 14 mm)
µPD78F4937GC-8EU
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
75
P100
P101
P102
P103
P104
1
P73/ANI3
2
3
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
P72/ANI2
P71/ANI1
P70/ANI0
4
5
6
7
8
9
V
PP
P105/SCK3
P106/SI3
P107/SO3
RESET
XT2
PWM1
PWM0
P17
P16
P15
P14/TxD2/SO2
P13/RxD2/SI2
P12/ASCK2/SCK2
P11
P10
ASTB/CLKOUT
P90
P91
P92
P93
P94
P95
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
XT1
V
SS
X2
X1
REGOFF
REGC
V
DD
P00
P01
P02
P03
P04
P05
P06
P07
P96
P97
P40/AD0
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
Cautions 1. In normal operation, connect the VPP pin directly to the VSS pin.
2. Connect the AVDD pin directly to the VDD pin.
3. Connect the AVSS pin directly to the VSS pin.
Preliminary Product Information
7
µPD78F4937
•
100-pin plastic QFP (14 × 20 mm)
µPD78F4937GF-3BA
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
80
P36/T02
P37/T03
P100
1
P76/ANI6
P75/ANI5
P74/ANI4
P73/ANI3
P72/ANI2
P71/ANI1
P70/ANI0
2
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
3
P101
4
P102
5
P103
6
P104
7
P105/SCK3
P106/SI3
P107/SO3
RESET
XT2
8
VPP
9
PWM1
PWM0
P17
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
P16
XT1
P15
V
SS
P14/TxD2/SO2
P13/RxD2/SI2
P12/ASCK2/SCK2
P11
X2
X1
REGOFF
REGC
P10
V
DD
ASTB/CLKOUT
P90
P00
P01
P91
P02
P92
P03
P93
P04
P94
P05
P06
P95
P96
P07
P97
P67/REFRQ/HLDAK
P66/WAIT/HLDRQ
P65/WR
P40/AD0
P41/AD1
P42/AD2
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
Cautions 1. In normal operation, connect the VPP pin directly to the VSS pin.
2. Connect the AVDD pin directly to the VDD pin.
3. Connect the AVSS pin directly to the VSS pin.
8
Preliminary Product Information
µPD78F4937
A8-A19
: Address Bus
PWM0, PWM1
RD
: Pulse Width Modulation Output
AD0-AD7
ANI0-ANI7
: Address/Data Bus
: Analog Input
: Read Strobe
REFRQ
REGC
: Refresh Request
: Regulator Capacitance
: Regulator Off
ASCK, ASCK2 : Asynchronous Serial Clock
ASTB
AVDD
: Address Strobe
: Analog Power Supply
: Reference Voltage
: Analog Ground
: Clock Input
REGOFF
RESET
RX
: Reset
AVREF1
AVSS
: IEBus Receive Data
: Receive Data
: Serial Clock
RxD, RxD2
SCK0-SCK3
SI0-SI3
SO0-SO3
TO0-TO3
TX
CI
CLKOUT
HLDAK
HLDRQ
: Clock Output
: Serial Input
: Hold Acknowledge
: Hold Request
: Serial Output
: Timer Output
INTP0-INTP5 : Interrupt from Peripherals
: IEBus Transmit Data
: Transmit Data
: Power Supply
: Programming Power Supply
: Ground
NMI
: Non-maskable Interrupt
: Port 0
TxD, TxD2
VDD
P00-P07
P10-P17
P20-P27
P30-P37
P40-P47
P50-P57
P60-P67
P70-P77
P90-P97
P100-P107
: Port 1
VPP
: Port 2
VSS
: Port 3
WAIT
: Wait
: Port 4
WR
: Write Strobe
: Port 5
X1, X2
XT1, XT2
: Crystal (Main System Clock)
: Crystal (Watch)
: Port 6
: Port 7
: Port 9
: Port 10
Preliminary Product Information
9
µPD78F4937
3. BLOCK DIAGRAM
RxD/SI1
UART/IOE2
NMI
PROGRAMMABLE
INTERRUPT
CONTROLLER
TxD/SO1
BAUD-RATE
GENERATOR
ASCK/SCK1
INTP0-INTP5
RxD2/SI2
TxD2/SO2
UART/IOE1
INTP3
TO0
TIMER/COUNTER0
(16 bits)
BAUD-RATE
GENERATOR
ASCK2/SCK2
TO1
SCK0
SO0
SI0
CLOCKED
SERIAL
INTERFACE
TIMER/COUNTER1
INTP0
(16 bits)
SCK3
SO3
SI3
CLOCKED
SERIAL
INTERFACE3
INTP1
INTP2/CI
TO2
78 K/IV
CPU CORE
(RAM 512 bytes)
FLASH
MEMORY
(192K bytes)
TIMER/COUNTER2
(16 bits)
TO3
CLOCK OUTPUT
ASTB/CLKOUT
AD0-AD7
TIMER3
(16 bits)
A8-A15
A16-A19
RD
WR
P00-P03
P04-P07
BUS I/F
REAL-TIME
OUTPUT PORT
WAIT/HLDRQ
REFRQ/HLDAK
D0-D7
A0-A16
CE
OE
PGM
PWM0
PWM1
RAM
(8,192 bytes)
PWM
PORT 0
PORT 1
PORT 2
PORT 3
PORT 4
PORT 5
PORT 6
PORT 7
PORT 9
PORT 10
P00-P07
P10-P17
P20-P27
P30-P37
P40-P47
P50-P57
P60-P67
P70-P77
P90-P97
P100-P107
ANI0-ANI7
AVDD
A/D
CONVERTER
AVREF1
AVSS
INTP5
TX
RX
IEBus
CONTROLLER
RESET
X1
X2
REGC
REGOFF
SYSTEM
CONTROL
(REGULATOR)
WATCHDOG
TIMER
V
PP
V
DD
V
SS
XT1
XT2
WATCH
TIMER
10
Preliminary Product Information
µPD78F4937
4. LIST OF PIN FUNCTIONS
4.1 Port Pins (1/2)
Pin
I/O
I/O
Dual-function
Function
P00-P07
−
Port 0 (P0):
• 8-bit I/O port.
• Functions as a real-time output port (4 bits × 2).
• Inputs and outputs can be specified bit by bit.
• The use of pull-up resistors can be simultaneously specified by software
for all pins in input mode.
• Can drive a transistor.
P10
I/O
−
−
Port 1 (P1):
• 8-bit I/O port.
P11
• Inputs and outputs can be specified bit by bit.
• The use of pull-up resistors can be simultaneously specified by software
for all pins in input mode.
P12
ASCK2/SCK2
RxD2/SI2
TxD2/SO2
−
P13
• Can drive LED.
P14
P15-P17
P20
Input
NMI
Port 2 (P2):
• 8-bit input-only port.
P21
INTP0
• P20 does not function as a general-purpose port (nonmaskable interrupt).
However, the input level can be checked by an interrupt service routine.
• The use of pull-up resistors can be specified by software for pins P22 to
P27 (in units of 6 bits).
P22
INTP1
P23
INTP2/CI
INTP3
P24
• The P25/INTP4/ASCK/SCK1 pin functions as the SCK1 I/O pin by CSIM1.
P25
INTP4/ASCK/SCK1
INTP5
P26
P27
SI0
P30
I/O
RxD/SI1
TxD/SO1
SCK0
Port 3 (P3):
• 8-bit I/O port.
P31
• Inputs and outputs can be specified bit by bit.
• The use of pull-up resistors can be simultaneously specified by software
for all pins in input mode.
P32
P33
SO0
• P32 and P33 can be set as the N-ch open-drain pin.
P34-P37
P40-P47
TO0-TO3
AD0-AD7
I/O
Port 4 (P4):
• 8-bit I/O port.
• Inputs and outputs can be specified bit by bit.
• The use of pull-up resistors can be simultaneously specified by software
for all pins in input mode.
• Can drive LED.
Preliminary Product Information
11
µPD78F4937
4.1 Port Pins (2/2)
Pin
I/O
I/O
Dual-function
A8-A15
Function
P50-P57
Port 5 (P5):
• 8-bit I/O port.
• Inputs and outputs can be specified bit by bit.
• The use of pull-up resistors can be simultaneously specified by software
for all pins in input mode.
• Can drive LED.
P60-P63
P64
I/O
A16-A19
RD
Port 6 (P6):
• 8-bit I/O port.
• Inputs and outputs can be specified bit by bit.
• The use of pull-up resistors can be simultaneously specified by software
for all pins in input mode.
P65
WR
P66
WAIT/HLDRQ
REFRQ/HLDAK
ANI0-ANI7
P67
P70-P77
I/O
I/O
Port 7 (P7):
• 8-bit I/O port.
• Inputs and outputs can be specified bit by bit.
P90-P97
−
Port 9 (P9):
• 8-bit I/O port.
• Inputs and outputs can be specified bit by bit.
• The use of pull-up resistors can be simultaneously specified by software
for all pins in input mode.
P100-P104
P105
I/O
−
SCK3
SI3
Port 10 (P10):
• 8-bit I/O port.
• Inputs and outputs can be specified bit by bit.
• The use of pull-up resistors can be simultaneously specified by software
for all pins in input mode.
P106
P107
SO3
• P105 and P107 can be set as the N-ch open-drain pin.
12
Preliminary Product Information
µPD78F4937
4.2 Non-Port Pins (1/2)
Pin
TO0-TO3
CI
I/O
Output
Input
Dual-function
P34-P37
Function
Timer output
P23/INTP2
P30/SI1
P13/SI2
P31/SO1
P14/SO2
P25/INTP4/SCK1
P12/SCK2
P27
Input of a count clock for timer/counter 2
Serial data input (UART0)
RxD
Input
RxD2
TxD
Serial data input (UART2)
Output
Input
Serial data output (UART0)
TxD2
ASCK
ASCK2
SI0
Serial data output (UART2)
Baud rate clock input (UART0)
Baud rate clock input (UART2)
Serial data input (3-wire serial I/O0)
Serial data input (3-wire serial I/O1)
Serial data input (3-wire serial I/O2)
Serial data input (3-wire serial I/O3)
Serial data output (3-wire serial I/O0)
Serial data output (3-wire serial I/O1)
Serial data output (3-wire serial I/O2)
Serial data output (3-wire serial I/O3)
Serial clock I/O (3-wire serial I/O0)
Serial clock I/O (3-wire serial I/O1)
Serial clock I/O (3-wire serial I/O2)
Serial clock I/O (3-wire serial I/O3)
External interrupt request
Input
SI1
P30/RxD
P13/RxD2
P106
SI2
SI3
SO0
Output
P33
SO1
P31/TxD
P14/TxD2
P107
SO2
SO3
SCK0
SCK1
SCK2
SCK3
NMI
I/O
P32
P25/INTP4/ASCK
P12/ASCK
P105
Input
P20
−
INTP0
P21
•
•
Input of a count clock for timer/counter 1
Capture/trigger signal for CR11 or CR12
INTP1
INTP2
INTP3
P22
•
•
Input of a count clock for timer/counter 2
Capture/trigger signal for CR22
P23/CI
P24
•
•
Input of a count clock for timer/counter 2
Capture/trigger signal for CR21
•
•
Input of a count clock for timer/counter 0
Capture/trigger signal for CR02
INTP4
INTP5
AD0-AD7
A8-A15
A16-A19
RD
P25/ASCK/SCK1
P26
−
Input of a conversion start trigger for A/D converter
Time multiplexing address/data bus (for connecting external memory)
High-order address bus (for connecting external memory)
High-order address during address expansion (for connecting external memory)
Strobe signal output for reading the contents of external memory
Strobe signal output for writing on external memory
Wait signal insertion
I/O
P40-P47
P50-P57
P60-P63
P64
Output
Output
Output
Output
Input
WR
P65
WAIT
P66/HLDRQ
P67/HLDAK
P66/WAIT
P67/REFRQ
CLKOUT
REFRQ
HLDRQ
HLDAK
ASTB
Output
Input
Refresh pulse output to external pseudo static memory
Input of bus hold request
Output
Output
Output of bus hold response
Latch timing output of time multiplexing address (A0-A7) (for connecting
external memory)
Preliminary Product Information
13
µPD78F4937
4.2 Non-Port Pins (2/2)
Pin
CLKOUT
PWM0
PWM1
RX
I/O
Output
Output
Output
Input
Output
−
Dual-function
ASTB
Function
Clock output
−
−
−
−
−
−
−
−
PWM output 0
PWM output 1
Data input (IEBus)
Data output (IEBus)
TX
REGC
REGOFF
RESET
X1
Capacitor connection for stabilizing the regulator output
Signal for specifying regulator operation
Chip reset
−
Input
Input
−
Crystal input for system clock oscillation (A clock pulse can also be input to the
X1 pin.)
X2
XT1
Input
−
−
−
Real-time clock connection pin
XT2
ANI0-ANI7
AVREF1
AVDD
Input
−
P70-P77
Analog voltage inputs for the A/D converter
Application of A/D converter reference voltage
Positive power supply for the A/D converter
Ground for the A/D converter
Positive power supply
−
AVSS
VDD
VSS
Ground
VPP
Input
This pin is used to set the flash memory programming mode and applies a high
voltage when a program is written or verified. In normal operation mode,
connect this pin directly to the VSS pin.
14
Preliminary Product Information
µPD78F4937
4.3 I/O Circuits for Pins and Handling of Unused Pins
Table 4-1 describes the types of I/O circuits for pins and the handling of unused pins.
Figure 4-1 shows the configuration of these various types of I/O circuits.
Table 4-1. Types of I/O Circuits for Pins and Handling of Unused Pins (1/2)
Pin
I/O circuit type
5-A
I/O
I/O
Recommended connection method for unused pins
Input state: Connect these pins to the VDD pin.
P00-P07
P10, P11
Output state: Leave these pins open.
P12/ASCK2/SCK2
P13/RxD2/SI2
P14/TxD2/SO2
P15-P17
8-A
5-A
P20/NMI
2
Input
Connect these pins to the VDD or VSS pin.
Connect these pins to the VDD pin.
P21/INTP0
P22/INTP1
2-A
P23/INTP2/CI
P24/INTP3
P25/INTP4/ASCK/SCK1
8-A
2-A
I/O
Input state:
Connect this pin to the VDD pin.
Output state: Leave this pin open.
P26/INTP5
Input
Connect these pins to the VDD pin.
P27/SI0
P30/RxD/SI1
P31/TxD/SO1
P32/SCK0
5-A
10-A
5-A
I/O
Input state:
Connect these pins to the VDD pin.
Output state: Leave these pins open.
P33/SO0
P34/TO0-P37/TO3
P40/AD0-P47/AD7
P50/A8-P57/A15
P60/A16-P63/A19
P64/RD
P65/WR
P66/WAIT/HLDRQ
P67/REFRQ/HLDAK
P70/ANI0-P77/ANI7
P90-P97
20
I/O
Input state:
Connect these pins to the VDD or VSS pin.
Output state: Leave these pins open.
5-A
P100-P104
P105/SCK3
10-A
8-A
10-A
4
P106/SI3
P107/SO3
ASTB/CLKOUT
Output Leave this pin open.
Preliminary Product Information
15
µPD78F4937
Table 4-1. Types of I/O Circuits for Pins and Handling of Unused Pins (2/2)
Pin
I/O circuit type
I/O
Input
−
Recommended connection method for unused pins
RESET
XT2
2
−
−
1
−
3
2
3
−
−
Leave this pin open.
XT1
Input
−
Connect this pin to the VSS pin.
Connect these pins to the VDD pin.
REGOFF
REGC
−
PWM0, PWM1
Output Leave this pin open.
RX
Input
Connect this pin to the VDD or VSS pin.
TX
Output Leave this pin open.
AVREF1
AVSS
AVDD
VPP
−
Connect these pins to the VSS pin.
Connect this pin to the VDD pin.
Connect this pin directly to the VSS pin.
Input
Caution When the I/O mode of an I/O dual-function pin is unpredictable, connect the pin to VDD through a
resistor of 10 to 100 kilohms (particularly when the voltage of the reset input pin becomes higher
than that of the low level input at power-on or when I/O is switched by software).
Remark Since type numbers are consistent in the 78K Series, those numbers are not always serial in each
product. (Some circuits are not included.)
16
Preliminary Product Information
µPD78F4937
Figure 4-1. I/O Circuits for Pins
Type 1
Type 2-A
VDD
VDD
P
Pull-up
enable
P
IN
N
IN
Type 2
Schmitt trigger input with hysteresis characteristics
IN
Type 5-A
VDD
Schmitt trigger input with hysteresis characteristics
Type 3
Pull-up
enable
P
V
DD
V
P
DD
Data
P-ch
IN/OUT
Data
OUT
Output
disable
N
N-ch
Input
enable
Type 4
Type 8-A
VDD
VDD
Data
P
Pull-up
enable
P
OUT
V
P
DD
Output
disable
N
Data
IN/OUT
Output
disable
N
Push-pull output which can output high impedance
(both the positive and negative channels are off.)
Type 10-A
V
DD
Type 20
Pull-up
enable
P
VDD
Data
P
V
DD
Data
P
IN/OUT
IN/OUT
Open
Output
disable
drain
N
N
Output
disable
Comparator
P
N
+
–
Type 12
V
REF
(Threshold voltage)
P
N
Analog output
voltage
OUT
Input
enable
Preliminary Product Information
17
µPD78F4937
5. INTERNAL MEMORY SWITCHING (IMS) REGISTER
This register enables the software to avoid using part of the internal memory. The IMS register can be set to
establish the same memory mapping as used in ROM products that have different internal memory (ROM and RAM)
configurations.
The IMS register is set using 8-bit memory operation instructions.
A RESET input sets the IMS register to FFH.
Figure 5-1. Internal Memory Switching (IMS) Register
Address: 0FFFCH
7
When reset: FFH
W/R
6
1
5
4
3
1
2
1
1
0
IMS
1
ROM1
ROM0
RAM1
RAM0
ROM1
ROM0
Internal ROM capacity selection
0
0
1
1
0
1
0
1
Not to be set
96K bytes
128K bytes
192K bytes
RAM1
RAM0
Internal RAM capacity selection
0
0
1
1
0
1
0
1
Not to be set
5,120 bytes
6,656 bytes
8,192 bytes
Caution The IMS is not contained in a mask ROM product (µPD784935, µPD784936, or µPD784937).
The IMS setting to obtain the same memory map as masked ROM products are shown in Table 5-1.
Table 5-1. Internal Memory Switching Register (IMS) Setting Value
Product
IMS setting value
µPD784935
µPD784936
µPD784937
DDH
EEH
FFH
18
Preliminary Product Information
µPD78F4937
6. FLASH MEMORY PROGRAMMING
The flash memory can be written even while the device is mounted in the target system (on-board write). To write
a program into the flash memory, connect the dedicated flash writer (Flashpro III) to both the host machine and target
system.
Remark The Flashpro III is manufactured by Naito Densei Machida Mfg. Co., Ltd.
6.1 Selecting the Transmission Method
The Flashpro III writes into flash memory by means of serial transmission. The transmission method to be used
for writing is selected from those listed in Table 6-1. To select a transmission method, use the format shown in
Figure 6-1, according to the number of VPP pulses listed in Table 6-1.
Table 6-1. Transmission Methods
Transmission method
3-wire serial I/O
Number of channels
1
Pins
Number of VPP pulses
0
SCK3/P105
SO3/P107
SI3/P106
UART
1
TxD/SO1/P31
RxD/SI1/P30
8
Caution To select a transmission method, always use the corresponding number of VPP pulses listed in
Table 6-1.
Figure 6-1. Format of Transmission Method Selection
10 V
V
DD
SS
V
PP
1
2
n
V
V
V
DD
SS
RESET
Preliminary Product Information
19
µPD78F4937
6.2 Flash Memory Programming Functions
Flash memory writing and other operations can be performed by transmitting/receiving commands and data
according to the selected transmission method. Table 6-2 lists the main flash memory programming functions.
Table 6-2. Main Flash Memory Programming Functions
Function
Description
Batch erase
Block erase
Erases the entire contents of memory.
Erases the contents of specified memory block.
Batch blank check
Block blank check
Data write
Checks that the entire contents of memory have been erased.
Checks that the contents of specified block have been erased.
Write to the flash memory according to the specified write start address and number of bytes
of data to be written.
Batch verify
Block verify
Compares the entire contents of memory with the input data.
Compares the contents of specified memory block with the input data.
6.3 Connecting the Flashpro III
The connection between the Flashpro III and µPD78F4937 varies with the transmission method. Figures 6-2 and
6-3 show the connection for each transmission method.
Figure 6-2. Flashpro III Connection in 3-Wire Serial I/O Mode
Flashpro III
µPD78F4937
V
PP
V
V
PP
DD
V
DD
RESET
SCK
SO
RESET
SCK
SI
SI
SO
VSS
V
SS
Figure 6-3. Flashpro III Connection in UART Mode
Flashpro III
µ
PD78F4937
V
PP
V
V
PP
DD
V
DD
RESET
SO
RESET
RxD
SI
TxD
V
SS
VSS
20
Preliminary Product Information
µPD78F4937
7. PACKAGE DRAWINGS
100PIN PLASTIC QFP (14x20)
A
B
51
50
80
81
detail of lead end
C D
S
R
Q
31
30
100
1
F
J
G
M
H
I
P
K
M
N
L
NOTE
ITEM MILLIMETERS
INCHES
Each lead centerline is located within 0.15 mm (0.006 inch) of
its true position (T.P.) at maximum material condition.
A
23.6±0.4
0.929±0.016
+0.009
0.795
B
20.0±0.2
–0.008
REMARK
+0.009
0.551
C
14.0±0.2
–0.008
The shape and material of the ES product is the same as the
mass produced product.
D
F
17.6±0.4
0.8
0.693±0.016
0.031
G
0.6
0.024
+0.004
0.012
H
0.30±0.10
–0.005
I
0.15
0.006
J
0.65 (T.P.)
0.026 (T.P.)
+0.008
0.071
K
L
1.8±0.2
0.8±0.2
–0.009
+0.009
0.031
–0.008
+0.10
0.15
+0.004
0.006
M
–0.05
–0.003
N
P
0.10
0.004
+0.005
0.106
2.7±0.1
–0.004
Q
R
S
0.1±0.1
5°±5°
0.004±0.004
5°±5°
3.0 MAX.
0.119 MAX.
P100GF-65-3BA1-3
Preliminary Product Information
21
µPD78F4937
100 PIN PLASTIC LQFP (FINE PITCH) (14×14)
A
B
75
76
51
50
detail of lead end
S
C
D
R
Q
100
1
26
25
F
M
H
I
J
G
K
L
P
M
N
NOTE
ITEM MILLIMETERS
INCHES
Each lead centerline is located within 0.08 mm (0.003 inch) of
its true position (T.P.) at maximum material condition.
A
B
16.00±0.20
14.00±0.20
0.630±0.008
+0.009
0.551
–0.008
REMARK
+0.009
0.551
C
D
14.00±0.20
16.00±0.20
–0.008
The shape and material of the ES product is the same as the
mass produced product.
0.630±0.008
F
1.00
1.00
0.039
0.039
G
+0.05
0.22
H
0.009±0.002
–0.04
I
0.08
0.003
J
0.50 (T.P.)
0.020 (T.P.)
+0.009
0.039
K
L
1.00±0.20
0.50±0.20
–0.008
+0.008
0.020
–0.009
+0.03
0.17
+0.001
0.007
M
–0.07
–0.003
N
P
Q
0.08
0.003
1.40±0.05
0.10±0.05
0.055±0.002
0.004±0.002
+7°
3°
+7°
3°
R
S
–3°
–3°
1.60 MAX.
0.063 MAX.
S100GC-50-8EU
22
Preliminary Product Information
µPD78F4937
APPENDIX A DEVELOPMENT TOOLS
The following development tools are available for system development using the µPD78F4937.
See also (5).
(1) Language processing software
RA78K4
Assembler package used in common with 78K/IV Series
C compiler package used in common with 78K/IV Series
Device file for µPD784937 Subseries
CC78K4
DF784937
CC78K4-L
C compiler library source file used in common with 78K/IV Series
(2) Flash memory write tools
Flashpro IllNote
(PG-FPIII)
Flash writer used only for microcontrollers with internal flash memory
FA-100GF
Flash memory writing adapter for 100-pin plastic QFP (GF-3BA type).
Wiring must be performed according to product being used.
FA-100GC
Flash memory writing adapter for 100-pin plastic LQFP (GC-8EU type).
Wiring must be performed according to product being used.
Flashpro III controllerNote
Program controlled by a personal computer and which is supported by Flashpro III.
Runs under WindowsTM95, etc.
(3) Debugging tools
•
When using the in-circuit emulator IE-78K4-NS
IE-78K4-NS
In-circuit emulator used in common with 78K/IV Series
Power supply unit for IE-78K4-NS
IE-70000-MC-PS-B
IE-70000-98-IF-C
Interface adapter when the PC-9800 series computer (other than a notebook) is
used as the host machine
IE-70000-CD-IF-C
IE-70000-PC-IF-C
PC card and interface cable when a PC-9800 series notebook is used as the host
machine
Interface adapter when the IBM PC/ATTM compatible is used as the host machine
IE-784937-NS-EM1Note
NP-100GF
Emulation board for emulating µPD784937 Subseries
Emulation probe for 100-pin plastic QFP (GF-3BA type)
Emulation probe for 100-pin plastic LQFP (GC-8EU type)
NP-100GC
EV-9200-GF-100
Socket for mounting on target system board made for 100-pin plastic QFP (GF-
3BA type)
TGC-100SDW
Conversion adapter for connecting the target system board made for 100-pin plastic
LQFP (GC-8EU type) with NP-100GC
ID78K4-NS
SM78K4
Integrated debugger for IE-78K4-NS
System simulator used in common with 78K/IV Series
Device file for µPD784937 Subseries
DF789437
Note Under development
Preliminary Product Information
23
µPD78F4937
•
When using the in-circuit emulator IE-784000-R
IE-784000-R
In-circuit emulator used in common with 78K/IV Series
IE-70000-98-IF-B
IE-70000-98-IF-C
Interface adapter when the PC-9800 series computer (other than a notebook) is
used as the host machine
IE-70000-98N-IF
Interface adapter and cable when a PC-9800 series notebook is used as the host
machine
IE-70000-PC-IF-B
IE-70000-PC-IF-C
Interface adapter when the IBM PC/AT compatible is used as the host machine
IE-78000-R-SV3
Interface adapter and cable when the EWS is used as the host machine
IE-784937-NS-EM1Note
IE-784937-R-EM1Note
Emulation board for emulating µPD784937 Subseries
IE-78400-R-EM
Emulation board used in common with 78K/IV Series
IE-78K4-R-EX2Note
Conversion board for emulation probes required to use the IE-784937-NS-EM1 on
the IE-784000-R. The board is not needed when the IE-784937-R-EM1 is used.
EP-78064GF-R
EP-78064GC-R
EV-9200GF-100
Emulation probe for 100-pin plastic QFP (GF-3BA type)
Emulation probe for 100-pin plastic LQFP (GC-8EU type)
Socket for mounting on target system board made for 100-pin plastic QFP
(GF-3BA type)
TGC-100SDW
Conversion adapter for connecting the target system board made for 100-pin
plastic LQFP (GC-8EU type) with NP-100GC
ID78K4
Integrated debugger for IE-784000-R
SM78K4
DF784937
System simulator used in common with 78K/IV Series
Device file for µPD784937 Subseries
Note Under development
(4) Real-time OS
RX78K/IV
MX78K4
Real-time OS for 78K/IV Series
OS for the 78K/IV Series
24
Preliminary Product Information
µPD78F4937
(5) Notes when using development tools
• The ID78K4-NS, ID78K4, and SM78K4 can be used in combination with the DF784937.
• The CC78K4 and RX78K/IV can be used in combination with the RA78K4 and DF784937.
• The Flashpro III, FA-100GF, FA-100GC, NP-100GF, and NP-100GC are manufactured by Naito Densei
Machida Mfg. Co., Ltd. (044-822-3813). Consult the NEC sales representative for purchasing.
• The TGC-100SDW is a product from TOKYO ELETECH CORPORATION.
Refer to: Daimaru Kogyo, Ltd.
Tokyo Electronic Components Division (03-3820-7112)
Osaka Electronic Components Division (06-244-6672)
• The host machines and operating systems corresponding to each software are shown below.
Host machine
[OS]
PC
EWS
HP9000 series 700TM [HP-UXTM
SPARCstationTM [SunOSTM, SolarisTM
]
PC-9800 series [Windows]
IBM PC/AT compatibles
]
NEWSTM (RISC) [NEWS-OSTM
]
[Japanese/English Windows]
Software
ΟNote
RA78K4
CC78K4
Ο
Ο
ΟNote
ID78K4-NS
ID78K4
Ο
−
Ο
−
Ο
SM78K4
RX78K/IV
Ο
ΟNote
ΟNote
Ο
MX78K4
Ο
Note Software under MS-DOS
Preliminary Product Information
25
µPD78F4937
APPENDIX B RELATED DOCUMENTS
•
Documents Related to Devices
Document name
Document No.
Japanese
U13572J
English
To be created
This manual
To be created
−
µPD784935, 784936, 784937 Preliminary Product Information
µPD78F4937 Preliminary Product Information
µPD784937 Subseries User's Manual, Hardware
µPD784937 Subseries Special Function Registers
78K/IV Series User's Manual, Instruction
U13573J
To be created
To be created
U10905J
U10905E
−
78K/IV Series Instruction Summary Sheet
78K/IV Series Instruction Set
U10594J
U10595J
−
78K/IV Series Application Note, Software Basic
U10095J
U10095E
•
Documents Related to Development Tools (User's Manual)
Document name
Document No.
Japanese
U11334J
English
U11334E
RA78K Series Assembler Package
Operation
Language
U11162J
U11162E
RA78K Series Structured Assembler Preprocessor
CC78K Series C Compiler
U11743J
U11743E
Operation
Language
U11571J
U11571E
U11572J
U11572E
IE-78K4-NS
U13356J
To be created
EEU-1534
To be created
To be created
EEU-1469
U10093E
IE-784000-R
U12903J
IE-784937-R-EM1
To be created
To be created
EEU-934
IE-784937-NS-EM1
EP-78064
SM78K4 System Simulator Windows Base
SM78K Series System Simulator
Reference
U10093J
U10092J
U10092E
External Parts User Open
Interface Specifications
ID78K4-NS Integrated Debugger
Reference
Reference
Reference
U12796J
U10440J
U11960J
U12796E
U10440E
U11960E
ID78K4 Integrated Debugger Windows Base
ID78K4 Integrated Debugger HP-UX, SunOS, NEWS-OS Base
Caution The above documents may be revised without notice. Use the latest versions when you design
application systems.
26
Preliminary Product Information
µPD78F4937
•
Documents Related to Software to Be Incorporated into the Product (User's Manual)
Document name
Document No.
Japanese English
U10603E
78K/IV Series Real-Time OS
Basic
U10603J
U10604J
U10364J
U11779J
Installation
Debugger
U10604E
−
−
OS for 78K/IV Series MX78K4
•
Other Documents
Document name
Document No.
Japanese English
IC PACKAGE MANUAL
C10943X
C10535J
C11531J
C10983J
C11892J
C12769J
U11416J
SMD Surface Mount Technology Manual
C10535E
C11531E
C10983E
C11892E
−
Quality Grades on NEC Semiconductor Device
NEC Semiconductor Device Reliability/Quality Control System
Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD)
Semiconductor Device Quality Control/Reliability Handbook
Guide for Products Related to Microcomputer: Other Companies
−
Caution The above documents may be revised without notice. Use the latest versions when you design
application systems.
Preliminary Product Information
27
µPD78F4937
[MEMO]
28
Preliminary Product Information
µPD78F4937
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note: Strong electric field, when exposed to a MOS device, can cause destruction
of the gate oxide and ultimately degrade the device operation. Steps must
be taken to stop generation of static electricity as much as possible, and
quickly dissipate it once, when it has occurred. Environmental control must
be adequate. When it is dry, humidifier should be used. It is recommended
to avoid using insulators that easily build static electricity. Semiconductor
devices must be stored and transported in an anti-static container, static
shielding bag or conductive material. All test and measurement tools
including work bench and floor should be grounded. The operator should
be grounded using wrist strap. Semiconductor devices must not be touched
with bare hands. Similar precautions need to be taken for PW boards with
semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note: No connection for CMOS device inputs can be cause of malfunction. If no
connection is provided to the input pins, it is possible that an internal input
level may be generated due to noise, etc., hence causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of
CMOS devices must be fixed high or low by using a pull-up or pull-down
circuitry. Each unused pin should be connected to VDD or GND with a
resistor, if it is considered to have a possibility of being an output pin. All
handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note: Power-on does not necessarily define initial status of MOS device. Production
process of MOS does not define the initial operation status of the device.
Immediately after the power source is turned ON, the devices with reset
function have not yet been initialized. Hence, power-on does not guarantee
out-pin levels, I/O settings or contents of registers. Device is not initialized
until the reset signal is received. Reset operation must be executed imme-
diately after power-on for devices having reset function.
Preliminary Product Information
29
µPD78F4937
IEBus is a trademark of NEC Corporation.
Windows is a registered trademark or a trademark of Microsoft Corporation in the United States and/or other
countries.
PC/AT is a trademark of IBM Corporation.
HP9000 series 700 and HP-UX are trademarks of Hewlett-Packard Company.
SPARCstation is a trademark of SPARC International, Inc.
Solaris and SunOS are trademarks of Sun Microsystems, Inc.
NEWS and NEWS-OS are trademarks of SONY Corporation.
30
Preliminary Product Information
µPD78F4937
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
product in your application, pIease contact the NEC office in your country to obtain a list of authorized
representatives and distributors. They will verify:
•
•
•
•
•
Device availability
Ordering information
Product release schedule
Availability of related technical literature
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
•
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
NEC Electronics Inc. (U.S.)
Santa Clara, California
Tel: 408-588-6000
800-366-9782
NEC Electronics (Germany) GmbH NEC Electronics Hong Kong Ltd.
Benelux Office
Hong Kong
Eindhoven, The Netherlands
Tel: 040-2445845
Tel: 2886-9318
Fax: 2886-9022/9044
Fax: 408-588-6130
800-729-9288
Fax: 040-2444580
NEC Electronics Hong Kong Ltd.
Seoul Branch
Seoul, Korea
Tel: 02-528-0303
Fax: 02-528-4411
NEC Electronics (France) S.A.
Velizy-Villacoublay, France
Tel: 01-30-67 58 00
NEC Electronics (Germany) GmbH
Duesseldorf, Germany
Tel: 0211-65 03 02
Fax: 01-30-67 58 99
Fax: 0211-65 03 490
NEC Electronics Singapore Pte. Ltd.
United Square, Singapore 1130
Tel: 65-253-8311
NEC Electronics (France) S.A.
Spain Office
Madrid, Spain
NEC Electronics (UK) Ltd.
Milton Keynes, UK
Tel: 01908-691-133
Fax: 65-250-3583
Tel: 01-504-2787
Fax: 01908-670-290
Fax: 01-504-2860
NEC Electronics Taiwan Ltd.
Taipei, Taiwan
Tel: 02-719-2377
NEC Electronics Italiana s.r.1.
Milano, Italy
Tel: 02-66 75 41
NEC Electronics (Germany) GmbH
Scandinavia Office
Taeby, Sweden
Fax: 02-719-5951
Fax: 02-66 75 42 99
Tel: 08-63 80 820
NEC do Brasil S.A.
Cumbica-Guarulhos-SP, Brasil
Tel: 011-6465-6810
Fax: 08-63 80 388
Fax: 011-6465-6829
J98. 2
Preliminary Product Information
31
µPD78F4937
Some related documents may be preliminary versions. Note that, however, what documents are preliminary is not
indicated in this document.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on
a customer designated "quality assurance program" for a specific application. The recommended applications
of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each
device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC’s Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
M4 96. 5
相关型号:
UPD784031GC-8BT-A
Microcontroller, 16-Bit, 32MHz, MOS, PQFP80, 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP-80
NEC
UPD784031YGC-8BT-A
Microcontroller, 16-Bit, 32MHz, CMOS, PQFP80, 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP-80
NEC
©2020 ICPDF网 联系我们和版权申明