74AHC1G79GV [NEXPERIA]
Single D-type flip-flop; positive-edge triggerProduction;型号: | 74AHC1G79GV |
厂家: | Nexperia |
描述: | Single D-type flip-flop; positive-edge triggerProduction 光电二极管 逻辑集成电路 触发器 |
文件: | 总12页 (文件大小:213K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
Rev. 8 — 11 January 2022
Product data sheet
1. General description
The 74AHC1G79; 74AHCT1G79 is a single positive-edge triggered D-type flip-flop. Data at the
D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will
be stored in the flip-flop and appear at the Q output. Inputs are overvoltage tolerant. This feature
allows the use of these devices as translators in mixed voltage environments.
2. Features and benefits
•
Wide supply voltage range from 2.0 to 5.5 V
•
•
•
•
•
•
•
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Symmetrical output impedance
Balanced propagation delays
Input levels:
•
•
For 74AHC1G79: CMOS level
For 74AHCT1G79: TTL level
•
ESD protection:
•
•
•
HBM JESD22-A114F: exceeds 2000 V
MM JESD22-A115-A: exceeds 200 V
CDM JESD22-C101C: exceeds 1000 V
•
Specified from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AHC1G79GW -40 °C to +125 °C
74AHCT1G79GW
TSSOP5
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74AHC1G79GV
74AHCT1G79GV
-40 °C to +125 °C
SC-74A
plastic surface-mounted package; 5 leads
SOT753
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
4. Marking
Table 2. Marking codes
Type number
Marking[1]
74AHC1G79GW
74AHCT1G79GW
74AHC1G79GV
74AHCT1G79GV
AP
CP
A79
C79
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
D
Q
4
1
2
4
D
Q
2
CP
CP
mna440
mna441
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
CP
C
C
C
C
D
TG
C
TG
Q
C
C
C
TG
C
TG
C
mna442
Fig. 3. Logic diagram
©
Nexperia B.V. 2022. All rights reserved
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 8 — 11 January 2022
2 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
6. Pinning information
6.1. Pinning
74AHC1G79
74AHCT1G79
1
2
3
5
4
D
CP
V
CC
GND
Q
001aaf091
Fig. 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A)
6.2. Pin description
Table 3. Pin description
Symbol
D
Pin
1
Description
data input
CP
2
clock pulse input
ground (0 V)
data output
GND
Q
3
4
VCC
5
supply voltage
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition; X = don’t care;
Q + 1 = state after the next LOW-to-HIGH CP transition.
Inputs
Output
CP
↑
D
L
Q + 1
L
↑
H
X
H
Q
L
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
3 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
-0.5
-0.5
-20
-
Max
+7.0
+7.0
-
Unit
V
supply voltage
input voltage
V
IIK
input clamping current
output clamping current
output current
VI < -0.5 V
mA
mA
mA
mA
mA
°C
IOK
VO < -0.5 V or VO > VCC + 0.5 V
-0.5 V < VO < VCC + 0.5 V
[1]
[2]
±20
±25
75
IO
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
-75
-65
-
-
storage temperature
total power dissipation
+150
250
Tamb = -40 °C to +125 °C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT353-1 (TSSOP5) package: Ptot derates linearly with 3.3 mW/K above 74 °C.
For SOT753 (SC-74A) package: Ptot derates linearly with 3.8 mW/K above 85 °C.
9. Recommended operating conditions
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
74AHC1G79
74AHCT1G79
Unit
Min
2.0
0
Typ
Max
5.5
Min
4.5
0
Typ
Max
VCC
VI
supply voltage
input voltage
5.0
5.0
5.5
5.5
V
V
V
-
5.5
-
VO
output voltage
ambient temperature
0
-
VCC
+125
100
20
0
-
VCC
Tamb
Δt/ΔV
-40
-
+25
-40
-
+25
+125 °C
input transition rise and VCC = 3.3 V ± 0.3 V
fall rate
-
-
-
-
-
ns/V
ns/V
VCC = 5.0 V ± 0.5 V
-
-
20
10. Static characteristics
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
74AHC1G79
VIH
HIGH-level
input voltage
VCC = 2.0 V
VCC = 3.0 V
VCC = 5.5 V
VCC = 2.0 V
VCC = 3.0 V
VCC = 5.5 V
1.5
-
-
-
-
-
-
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
2.1
2.1
2.1
3.85
-
3.85
-
3.85
-
VIL
LOW-level
input voltage
-
-
-
0.5
0.9
1.65
-
-
-
0.5
0.9
1.65
-
-
-
0.5
0.9
1.65
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
4 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
Symbol Parameter
Conditions
25 °C
Min Typ Max
-40 °C to +85 °C -40 °C to +125 °C Unit
Min
Max
Min
Max
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = -50 μA; VCC = 2.0 V
1.9
2.9
4.4
2.0
3.0
4.5
-
-
-
-
-
-
1.9
2.9
-
-
-
-
-
1.9
2.9
-
-
-
-
-
V
V
V
V
V
IO = -50 μA; VCC = 3.0 V
IO = -50 μA; VCC = 4.5 V
4.4
4.4
IO = -4.0 mA; VCC = 3.0 V 2.58
IO = -8.0 mA; VCC = 4.5 V 3.94
2.48
3.8
2.40
3.70
-
VOL
LOW-level
VI = VIH or VIL
output voltage
IO = 50 μA; VCC = 2.0 V
-
-
-
-
-
-
0
0
0
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
V
IO = 50 μA; VCC = 3.0 V
IO = 50 μA; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
V
0.1
0.1
0.1
V
0.36
0.36
0.1
0.44
0.44
1.0
0.55
0.55
2.0
V
-
V
II
input leakage VI = 5.5 V or GND;
current VCC = 0 V to 5.5 V
-
μA
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
-
1.0
10
-
-
10
10
-
-
40
10
μA
pF
input
1.5
capacitance
74AHCT1G79
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = -50 μA
4.4
4.5
-
-
-
4.4
3.8
-
-
4.4
-
-
V
V
IO = -8.0 mA
3.94
3.70
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 50 μA
-
-
-
0
-
0.1
0.36
0.1
-
-
-
0.1
0.44
1.0
-
-
-
0.1
0.55
2.0
V
IO = 8.0 mA
V
II
input leakage VI = 5.5 V or GND;
current VCC = 0 V to 5.5 V
-
μA
ICC
ΔICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
-
-
1.0
-
-
10
-
-
40
μA
additional
per input pin; VI = 3.4 V;
1.35
1.5
1.5
mA
supply current other inputs at VCC or GND;
IO = 0 A; VCC = 5.5 V
CI
input
-
1.5
10
-
10
-
10
pF
capacitance
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
5 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
11. Dynamic characteristics
Table 8. Dynamic characteristics
GND = 0 V; tr = tf = ≤ 3.0 ns. For test circuit see Fig. 6. For waveform see Fig. 5.
Symbol Parameter Conditions
74AHC1G79
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tpd
propagation CP to Q
delay
[1]
[2]
VCC = 3.0 V to 3.6 V
CL = 15 pF
CL = 50 pF
-
-
4.9
8.4
1.0
1.0
9.8
1.0
1.0
11.5
15.5
ns
ns
6.9 12.0
14.0
VCC = 4.5 V to 5.5 V
CL = 15 pF
[3]
-
-
3.5
5.1
1.0
5.6
1.0
1.0
3.0
2.0
3.0
90
7.0
1.0
1.0
4.0
3.0
4.0
70
8.0
ns
CL = 50 pF
8.0
10.0
11.0
ns
tsu
th
set-up time D to CP
hold time D to CP
3.0
-
-
-
-
-
-
-
-
-
-
-
-
ns
+2.0 -1.0
ns
tW
pulse width clock HIGH or LOW
3.0
90
-
-
ns
fmax
maximum
frequency
MHz
CPD
power
per buffer; CL = 50 pF;
[4]
-
15
-
-
-
-
-
pF
dissipation
capacitance
f = 1 MHz; VI = GND to VCC
74AHCT1G79
tpd
propagation CP to Q
[1]
[3]
delay
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
-
3.5
5.0
1.0
5.0
1.0
1.0
3.0
2.0
3.0
90
6.0
1.0
1.0
4.0
3.0
4.0
70
8.0
ns
CL = 50 pF
8.0
10.0
11.0
ns
tsu
th
set-up time D to CP
hold time D to CP
3.0
-
-
-
-
-
-
-
-
-
-
-
-
ns
+2.0 -1.0
ns
tW
pulse width clock HIGH or LOW
3.0
90
-
-
ns
fmax
maximum
frequency
MHz
CPD
power
per buffer; CL = 50 pF;
[4]
-
16
-
-
-
-
-
pF
dissipation
capacitance
f = 1 MHz; VI = GND to VCC
[1] tpd is the same as tPLH and tPHL
.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation PD (μW).
PD = CPD x VCC 2 x fi + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volt.
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
6 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
11.1. Waveform and test circuit
V
I
V
D input
M
GND
t
t
h
h
t
t
su
su
1/f
max
V
I
CP input
V
M
GND
t
W
t
t
PLH
PHL
V
OH
V
Q output
M
V
mna647
OL
Measurement points are given in Table 9.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical output voltage levels that occur with the output.
Fig. 5. Clock (CP) to output (Q) propagation delay times, clock pulse width, D to set-up times, the CP to D hold
times and maximum clock pulse frequency
Table 9. Measurement points
Type
Inputs
Output
VM
VI
VM
74AHC1G79
GND to VCC
GND to 3.0 V
0.5 x VCC
1.5 V
0.5 x VCC
0.5 x VCC
74AHCT1G79
V
CC
V
V
O
I
PULSE
GENERATOR
DUT
C
L
R
T
mna101
Test data is given in Table 8. Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig. 6. Test circuit for measuring switching times
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
7 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
12. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
B
E
A
X
c
(5x)
y
H
E
v
M
A
e
1
5
4
pin 1 index
A
A
2
A
1
1
2
3
A
3
θ
L
w
M B
p
b
p
(5x)
detail X
e
e
0
3 mm
scale
Dimensions (mm are the original dimensions)
Unit
(1)
(1)
A
A
A
A
b
c
D
E
e
e
1
H
E
L
p
v
w
y
θ
1
2
3
p
max 1.1 0.1 1.0
0.8 0.8
0.30 0.25 2.2 1.35
0.15 0.08 1.8 1.15
2.4 0.46
1.8 0.26
8°
0°
mm
0.15
0.65 1.3
0.3 0.1 0.1
0
min
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
sot353-1_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
21-12-15
21-12-16
SOT353-1
SC-88A
MO-203
Fig. 7. Package outline SOT353-1 (TSSOP5)
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
8 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
b
e
w
M B
p
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
1
b
c
D
e
H
L
Q
v
w
y
E
p
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
02-04-16
06-03-16
SOT753
SC-74A
Fig. 8. Package outline SOT753 (SC-74A)
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
9 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
13. Abbreviations
Table 10. Abbreviations
Acronym
CDM
CMOS
DUT
Description
Charged Device Model
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
Release date Data sheet status
20220111 Product data sheet
SOT353-1: Package outline drawing updated.
20210830 Product data sheet
Change notice Supersedes
74AHC_AHCT1G79 v.8
Modifications:
-
74AHC_AHCT1G79 v.7
•
74AHC_AHCT1G79 v.7
Modifications:
-
74AHC_AHCT1G79 v.6
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Section 1 and Section 2 updated.
Section 8: Derating values for Ptot total power dissipation updated.
74AHC_AHCT1G79 v.6
Modifications:
20140923
Product data sheet
-
74AHC_AHCT1G79 v.5
•
Section 4: table note added.
74AHC_AHCT1G79 v.5
74AHC_AHCT1G79 v.4
74AHC_AHCT1G79 v.3
74AHC_AHCT1G79 v.2
74AHC_AHCT1G79 v.1
20070702
20020606
20020218
20010222
19990518
Product data sheet
Product specification
Product specification
Product specification
Product specification
-
-
-
-
-
74AHC_AHCT1G79 v.4
74AHC_AHCT1G79 v.3
74AHC_AHCT1G79 v.2
74AHC_AHCT1G79 v.1
-
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
10 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
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Trademarks
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©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
11 / 12
Nexperia
74AHC1G79; 74AHCT1G79
Single D-type flip-flop; positive-edge trigger
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Marking..........................................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................3
7. Functional description................................................. 3
8. Limiting values............................................................. 4
9. Recommended operating conditions..........................4
10. Static characteristics..................................................4
11. Dynamic characteristics.............................................6
11.1. Waveform and test circuit.......................................... 7
12. Package outline.......................................................... 8
13. Abbreviations............................................................10
14. Revision history........................................................10
15. Legal information......................................................11
© Nexperia B.V. 2022. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 11 January 2022
©
74AHC_AHCT1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 11 January 2022
12 / 12
相关型号:
74AHC1G79GW-G
IC AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO5, 1.25 MM, PLASTIC, MO-203, SOT-353-1, SC-88A, TSSOP-5, FF/Latch
NXP
74AHC1G79GW-Q100,125
D Flip-Flop, AHC/VHC/H/U/V Series, 1-Func, Positive Edge Triggered, 1-Bit, True Output, CMOS, PDSO5
NXP
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