74ALVCH16827DGG [NEXPERIA]
20-bit buffer/line driver, non-inverting (3-State)Production;
| 型号： | 74ALVCH16827DGG |
| 厂家： | 
Nexperia |
| 描述： | 20-bit buffer/line driver, non-inverting (3-State)Production 驱动 光电二极管 输出元件 逻辑集成电路 |
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74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
Rev. 3 — 6 April 2018
Product data sheet
1 General description
The 74ALVCH16827 is a 20-bit non-inverting buffer/driver with 3-state outputs for bus
oriented applications.
The 74ALVCH16827 consists of two 10-bit sections with separate output enable signals.
For either 10-bit buffer section, the two output enable (1OE0 and 1OE1 or 2OE0 and
2OE1) inputs must both be active. If either output enable input is high, the outputs of that
10-bit buffer section are in high impedance state.
The 74ALVCH16827 has active bus hold circuitry which is provided to hold unused or
floating data inputs at a valid logic level. This feature eliminates the need for external
pull-up or pull-down resistors.
2 Features and benefits
• Wide supply voltage range of 1.2V to 3.6V
• CMOS low power consumption
• MultiByte flow-through standard pin-out architecture
• Low inductance multiple VCC and GND pins for minimum noise and ground bounce
• Direct interface with TTL levels (2.7 V to 3.6 V)
• Bus hold on data inputs
• Output drive capability 50 Ω transmission lines at 85 °C
• Current drive ±24 mA at 3.0 V
• Complies with JEDEC standards:
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
– HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
– CDM JESD22-C101E exceeds 1000 V
3 Ordering information
Table 1.ꢀOrdering information
Type number
Package
Temperature
range
Name
Description
Version
74ALVCH16827DGG −40 °C to +85 °C TSSOP56 plastic thin shrink small outline package; 56 leads;
body width 6.1 mm
SOT364-1
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
4 Functional diagram
1
&
EN1
EN2
56
28
29
&
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
2
3
5
1
1
55 54 52 51 49 48 47 45 44 43
6
8
9
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 1A9
1OE0
1OE1
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7 1Y8 1Y9
1
10
12
13
14
15
16
17
19
20
21
23
24
26
27
56
2
3
5
6
8
9
10 12 13 14
1
2
42 41 40 38 37 36 34 33 31 30
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9
28
29
2OE0
2OE1
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9
15 16 17 19 20 21 23 24 26 27
001aad056
001aad055
Figure 1.ꢀLogic symbol
Figure 2.ꢀIEC logic symbol
nA0
nY0
nA1
nY1
nA2
nY2
nA3
nA4
nY4
nA5
nY5
nA6
nA7
nY7
nA8
nA9
nOE0
nOE1
nY3
nY6
nY8
nY9
001aad061
Figure 3.ꢀLogic diagram
V
CC
data input
to internal circuit
001aal733
Figure 4.ꢀBus hold circuit
74ALVCH16827
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© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
2 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
5 Pinning information
5.1 Pinning
74ALVCH16827
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE0
1Y0
1OE1
1A0
2
3
1Y1
1A1
4
GND
1Y2
GND
1A2
5
6
1Y3
1A3
7
V
V
CC
CC
8
1Y4
1Y5
1Y6
GND
1Y7
1Y8
1Y9
2Y0
2Y1
2Y2
GND
2Y3
2Y4
2Y5
1A4
1A5
1A6
GND
1A7
1A8
1A9
2A0
2A1
2A2
GND
2A3
2A4
2A5
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
V
CC
CC
2Y6
2Y7
2A6
2A7
GND
2Y8
GND
2A8
2Y9
2A9
2OE0
2OE1
aaa-028397
Figure 5.ꢀPin configuration SOT364-1 (TSSOP56)
74ALVCH16827
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© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
3 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
5.2 Pin description
Table 2.ꢀPin description
Symbol
Pin
Description
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7, 1A8, 1A9
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7, 2A8, 2A9
1Y0, 1Y1, 1Y2, 1Y3, 1Y4, 1Y5, 1Y6, 1Y7, 1Y8, 1Y9
2Y0, 2Y1, 2Y2, 2Y3, 2Y4, 2Y5, 2Y6, 2Y7, 2Y8, 2Y9
1OE0, 1OE1, 2OE0, 2OE1
55, 54, 52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
2, 3, 5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
1, 56, 28, 29
data input
data input
data output
data output
output enable inputs
(active-LOW)
GND
VCC
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
ground (0 V)
positive voltage
supply
6 Functional description
Table 3.ꢀFunction table [1]
Operating mode
Input
Output
nOEn
nAn
L
nYn
L
transparent
L
L
H
transparent
H
H
High-impedance
X
Z
[1] X = don’t care; Z = High-impedance OFF-state; H = HIGH voltage level; L = LOW voltage level.
7 Limiting values
Table 4.ꢀLimiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
Parameter
Conditions
Min
-0.5
-0.5
-0.5
-0.5
-50
-
Max
+4.6
VCC + 0.5
+4.6
VCC + 0.5
-
Unit
V
supply voltage
input voltage
[1]
[1]
[1]
VI
data inputs
V
control inputs
V
VO
IIK
output voltage
V
input clamping current
output clamping current
VI < 0 V
mA
mA
mA
mA
mA
°C
IOK
VO > VCC or VO < 0 V
VO = 0 V to VCC
±50
IO (sink/source) output sink or source current
-
±50
ICC
supply current
-
100
IGND
Tstg
Ptot
ground current
-100
−65
-
-
storage temperature
total power dissipation
+150
600
[2]
Tamb = −40 °C to +85 °C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP56 packages: above 55 °C derate linearly with 8 mW/K.
74ALVCH16827
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Product data sheet
Rev. 3 — 6 April 2018
4 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
8 Recommended operating conditions
Table 5.ꢀRecommended operating conditions
Symbol Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
VCC = 2.5 V:
2.3
2.7
V
for maximum speed performance at CL = 30 pF
VCC = 3.3 V:
3.0
3.6
V
for maximum speed performance at CL = 50 pF
VI
input voltage
0
0
VCC
VCC
+85
20
V
VO
output voltage
V
Tamb
Δt/ΔV
ambient temperature
in free air
−40
0
°C
input transition rise and
fall rate
VCC = 2.3 V to 3.0 V
VCC = 3.0 V to 3.6 V
ns/V
ns/V
0
10
9 Static characteristics
Table 6.ꢀStatic characteristics
At recommended operating conditions. Tamb = −40 °C to +85 °C; Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
1.7
2.0
-
Typ [1]
Max
-
Unit
V
VIH
HIGH-level input
VCC = 2.3 to 2.7 V
1.2
voltage
VCC = 2.7 to 3.6 V
1.5
-
V
VIL
LOW-level input
voltage
VCC = 2.3 to 2.7 V
1.2
0.7
0.8
V
VCC = 2.7 to 3.6 V
-
1.5
V
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = -100 μA; VCC = 2.3 V to 3.6 V
IO = -6 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.7 V
IO = -12 mA; VCC = 3.0 V
IO = -24 mA; VCC = 3.0 V
VI = VIH or VIL
VCC - 0.2
VCC
-
-
-
-
-
-
V
V
V
V
V
V
VCC - 0.3 VCC - 0.08
VCC - 0.6 VCC - 0.26
VCC - 0.5 VCC - 0.14
VCC - 0.6 VCC - 0.09
VCC - 1.0 VCC - 0.28
VOL
LOW-level output
voltage
IO = 100 μA; VCC = 2.3 V to 3.6 V
IO = 6 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
-
-
GND
0.07
0.15
0.14
0.27
0.1
0.20
V
0.40
V
-
0.70
V
-
0.40
V
-
0.55
V
II
input leakage current VI = VCC or GND; VCC = 2.3 V to 3.6 V
-
5
-
μA
μA
μA
μA
μA
IBHL
bus hold LOW
current
VCC = 2.3 V; VI = 0.7 V
VCC = 3.0 V; VI = 0.8 V
VCC = 2.3 V; VI = 1.7 V
VCC = 3.0 V; VI = 2.0 V
45
75
-45
-75
-
150
-
-
IBHH
bus hold HIGH
current
-
-175
-
74ALVCH16827
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Product data sheet
Rev. 3 — 6 April 2018
5 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
Symbol Parameter
Conditions
Min
Typ [1]
Max
Unit
IBHLO
IBHHO
IOZ
bus hold LOW
overdrive current
VCC = 3.6 V
500
-
-
μA
bus hold HIGH
overdrive current
VCC = 3.6 V
-500
-
-
-
μA
μA
OFF-state output
current
VCC = 2.3 V to 3.6 V; VI = VIH or VIL;
VO = VCC or GND
0.1
10
ICC
supply current
VCC = 2.3 to 3.6 V; VI = VCC or GND; IO = 0 A
-
-
0.2
40
μA
μA
ΔICC
additional supply
current
VI = VCC - 0.6 V; IO = 0 A;
VCC = 2.3 V to 3.6 V
150
750
CI
input capacitance
-
5.0
-
pF
[1] All typical values are measured at Tamb = 25 °C.
10 Dynamic characteristics
Table 7.ꢀDynamic characteristics
Voltages are referenced to GND (ground = 0 V). Tamb = −40 °C to +85 °C; For test circuit, see Figure 8.
Symbol Parameter
Conditions
Min
Typ [1]
Max
Unit
[2]
[2]
[2]
[3]
tpd
propagation delay
nAn to nYn; Figure 6
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.0
1.0
1.0
2.0
2.1
2.0
4.1
3.9
3.4
ns
ns
ns
VCC = 3.0 V to 3.6 V
nOEn to nYn; Figure 7
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
ten
enable time
disable time
1.0
1.0
1.0
2.9
3.0
2.5
6.0
5.7
4.7
ns
ns
ns
VCC = 3.0 V to 3.6 V
nOEn to nYn; Figure 7
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
tdis
1.2
1.3
1.3
2.1
3.1
2.8
5.6
4.9
4.5
ns
ns
ns
VCC = 3.0 V to 3.6 V
per buffer; VI = GND to VCC
outputs enabled
CPD
power dissipation
capacitance
-
-
20
3
-
-
pF
pF
outputs disabled
[1] Typical values are measured at Tamb = 25 °C
Typical values for VCC = 2.3 V to 2.7 V are measured at VCC = 2.5 V
Typical values for VCC = 3.0 V to 3.6 V are measured at VCC = 3.3 V
[2] tpd is the same as tPHL and tPLH; ten is the same as tPZH and tPZL; tdis is the same as tPHZ and tPLZ
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD x VCC2 x fi x N + ∑(CL x VCC2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL x VCC2 x fo) = sum of outputs.
74ALVCH16827
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© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
6 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
10.1 Waveforms and test circuit
V
I
nAn input
GND
V
V
M
M
t
t
PLH
PHL
V
OH
V
V
M
nYn output
M
V
OL
mna171
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 6.ꢀInput nAn to output nYn propagation delays
V
I
nOEn input
GND
V
M
t
t
PZL
PLZ
V
CC
output
V
M
LOW-to-OFF
OFF-to-LOW
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
col015
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 7.ꢀ3-state enable and disable times
Table 8.ꢀMeasurement points
Supply voltage
VCC
Input
VI
Output
VM
VM
VX
VY
2.3 V to 2.7 V
2.7 V
VCC
0.5 x VCC
1.5 V
1.5 V
0.5 x VCC
1.5 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOH - 0.15 V
VOH - 0.3 V
VOH - 0.3 V
2.7 V
2.7 V
3.0 V to 3.6 V
1.5 V
74ALVCH16827
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© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
7 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
001aae331
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Figure 8.ꢀTest circuit for measuring switching times
Table 9.ꢀTest data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
tPLZ, tPZL
2 x VCC
2 x VCC
2 x VCC
tPHZ, tPZH
GND
2.3 V to 2.7 V
2.7 V
VCC
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
50 pF
50 pF
500 Ω
500 Ω
500 Ω
2.7 V
2.7 V
open
GND
3.0 V to 3.6 V
open
GND
74ALVCH16827
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© Nexperia B.V. 2018. All rights reserved.
Product data sheet
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8 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
11 Package outline
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
E
D
A
X
c
H
v
M
A
y
E
Z
56
29
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
detail X
1
28
w
M
b
e
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions).
A
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
8o
0o
0.15
0.05
1.05
0.85
0.28
0.17
0.2
0.1
14.1
13.9
6.2
6.0
8.3
7.9
0.8
0.4
0.50
0.35
0.5
0.1
mm
1.2
0.5
1
0.25
0.08
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT364-1
MO-153
Figure 9.ꢀPackage outline SOT364-1 (TSSOP56)
74ALVCH16827
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© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
9 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
12 Abbreviations
Table 10.ꢀAbbreviations
Acronym
BiCMOS
CDM
Description
Bipolar Complementary Metal Oxide Semiconductor
Charged Device Model
CMOS
DUT
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
TTL
Transistor-Transistor Logic
13 Revision history
Table 11.ꢀRevision history
Document ID
Release date
20180406
Data sheet status
Change notice
Supersedes
74ALVCH16827 v.3
Modifications:
Product data sheet
-
74ALVCH16827 v.2
• The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
74ALVCH16827 v.2
74ALVCH16827 v.1
19980727
19980727
Product specification
Product specification
-
-
74ALVCH16827 v.1
-
74ALVCH16827
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© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
10 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
14 Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Product [short] data sheet
Qualification
Production
This document contains data from the preliminary specification.
This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
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injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
Draft — The document is a draft version only. The content is still under
such equipment or applications and therefore such inclusion and/or use is at
internal review and subject to formal approval, which may result in
the customer’s own risk.
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
Short data sheet — A short data sheet is an extract from a full data sheet
without further testing or modification. Customers are responsible for the
with the same product type number(s) and title. A short data sheet is
design and operation of their applications and products using Nexperia
intended for quick reference only and should not be relied upon to contain
products, and Nexperia accepts no liability for any assistance with
detailed and full information. For detailed and full information see the
applications or customer product design. It is customer’s sole responsibility
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to determine whether the Nexperia product is suitable and fit for the
sales office. In case of any inconsistency or conflict with the short data sheet,
customer’s applications and products planned, as well as for the planned
the full data sheet shall prevail.
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agreed otherwise in writing. In no event however, shall an agreement be
the application or use by customer’s third party customer(s). Customer is
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
14.3 Disclaimers
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
Limited warranty and liability — Information in this document is believed
damage to the device. Limiting values are stress ratings only and (proper)
to be accurate and reliable. However, Nexperia does not give any
operation of the device at these or any other conditions above those
representations or warranties, expressed or implied, as to the accuracy
given in the Recommended operating conditions section (if present) or the
or completeness of such information and shall have no liability for the
Characteristics sections of this document is not warranted. Constant or
consequences of use of such information. Nexperia takes no responsibility
repeated exposure to limiting values will permanently and irreversibly affect
for the content in this document if provided by an information source outside
the quality and reliability of the device.
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
or replacement of any products or rework charges) whether or not such
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
damages are based on tort (including negligence), warranty, breach of
in a valid written individual agreement. In case an individual agreement is
contract or any other legal theory. Notwithstanding any damages that
concluded only the terms and conditions of the respective agreement shall
customer might incur for any reason whatsoever, Nexperia's aggregate and
apply. Nexperia hereby expressly objects to applying the customer’s general
cumulative liability towards customer for the products described herein shall
terms and conditions with regard to the purchase of Nexperia products by
customer.
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
No offer to sell or license — Nothing in this document may be interpreted
Right to make changes — Nexperia reserves the right to make changes
or construed as an offer to sell products that is open for acceptance or
to information published in this document, including without limitation
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
74ALVCH16827
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
11 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications. In the event that customer
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia
for any liability, damages or failed product claims resulting from customer
design and use of the product for automotive applications beyond Nexperia's
standard warranty and Nexperia's product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
14.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
74ALVCH16827
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2018. All rights reserved.
Product data sheet
Rev. 3 — 6 April 2018
12 / 13
Nexperia
74ALVCH16827
20-bit buffer/line driver, non-inverting; 3-state
Contents
1
General description ............................................ 1
2
3
4
5
5.1
5.2
6
7
8
Features and benefits .........................................1
Ordering information .......................................... 1
Functional diagram .............................................2
Pinning information ............................................ 3
Pinning ...............................................................3
Pin description ...................................................4
Functional description ........................................4
Limiting values ....................................................4
Recommended operating conditions ................5
Static characteristics ..........................................5
Dynamic characteristics .....................................6
Waveforms and test circuit ................................7
Package outline ...................................................9
Abbreviations .................................................... 10
Revision history ................................................ 10
Legal information ..............................................11
9
10
10.1
11
12
13
14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2018.
All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 6 April 2018
Document identifier: 74ALVCH16827
相关型号：
74ALVCH16827DGG:11
74ALVCH16827 - 20-bit buffer/line driver, non-inverting (3-State) TSSOP 56-Pin
NXP
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