74AUP1G79GS [NEXPERIA]
Low-power D-type flip-flop; positive-edge triggerProduction;型号: | 74AUP1G79GS |
厂家: | Nexperia |
描述: | Low-power D-type flip-flop; positive-edge triggerProduction |
文件: | 总21页 (文件大小:300K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Rev. 8 — 24 January 2022
Product data sheet
1. General description
The 74AUP1G79 is a single positive-edge triggered D-type flip-flop. Data at the D-input that
meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored
in the flip-flop and appear at the Q output.. Schmitt-trigger action at all inputs makes the circuit
tolerant of slower input rise and fall times. This device ensures very low static and dynamic power
consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for
partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the
potentially damaging backflow current through the device when it is powered down.
2. Features and benefits
•
Wide supply voltage range from 0.8 V to 3.6 V
•
•
•
CMOS low power dissipation
High noise immunity
Complies with JEDEC standards:
•
•
•
•
•
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-C (2.7 V to 3.6 V)
•
ESD protection:
•
•
•
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
•
•
•
•
•
•
•
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Overvoltage tolerant inputs to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74AUP1G79GW
-40 °C to +125 °C
TSSOP5
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74AUP1G79GV
74AUP1G79GM
-40 °C to +125 °C
-40 °C to +125 °C
SC-74A
XSON6
plastic surface-mounted package; 5 leads
SOT753
SOT886
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm
74AUP1G79GN
74AUP1G79GS
74AUP1G79GX
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
XSON6
XSON6
X2SON5
extremely thin small outline package; no leads;
6 terminals; body 0.9 × 1.0 × 0.35 mm
SOT1115
SOT1202
SOT1226-3
extremely thin small outline package; no leads;
6 terminals; body 1.0 × 1.0 × 0.35 mm
plastic thermal enhanced extremely thin
small outline package; no leads; 5 terminals;
body 0.8 × 0.8 × 0.32 mm
4. Marking
Table 2. Marking
Type number
Marking code [1]
74AUP1G79GW
74AUP1G79GV
74AUP1G79GM
74AUP1G79GN
74AUP1G79GS
74AUP1G79GX
pP
p79
pP
pP
pP
pP
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
D
Q
4
1
2
4
D
Q
2
CP
CP
mna440
mna441
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
©
74AUP1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
2 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
CP
C
C
C
C
D
TG
C
TG
C
Q
C
C
TG
C
TG
C
mna442
Fig. 3. Logic diagram
6. Pinning information
6.1. Pinning
74AUP1G79
74AUP1G79
1
2
3
D
CP
6
5
4
V
CC
1
2
3
5
4
D
CP
V
CC
n.c.
Q
GND
GND
Q
001aac524
Transparent top view
001aac562
Fig. 4. Pin configuration SOT353-1 (TSSOP5) and
SOT753 (SC-74A)
Fig. 5. Pin configuration SOT886 (XSON6)
74AUP1G79
74AUP1G79
D
CP
1
2
3
6
5
4
V
CC
D
1
5
V
CC
3
GND
n.c.
Q
GND
2
4
Q
CP
001aaf179
Transparent top view
aaa-003007
Transparent top view
Fig. 6. Pin configuration SOT1115 and SOT1202
(XSON6)
Fig. 7. Pin configuration SOT1226-3 (X2SON5)
©
74AUP1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
3 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
6.2. Pin description
Table 3. Pin description
Symbol
Pin
Description
TSSOP5 and X2SON5
XSON6
D
1
2
3
4
-
1
2
3
4
5
6
data input
CP
GND
Q
clock pulse input
ground (0 V)
data output
n.c.
VCC
not connected
supply voltage
5
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition; X = don’t care;
q = lower case letter indicates the state of referenced input, one setup time prior to the LOW-to-HIGH CP transition.
Input
Output
CP
↑
D
L
Q
L
↑
H
X
H
q
L
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-50
-0.5
-50
-0.5
-
Max
+4.6
-
Unit
V
VCC
IIK
supply voltage
input clamping current
input voltage
VI < 0 V
mA
V
VI
[1]
[1]
+4.6
-
IOK
VO
IO
output clamping current
output voltage
VO < 0 V
mA
V
Active mode and Power-down mode
VO = 0 V to VCC
+4.6
±20
50
output current
mA
mA
mA
°C
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-50
-65
-
-
storage temperature
total power dissipation
+150
250
Tamb = -40 °C to +125 °C
[2]
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT353-1 (TSSOP5) package: Ptot derates linearly with 3.3 mW/K above 74 °C.
For SOT753 (SC-74A) package: Ptot derates linearly with 3.8 mW/K above 85 °C.
For SOT886 (XSON6) package: Ptot derates linearly with 3.3 mW/K above 74 °C.
For SOT1115 (XSON6) package: Ptot derates linearly with 3.2 mW/K above 71 °C.
For SOT1202 (XSON6) package: Ptot derates linearly with 3.3 mW/K above 74 °C.
For SOT1226-3 (X2SON5) package: Ptot derates linearly with 3.0 mW/K above 67 °C.
©
74AUP1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
4 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter
Conditions
Min
0.8
0
Max
3.6
Unit
V
VCC
VI
supply voltage
input voltage
output voltage
3.6
V
VO
Active mode
0
VCC
3.6
V
Power-down mode; VCC = 0 V
0
V
Tamb
ambient temperature
-40
0
+125
200
°C
ns/V
Δt/ΔV
input transition rise and fall rate
VCC = 0.8 V to 3.6 V
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = 25 °C
Conditions
Min
Typ
Max
Unit
VIH
HIGH-level input voltage VCC = 0.8 V
VCC = 0.9 V to 1.95 V
0.70 × VCC
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
0.65 × VCC
-
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.6
-
2.0
-
VIL
LOW-level input voltage VCC = 0.8 V
-
-
-
-
0.30 × VCC
0.35 × VCC
0.7
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.9
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = -20 μA; VCC = 0.8 V to 3.6 V
IO = -1.1 mA; VCC = 1.1 V
IO = -1.7 mA; VCC = 1.4 V
IO = -1.9 mA; VCC = 1.65 V
IO = -2.3 mA; VCC = 2.3 V
IO = -3.1 mA; VCC = 2.3 V
IO = -2.7 mA; VCC = 3.0 V
IO = -4.0 mA; VCC = 3.0 V
VI = VIH or VIL
VCC - 0.1
0.75 × VCC
1.11
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.32
2.05
1.9
2.72
2.6
VOL
LOW-level output
voltage
IO = 20 μA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.3 × VCC
0.31
V
V
V
V
V
V
V
V
0.31
0.31
0.44
0.31
0.44
©
74AUP1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
5 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Symbol Parameter
Conditions
Min
Typ
Max
±0.1
±0.2
Unit
μA
II
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
-
-
IOFF
power-off leakage
current
μA
ΔIOFF
ICC
additional power-off
leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V
-
-
-
-
-
-
±0.2
0.5
40
μA
μA
μA
supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
ΔICC
additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A;
VCC = 3.3 V
[1]
CI
input capacitance
output capacitance
VCC = 0 V to 3.6 V; VI = GND or VCC
VO = GND; VCC = 0 V
-
-
0.8
1.7
-
-
pF
pF
CO
Tamb = -40 °C to +85 °C
VIH HIGH-level input voltage VCC = 0.8 V
0.70 × VCC
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.65 × VCC
-
1.6
-
2.0
-
VIL
LOW-level input voltage VCC = 0.8 V
-
-
-
-
0.30 × VCC
0.35 × VCC
0.7
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.9
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = -20 μA; VCC = 0.8 V to 3.6 V
IO = -1.1 mA; VCC = 1.1 V
IO = -1.7 mA; VCC = 1.4 V
IO = -1.9 mA; VCC = 1.65 V
IO = -2.3 mA; VCC = 2.3 V
IO = -3.1 mA; VCC = 2.3 V
IO = -2.7 mA; VCC = 3.0 V
IO = -4.0 mA; VCC = 3.0 V
VI = VIH or VIL
VCC - 0.1
0.7 × VCC
1.03
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.30
1.97
1.85
2.67
2.55
VOL
LOW-level output
voltage
IO = 20 μA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.3 × VCC
0.37
V
V
V
V
V
V
V
V
0.35
0.33
0.45
0.33
0.45
©
74AUP1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
6 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Symbol Parameter
Conditions
Min
Typ
Max
±0.5
±0.5
Unit
μA
II
input leakage current
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
-
-
IOFF
power-off leakage
current
μA
ΔIOFF
ICC
additional power-off
leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V
-
-
-
-
-
-
±0.6
0.9
50
μA
μA
μA
supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
ΔICC
additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A;
VCC = 3.3 V
[1]
Tamb = -40 °C to +125 °C
VIH HIGH-level input voltage VCC = 0.8 V
0.75 × VCC
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.70 × VCC
-
1.6
-
2.0
-
VIL
LOW-level input voltage VCC = 0.8 V
-
-
-
-
0.25 × VCC
0.30 × VCC
0.7
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.9
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = -20 μA; VCC = 0.8 V to 3.6 V
IO = -1.1 mA; VCC = 1.1 V
IO = -1.7 mA; VCC = 1.4 V
IO = -1.9 mA; VCC = 1.65 V
IO = -2.3 mA; VCC = 2.3 V
IO = -3.1 mA; VCC = 2.3 V
IO = -2.7 mA; VCC = 3.0 V
IO = -4.0 mA; VCC = 3.0 V
VI = VIH or VIL
VCC - 0.11
0.6 × VCC
0.93
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.17
1.77
1.67
2.40
2.30
VOL
LOW-level output
voltage
IO = 20 μA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V; VCC = 0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.11
0.33 × VCC
0.41
V
V
V
0.39
V
0.36
V
0.50
V
0.36
V
0.50
V
II
input leakage current
±0.75
±0.75
μA
μA
IOFF
power-off leakage
current
ΔIOFF
ICC
additional power-off
leakage current
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V
-
-
-
-
-
-
±0.75
1.4
μA
μA
μA
supply current
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
ΔICC
additional supply current per pin; VI = VCC - 0.6 V; IO = 0 A;
VCC = 3.3 V
[1]
75
[1] One input at VCC - 0.6 V, other input at VCC or GND.
©
74AUP1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
7 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 10.
Symbol Parameter Conditions
CL = 5 pF
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ [1] Max
Min
Max
Min
Max
tpd
propagation CP to Q; see Fig. 8
[2]
[2]
[2]
delay
VCC = 0.8 V
-
19.7
5.5
3.8
3.1
2.3
2.0
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
2.6
2.0
1.7
1.4
1.2
11.0
7.0
5.4
4.0
3.4
2.4
1.8
1.5
1.1
0.9
12.9
8.1
6.4
4.7
4.0
2.4
1.8
1.5
1.1
0.9
14.2 ns
9.0
7.1
5.2
4.4
ns
ns
ns
ns
fmax
maximum
frequency
CP; see Fig. 9
VCC = 0.8 V
-
-
-
-
-
-
53
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
203
347
435
550
619
170
310
400
490
550
170
300
390
480
510
CL = 10 pF
tpd
propagation CP to Q; see Fig. 8
delay
VCC = 0.8 V
-
23.1
6.3
4.4
3.6
2.8
2.5
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CP; see Fig. 9
3.1
2.5
2.1
1.8
1.7
12.3
8.1
6.3
4.7
4.1
2.8
2.2
1.9
1.5
1.3
14.4
9.5
7.5
5.6
4.5
2.8
2.2
1.9
1.5
1.3
15.9 ns
10.5 ns
8.3
6.2
5.0
ns
ns
ns
fmax
maximum
frequency
VCC = 0.8 V
-
-
-
-
-
-
52
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
192
324
421
486
550
150
280
310
370
410
150
230
250
360
360
CL = 15 pF
tpd
propagation CP to Q; see Fig. 8
delay
VCC = 0.8 V
-
26.6
7.1
5.0
4.1
3.2
2.9
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
3.5
2.8
2.4
2.2
2.0
13.6
9.2
7.1
5.4
4.5
3.2
2.5
2.2
1.9
1.6
15.6
10.7
8.5
3.2
2.5
2.2
1.9
1.6
17.2 ns
11.8 ns
9.4
7.0
5.5
ns
ns
ns
6.3
5.0
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Product data sheet
Rev. 8 — 24 January 2022
8 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Symbol Parameter Conditions
25 °C
Min Typ [1] Max
-40 °C to +85 °C -40 °C to +125 °C Unit
Min
Max
Min
Max
fmax
maximum
frequency
CP; see Fig. 9
VCC = 0.8 V
-
-
-
-
-
-
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
181
301
407
422
481
120
190
240
300
320
120
160
190
270
300
CL = 30 pF
tpd
propagation CP to Q; see Fig. 8
[2]
delay
VCC = 0.8 V
-
36.8
9.3
6.4
5.3
4.3
3.9
-
-
-
-
-
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CP; see Fig. 9
4.7
3.8
3.3
3.0
2.8
17.3
11.8
9.4
4.2
3.3
3.0
2.7
2.6
23.3
14.3
11.3
8.5
4.2
3.3
3.0
2.7
2.6
25.6 ns
15.7 ns
12.4 ns
7.0
9.4
7.9
ns
ns
5.8
7.2
fmax
maximum
frequency
VCC = 0.8 V
-
-
-
-
-
-
28
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
128
206
262
269
309
70
70
120
150
190
200
110
120
170
190
CL = 5 pF, 10 pF, 15 pF and 30 pF
tsu
set-up time HIGH; D to CP; see Fig. 9
VCC = 0.8 V
-
-
-
-
-
-
3.4
0.8
0.5
0.5
0.4
0.4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
LOW; D to CP; see Fig. 9
VCC = 0.8 V
1.6
1.0
0.9
0.7
0.6
1.4
1.0
0.9
0.7
0.6
-
-
-
-
-
-
3.0
0.9
0.6
0.5
0.5
0.7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.4
1.0
0.9
0.8
1.0
1.4
1.0
0.9
0.8
1.0
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Product data sheet
Rev. 8 — 24 January 2022
9 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Symbol Parameter Conditions
25 °C
Min Typ [1] Max
-40 °C to +85 °C -40 °C to +125 °C Unit
Min
Max
Min
Max
th
hold time
D to CP; see Fig. 9
VCC = 0.8 V
-
-
-
-
-
-
-1.9
-0.6
-0.4
-0.4
-0.4
-0.3
-
-
-
-
-
-
-
0.2
0
-
-
-
-
-
-
-
0.2
0
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0
0
0
0
0
0
tW
pulse width HIGH or LOW; CP; see Fig. 9
VCC = 0.8 V
-
-
-
-
-
-
5.6
2.4
1.3
0.9
0.7
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
3.5
2.0
1.9
2.0
2.2
3.5
2.0
1.9
2.0
2.2
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CPD
power
dissipation
capacitance
fi = 1 MHz; VI = GND to VCC [3]
VCC = 0.8 V
-
-
-
-
-
-
1.6
1.7
1.8
1.9
2.3
2.7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF
pF
pF
pF
pF
pF
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
[1] All typical values are measured at nominal VCC
.
[2] tpd is the same as tPLH and tPHL
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC 2 × fo) = sum of the outputs.
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74AUP1G79
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
10 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
11.1. Waveforms and test circuit
V
I
D input
GND
V
I
CP input
V
V
M
M
GND
t
t
PHL
PLH
V
OH
V
V
Q output
M
M
V
OL
mna443
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage drops that occur with the output load.
Fig. 8. The clock input (CP) to output (Q) propagation delays
V
I
V
D input
M
GND
t
t
h
h
t
t
su
su
1/f
max
V
I
CP input
V
M
GND
t
W
t
t
PLH
PHL
V
OH
V
Q output
M
V
mna647
OL
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage drops that occur with the output load.
Fig. 9. The clock input (CP) to output (Q) propagation delays, CP clock pulse width, D to CP setup times,
CP to D hold times and the CP maximum frequency
Table 9. Measurement points
Supply voltage
VCC
Output
VM
Input
VM
VI
tr = tf
0.8 V to 3.6 V
0.5 × VCC
0.5 × VCC
VCC
≤ 3.0 ns
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Product data sheet
Rev. 8 — 24 January 2022
11 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
V
V
EXT
CC
5 kΩ
V
I
V
O
G
DUT
R
T
C
L
R
L
001aac521
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance;
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator;
VEXT = External voltage for measuring switching times.
Fig. 10. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
Load
CL
VEXT
RL [1]
tPLH, tPHL
open
tPZH, tPHZ
tPZL, tPLZ
0.8 V to 3.6 V
5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ
GND
2 × VCC
[1] For measuring enable and disable times RL = 5 kΩ.
For measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ.
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74AUP1G79
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Product data sheet
Rev. 8 — 24 January 2022
12 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
12. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
B
E
A
X
c
(5x)
y
H
E
v
M
A
e
1
5
4
pin 1 index
A
A
2
A
1
1
2
3
A
3
θ
L
w
M B
p
b
p
(5x)
detail X
e
e
0
3 mm
scale
Dimensions (mm are the original dimensions)
Unit
(1)
(1)
A
A
A
A
b
c
D
E
e
e
1
H
E
L
p
v
w
y
θ
1
2
3
p
max 1.1 0.1 1.0
0.8 0.8
0.30 0.25 2.2 1.35
0.15 0.08 1.8 1.15
2.4 0.46
1.8 0.26
8°
0°
mm
0.15
0.65 1.3
0.3 0.1 0.1
0
min
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
sot353-1_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
21-12-15
21-12-16
SOT353-1
SC-88A
MO-203
Fig. 11. Package outline SOT353-1 (TSSOP5)
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
13 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
b
e
w
M B
p
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
1
b
c
D
e
H
L
Q
v
w
y
E
p
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
02-04-16
06-03-16
SOT753
SC-74A
Fig. 12. Package outline SOT753 (SC-74A)
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Product data sheet
Rev. 8 — 24 January 2022
14 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4x
(2)
L
L
1
e
6
5
4
e
e
1
1
6x
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
Dimensions (mm are the original dimensions)
(1)
Unit
A
A
b
D
E
e
e
L
L
1
1
1
max 0.5 0.04 0.25 1.50 1.05
0.35 0.40
0.30 0.35
0.27 0.32
nom
min
0.20 1.45 1.00 0.6
0.17 1.40 0.95
mm
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
sot886_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
MO-252
JEITA
04-07-22
12-01-05
SOT886
Fig. 13. Package outline SOT886 (XSON6)
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74AUP1G79
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
15 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
XSON6: extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
SOT1115
b
3
(2)
(4×)
1
2
L
L
1
e
6
5
4
e
e
1
1
(2)
(6×)
A
1
A
D
E
terminal 1
index area
0
L
0.5
scale
1 mm
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 0.95 1.05
0.35 0.40
0.15 0.90 1.00 0.55 0.3 0.30 0.35
0.12 0.85 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1115_po
References
Outline
version
European
Issue date
projection
IEC
JEDEC
JEITA
10-04-02
10-04-07
SOT1115
Fig. 14. Package outline SOT1115 (XSON6)
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Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
16 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
XSON6: extremely thin small outline package; no leads;
6 terminals; body 1.0 x 1.0 x 0.35 mm
SOT1202
b
3
(2)
1
2
(4×)
L
L
1
e
6
5
4
e
e
1
1
(2)
(6×)
A
1
A
D
E
terminal 1
index area
0
L
0.5
1 mm
scale
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 1.05 1.05
0.35 0.40
0.15 1.00 1.00 0.55 0.35 0.30 0.35
0.12 0.95 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1202_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
JEITA
10-04-02
10-04-06
SOT1202
Fig. 15. Package outline SOT1202 (XSON6)
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Product data sheet
Rev. 8 — 24 January 2022
17 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
X2SON5: plastic thermal enhanced extremely thin small outline package; no leads;
5 terminals; body 0.8 x 0.8 x 0.32 mm
SOT1226-3
C
Seating Plane
y
C
X
5x
D
A
B
E
A
A
3
pin 1
index area
A
1
pin 1
e
index area
b
(4x)
y
v
w
C
C
A
B
C
1
1
2
L
(4x)
3
(6x)
5
4
0
1 mm
scale
v
Dimensions (mm are the original dimensions)
Unit
A
A
A
D
D
h
E
b
e
K
L
w
y
y
1
1
3
max 0.35 0.04
0.32 0.02
0.85 0.30 0.85 0.25
0.27
0.22
0.10
(Typ.)
0.80
0.80
0.20 0.50
0.25
nom
min 0.30 0.00
mm
0.1 0.05 0.05 0.05
0.75 0.20 0.75 0.15
0.20 0.17
EIAJ
sot1226-3_po
References
Outline
version
European
projection
Issue date
IEC
JEDEC
- - -
19-11-06
19-11-07
SOT1226-3
Fig. 16. Package outline SOT1226-3 (X2SON5)
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Product data sheet
Rev. 8 — 24 January 2022
18 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
13. Abbreviations
Table 11. Abbreviations
Acronym
Description
CDM
DUT
ESD
HBM
MM
Charged Device Model
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
14. Revision history
Table 12. Revision history
Document ID
Release date Data sheet status
20220124 Product data sheet
Fig. 11: Package outline drawing for SOT353-1 has changed.
20210720 Product data sheet 74AUP1G79 v.6
Change notice Supersedes
74AUP1G79 v.8
Modifications:
-
74AUP1G79 v.7
•
74AUP1G79 v.7
Modifications:
-
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•
•
•
•
•
Legal texts have been adapted to the new company name where appropriate.
SOT1226 (X2SON5) package changed to SOT1226-3 (X2SON5) package.
Type number 74AUP1G79GF (SOT891/XSON6) removed.
Section 1 and Section 2 updated.
Table 5: Derating values for Ptot total power dissipation updated.
74AUP1G79 v.6
Modifications:
20120628
Product data sheet
-
74AUP1G79 v.5
•
•
Added type number 74AUP1G79GX (SOT1226)
Package outline drawing of SOT886 (Fig. 13) modified.
74AUP1G79 v.5
Modifications:
20111128
Product data sheet
-
74AUP1G79 v.4
•
Legal pages updated.
74AUP1G79 v.4
74AUP1G79 v.3
74AUP1G79 v.2
74AUP1G79 v.1
20100720
20090803
20061017
20050912
Product data sheet
Product data sheet
Product data sheet
Product data sheet
-
-
-
-
74AUP1G79 v.3
74AUP1G79 v.2
74AUP1G79 v.1
-
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Product data sheet
Rev. 8 — 24 January 2022
19 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
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Trademarks
Suitability for use — Nexperia products are not designed, authorized or
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©
74AUP1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
20 / 21
Nexperia
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Marking..........................................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................4
7. Functional description................................................. 4
8. Limiting values............................................................. 4
9. Recommended operating conditions..........................5
10. Static characteristics..................................................5
11. Dynamic characteristics.............................................8
11.1. Waveforms and test circuit.......................................11
12. Package outline........................................................ 13
13. Abbreviations............................................................19
14. Revision history........................................................19
15. Legal information......................................................20
© Nexperia B.V. 2022. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 24 January 2022
©
74AUP1G79
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 8 — 24 January 2022
21 / 21
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