74AUP1G97GX [NEXPERIA]

Low-power configurable multiple function gateProduction;
74AUP1G97GX
型号: 74AUP1G97GX
厂家: Nexperia    Nexperia
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Low-power configurable multiple function gateProduction

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74AUP1G97  
Low-power configurable multiple function gate  
Rev. 13 — 9 May 2023  
Product data sheet  
1. General description  
The 74AUP1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device  
can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter  
and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. This device  
ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to  
3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry  
disables the output, preventing the potentially damaging backflow current through the device when  
it is powered down.  
2. Features and benefits  
Wide supply voltage range from 0.8 V to 3.6 V  
CMOS low power dissipation  
High noise immunity  
ESD protection:  
HBM JESD22-A114F exceeds 5000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8C (2.7 V to 3.6 V)  
Low static power consumption; ICC = 0.9 μA (maximum)  
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B  
Overvoltage tolerant inputs to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial Power-down mode operation  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AUP1G97GW  
74AUP1G97GM  
74AUP1G97GN  
74AUP1G97GS  
74AUP1G97GX  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
TSSOP6  
plastic thin shrink small outline package; 6 leads;  
body width 1.25 mm  
SOT363-2  
XSON6  
XSON6  
XSON6  
X2SON6  
plastic extremely thin small outline package;  
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm  
SOT886  
extremely thin small outline package; no leads;  
6 terminals; body 0.9 × 1.0 × 0.35 mm  
SOT1115  
SOT1202  
SOT1255-2  
extremely thin small outline package; no leads;  
6 terminals; body 1.0 × 1.0 × 0.35 mm  
plastic thermal enhanced extremely  
thin small outline package; no leads;  
6 terminals; body 1.0 × 0.8 × 0.32 mm  
4. Marking  
Table 2. Marking  
Type number  
Marking code [1]  
74AUP1G97GW  
74AUP1G97GM  
74AUP1G97GN  
74AUP1G97GS  
74AUP1G97GX  
aV  
aV  
aV  
aV  
aV  
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.  
5. Functional diagram  
3
A
4
Y
1
B
6
C
001aad998  
Fig. 1. Logic symbol  
©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
2 / 20  
 
 
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
6. Pinning information  
6.1. Pinning  
GM package  
SOT886 (XSON6)  
GW package  
GN package  
SOT1115 (XSON6)  
SOT363-2 (TSSOP6)  
B
GND  
A
1
2
3
6
5
C
1
2
3
6
5
4
B
GND  
A
C
B
GND  
A
1
2
3
6
5
4
C
V
Y
CC  
V
CC  
V
CC  
4
Y
Y
aaa-035794  
aaa-035793  
Transparent top view  
Transparent top view  
aaa-035791  
GS package  
SOT1202 (XSON6)  
B
GND  
A
1
2
3
6
5
4
C
V
CC  
Y
aaa-035795  
Transparent top view  
Transparent top view  
6.2. Pin description  
Table 3. Pin description  
Symbol  
Pin  
1
Description  
data input  
B
GND  
A
2
ground (0 V)  
data input  
3
Y
4
data output  
supply voltage  
data input  
VCC  
C
5
6
©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
3 / 20  
 
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
7. Functional description  
Table 4. Function table  
H = HIGH voltage level; L = LOW voltage level.  
Input  
Output  
C
L
B
L
A
L
Y
L
L
L
H
L
L
L
H
H
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
L
H
H
H
H
7.1. Logic configurations  
Table 5. Function selection table  
Logic function  
Figure  
2-input MUX  
see Fig. 2  
see Fig. 3  
see Fig. 4  
see Fig. 4  
see Fig. 5  
see Fig. 5  
see Fig. 6  
see Fig. 7  
see Fig. 8  
2-input AND  
2-input OR with one input inverted  
2-input NAND with one input inverted  
2-input AND with one input inverted  
2-input NOR with one input inverted  
2-input OR  
Inverter  
Buffer  
V
V
CC  
CC  
B
A
1
6
5
4
C
Y
1
2
3
6
5
4
C
Y
B
A
C
A
C
Y
2
3
Y
A
001aae002  
001aae003  
Fig. 2. 2-input MUX  
Fig. 3. 2-input AND gate  
V
V
CC  
CC  
A
C
B
Y
C
Y
Y
1
2
3
6
5
4
C
Y
B
1
2
3
6
5
4
C
Y
A
C
B
Y
C
A
001aae004  
001aae005  
Fig. 4. 2-input NAND gate with input A inverted or  
2-input OR gate with input C inverted  
Fig. 5. 2-input NOR gate with input B inverted or  
2-input AND gate with input C inverted  
©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
4 / 20  
 
 
 
 
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
V
V
CC  
CC  
B
1
2
3
6
5
4
C
Y
1
2
3
6
5
4
C
B
C
Y
C
Y
Y
001aae006  
001aae007  
Fig. 6. 2-input OR gate  
Fig. 7. Inverter  
V
CC  
B
1
2
3
6
5
4
B
Y
Y
001aae008  
Fig. 8. Buffer  
8. Limiting values  
Table 6. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
-0.5  
-50  
-0.5  
-50  
-0.5  
-
Max  
+4.6  
-
Unit  
V
VCC  
IIK  
supply voltage  
input clamping current  
input voltage  
VI < 0 V  
mA  
V
VI  
[1]  
[1]  
+4.6  
-
IOK  
VO  
IO  
output clamping current  
output voltage  
VO < 0 V  
mA  
V
Active mode and Power-down mode  
VO = 0 V to VCC  
+4.6  
±20  
50  
output current  
mA  
mA  
mA  
°C  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
-50  
-65  
-
-
storage temperature  
total power dissipation  
+150  
250  
Tamb = -40 °C to +125 °C  
[2]  
mW  
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For SOT363-2 (TSSOP6) package: Ptot derates linearly with 3.7 mW/K above 83 °C.  
For SOT886 (XSON6) package: Ptot derates linearly with 3.3 mW/K above 74 °C.  
For SOT1115 (XSON6) package: Ptot derates linearly with 3.2 mW/K above 71 °C.  
For SOT1202 (XSON6) package: Ptot derates linearly with 3.3 mW/K above 74 °C.  
For SOT1255-2 (X2SON6) package: Ptot derates linearly with 3.3 mW/K above 75 °C.  
9. Recommended operating conditions  
Table 7. Recommended operating conditions  
Symbol Parameter  
Conditions  
Min  
0.8  
0
Max  
3.6  
Unit  
V
VCC  
VI  
supply voltage  
input voltage  
output voltage  
3.6  
V
VO  
Active mode  
0
VCC  
3.6  
V
Power-down mode; VCC = 0 V  
0
V
Tamb  
ambient temperature  
-40  
+125  
°C  
©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
5 / 20  
 
 
 
 
 
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
10. Static characteristics  
Table 8. Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Tamb = 25 °C  
Conditions  
Min  
Typ  
Max  
Unit  
VOH  
HIGH-level output  
VI = VT+ or VT-  
voltage  
IO = -20 μA; VCC = 0.8 V to 3.6 V  
IO = -1.1 mA; VCC = 1.1 V  
IO = -1.7 mA; VCC = 1.4 V  
IO = -1.9 mA; VCC = 1.65 V  
IO = -2.3 mA; VCC = 2.3 V  
IO = -3.1 mA; VCC = 2.3 V  
IO = -2.7 mA; VCC = 3.0 V  
IO = -4.0 mA; VCC = 3.0 V  
VI = VT+ or VT-  
VCC - 0.1  
0.75 × VCC  
1.11  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.32  
2.05  
1.9  
2.72  
2.6  
VOL  
LOW-level output  
voltage  
IO = 20 μA; VCC = 0.8 V to 3.6 V  
IO = 1.1 mA; VCC = 1.1 V  
IO = 1.7 mA; VCC = 1.4 V  
IO = 1.9 mA; VCC = 1.65 V  
IO = 2.3 mA; VCC = 2.3 V  
IO = 3.1 mA; VCC = 2.3 V  
IO = 2.7 mA; VCC = 3.0 V  
IO = 4.0 mA; VCC = 3.0 V  
VI = GND to 3.6 V; VCC = 0 V to 3.6 V  
VI or VO = 0 V to 3.6 V; VCC = 0 V  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1  
0.3 × VCC  
0.31  
V
V
V
0.31  
V
0.31  
V
0.44  
V
0.31  
V
0.44  
V
II  
input leakage current  
±0.1  
μA  
μA  
IOFF  
power-off leakage  
current  
±0.2  
ΔIOFF  
ICC  
additional power-off  
leakage current  
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V  
-
-
-
-
±0.2  
0.5  
μA  
μA  
supply current  
VI = GND or VCC; IO = 0 A;  
VCC = 0.8 V to 3.6 V  
ΔICC  
CI  
additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V  
[1]  
-
-
-
-
40  
-
μA  
pF  
pF  
input capacitance  
output capacitance  
VCC = 0 V to 3.6 V; VI = GND or VCC  
VO = GND; VCC = 0 V  
1.1  
1.7  
CO  
-
©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
6 / 20  
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = -40 °C to +85 °C  
VOH  
HIGH-level output  
voltage  
VI = VT+ or VT-  
IO = -20 μA; VCC = 0.8 V to 3.6 V  
IO = -1.1 mA; VCC = 1.1 V  
IO = -1.7 mA; VCC = 1.4 V  
IO = -1.9 mA; VCC = 1.65 V  
IO = -2.3 mA; VCC = 2.3 V  
IO = -3.1 mA; VCC = 2.3 V  
IO = -2.7 mA; VCC = 3.0 V  
IO = -4.0 mA; VCC = 3.0 V  
VI = VT+ or VT-  
VCC - 0.1  
0.7 × VCC  
1.03  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.30  
1.97  
1.85  
2.67  
2.55  
VOL  
LOW-level output  
voltage  
IO = 20 μA; VCC = 0.8 V to 3.6 V  
IO = 1.1 mA; VCC = 1.1 V  
IO = 1.7 mA; VCC = 1.4 V  
IO = 1.9 mA; VCC = 1.65 V  
IO = 2.3 mA; VCC = 2.3 V  
IO = 3.1 mA; VCC = 2.3 V  
IO = 2.7 mA; VCC = 3.0 V  
IO = 4.0 mA; VCC = 3.0 V  
VI = GND to 3.6 V; VCC = 0 V to 3.6 V  
VI or VO = 0 V to 3.6 V; VCC = 0 V  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1  
0.3 × VCC  
0.37  
V
V
V
0.35  
V
0.33  
V
0.45  
V
0.33  
V
0.45  
V
II  
input leakage current  
±0.5  
μA  
μA  
IOFF  
power-off leakage  
current  
±0.5  
ΔIOFF  
ICC  
additional power-off  
leakage current  
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V  
-
-
-
-
-
-
±0.6  
0.9  
50  
μA  
μA  
μA  
supply current  
VI = GND or VCC; IO = 0 A;  
VCC = 0.8 V to 3.6 V  
ΔICC  
additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V  
[1]  
Tamb = -40 °C to +125 °C  
VOH  
HIGH-level output  
voltage  
VI = VT+ or VT-  
IO = -20 μA; VCC = 0.8 V to 3.6 V  
IO = -1.1 mA; VCC = 1.1 V  
IO = -1.7 mA; VCC = 1.4 V  
IO = -1.9 mA; VCC = 1.65 V  
IO = -2.3 mA; VCC = 2.3 V  
IO = -3.1 mA; VCC = 2.3 V  
IO = -2.7 mA; VCC = 3.0 V  
IO = -4.0 mA; VCC = 3.0 V  
VCC - 0.11  
0.6 × VCC  
0.93  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.17  
1.77  
1.67  
2.40  
2.30  
©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
7 / 20  
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VOL  
LOW-level output  
VI = VT+ or VT-  
voltage  
IO = 20 μA; VCC = 0.8 V to 3.6 V  
IO = 1.1 mA; VCC = 1.1 V  
IO = 1.7 mA; VCC = 1.4 V  
IO = 1.9 mA; VCC = 1.65 V  
IO = 2.3 mA; VCC = 2.3 V  
IO = 3.1 mA; VCC = 2.3 V  
IO = 2.7 mA; VCC = 3.0 V  
IO = 4.0 mA; VCC = 3.0 V  
VI = GND to 3.6 V; VCC = 0 V to 3.6 V  
VI or VO = 0 V to 3.6 V; VCC = 0 V  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.11  
0.33 × VCC  
0.41  
V
V
V
0.39  
V
0.36  
V
0.50  
V
0.36  
V
0.50  
V
II  
input leakage current  
±0.75  
±0.75  
μA  
μA  
IOFF  
power-off leakage  
current  
ΔIOFF  
ICC  
additional power-off  
leakage current  
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V  
-
-
-
-
-
-
±0.75  
1.4  
μA  
μA  
μA  
supply current  
VI = GND or VCC; IO = 0 A;  
VCC = 0.8 V to 3.6 V  
ΔICC  
additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V  
[1]  
75  
[1] One input at VCC - 0.6 V, other input at VCC or GND.  
11. Dynamic characteristics  
Table 9. Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 10.  
Symbol Parameter  
Conditions  
25 °C  
-40 °C to  
+85 °C  
-40 °C to  
+125 °C  
Unit  
Min Typ [1] Max  
Min  
Max  
Min  
Max  
CL = 5 pF  
tpd  
propagation A, B, C to Y; see Fig. 9  
[2]  
delay  
VCC = 0.8 V  
-
23.0  
6.6  
4.7  
3.9  
3.2  
2.9  
-
-
-
-
-
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
2.8  
2.3  
2.2  
2.0  
1.9  
12.6  
7.6  
6.2  
4.5  
3.9  
2.5  
2.5  
2.0  
1.7  
1.5  
13.0  
8.2  
6.8  
5.1  
4.1  
2.5  
2.5  
2.0  
1.7  
1.5  
13.2 ns  
8.6 ns  
7.2 ns  
5.3 ns  
4.3 ns  
CL = 10 pF  
tpd  
propagation A, B, C to Y; see Fig. 9  
[2]  
delay  
VCC = 0.8 V  
-
26.6  
7.4  
5.3  
4.5  
3.7  
3.4  
-
-
-
-
-
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
3.2  
2.6  
2.5  
2.4  
2.3  
14.3  
8.7  
7.0  
5.2  
4.6  
2.9  
2.8  
2.3  
2.1  
1.9  
14.9  
9.4  
7.8  
5.9  
4.9  
2.9  
2.8  
2.3  
2.1  
1.9  
15.2 ns  
9.8 ns  
8.2 ns  
6.1 ns  
5.1 ns  
©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
8 / 20  
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
Symbol Parameter  
Conditions  
25 °C  
-40 °C to  
+85 °C  
-40 °C to  
+125 °C  
Unit  
Min Typ [1] Max  
Min  
Max  
Min  
Max  
CL = 15 pF  
tpd  
propagation A, B, C to Y; see Fig. 9  
[2]  
delay  
VCC = 0.8 V  
-
30.1  
8.2  
5.9  
5.0  
4.2  
3.8  
-
-
-
-
-
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
3.6  
2.9  
2.8  
2.7  
2.5  
16.0  
9.6  
7.8  
5.8  
5.1  
3.2  
3.1  
2.5  
2.4  
2.2  
16.7  
10.4  
8.7  
3.2  
3.1  
2.5  
2.4  
2.2  
17.0 ns  
10.9 ns  
9.1 ns  
6.9 ns  
5.7 ns  
6.5  
5.5  
CL = 30 pF  
tpd propagation A, B, C to Y; see Fig. 9  
[2]  
delay  
VCC = 0.8 V  
-
38.3  
10.5  
7.4  
-
-
-
-
-
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
4.6  
3.7  
3.5  
3.4  
3.2  
20.9  
12.2  
9.9  
4.0  
3.8  
3.2  
3.1  
2.8  
21.8  
13.3  
11.1  
8.3  
4.0  
3.8  
3.2  
3.1  
2.8  
22.2 ns  
14.0 ns  
11.8 ns  
8.8 ns  
7.4 ns  
6.3  
5.3  
7.4  
4.9  
6.6  
7.0  
CL = 5 pF, 10 pF, 15 pF and 30 pF  
CPD  
power  
dissipation  
capacitance  
fi = 1 MHz; VI = GND to VCC [3]  
VCC = 0.8 V  
-
-
-
-
-
-
2.6  
2.8  
2.9  
3.1  
3.7  
4.3  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
pF  
pF  
pF  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
[1] All typical values are measured at nominal VCC  
.
[2] tpd is the same as tPLH and tPHL  
[3] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC 2 × fi × N + ∑(CL × VCC 2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC 2 × fo) = sum of outputs.  
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74AUP1G97  
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Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
9 / 20  
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
11.1. Waveforms and test circuit  
V
I
A, B, C input  
GND  
V
V
M
M
t
t
PLH  
PHL  
V
OH  
V
V
V
M
Y output  
M
t
V
OL  
t
PLH  
PHL  
V
OH  
Y output  
V
M
M
V
OL  
001aab593  
Measurement points are given in Table 10.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 9. Input A, B and C to output Y propagation delay times  
Table 10. Measurement points  
Supply voltage  
VCC  
Output  
VM  
Input  
VM  
VI  
tr = tf  
0.8 V to 3.6 V  
0.5 × VCC  
0.5 × VCC  
VCC  
≤ 3.0 ns  
V
V
EXT  
CC  
5 kΩ  
V
I
V
O
G
DUT  
R
T
C
L
R
L
001aac521  
Test data is given in Table 11.  
Definitions for test circuit:  
RL = Load resistance;  
CL = Load capacitance including jig and probe capacitance;  
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator;  
VEXT = External voltage for measuring switching times.  
Fig. 10. Test circuit for measuring switching times  
Table 11. Test data  
Supply voltage  
VCC  
Load  
CL  
VEXT  
RL [1]  
tPLH, tPHL  
open  
tPZH, tPHZ  
tPZL, tPLZ  
0.8 V to 3.6 V  
5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ  
GND  
2 × VCC  
[1] For measuring enable and disable times RL = 5 kΩ.  
For measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ.  
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74AUP1G97  
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Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
10 / 20  
 
 
 
 
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
12. Transfer characteristics  
Table 12. Transfer characteristics  
Voltages are referenced to GND (ground = 0 V; for test circuit see Fig. 10.  
Symbol Parameter  
Conditions  
25 °C  
Typ  
-40 °C to +85 °C -40 °C to +125 °C Unit  
Min  
Max  
Min  
Max  
Min  
Max  
VT+  
VT-  
VH  
positive-going  
threshold  
voltage  
see Fig. 11 and Fig. 12  
VCC = 0.8 V  
0.30  
0.53  
0.74  
0.91  
1.37  
1.88  
-
-
-
-
-
-
0.60  
0.90  
1.11  
1.29  
1.77  
2.29  
0.30  
0.53  
0.74  
0.91  
1.37  
1.88  
0.60  
0.90  
1.11  
1.29  
1.77  
2.29  
0.30  
0.53  
0.74  
0.91  
1.37  
1.88  
0.62  
0.92  
1.13  
1.31  
1.80  
2.32  
V
V
V
V
V
V
VCC = 1.1 V  
VCC = 1.4 V  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 3.0 V  
negative-going see Fig. 11 and Fig. 12  
threshold  
voltage  
VCC = 0.8 V  
0.10  
0.26  
0.39  
0.47  
0.69  
0.88  
-
-
-
-
-
-
0.60  
0.65  
0.75  
0.84  
1.04  
1.24  
0.10  
0.26  
0.39  
0.47  
0.69  
0.88  
0.60  
0.65  
0.75  
0.84  
1.04  
1.24  
0.10  
0.26  
0.39  
0.47  
0.69  
0.88  
0.60  
0.65  
0.75  
0.84  
1.04  
1.24  
V
V
V
V
V
V
VCC = 1.1 V  
VCC = 1.4 V  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 3.0 V  
hysteresis  
voltage  
(VT+ - VT-); see Fig. 11,  
Fig. 12, Fig. 13 and Fig. 14  
VCC = 0.8 V  
VCC = 1.1 V  
VCC = 1.4 V  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 3.0 V  
0.07  
0.08  
0.18  
0.27  
0.53  
0.79  
-
-
-
-
-
-
0.50  
0.46  
0.56  
0.66  
0.92  
1.31  
0.07  
0.08  
0.18  
0.27  
0.53  
0.79  
0.50  
0.46  
0.56  
0.66  
0.92  
1.31  
0.07  
0.08  
0.18  
0.27  
0.53  
0.79  
0.50  
0.46  
0.56  
0.66  
0.92  
1.31  
V
V
V
V
V
V
12.1. Waveforms transfer characteristics  
V
V
O
T+  
V
I
V
H
V
T-  
V
O
V
I
V
H
mna208  
V
V
T+  
T-  
mna207  
VT+ and VT- limits at 70 % and 20 %.  
Fig. 11. Transfer characteristic  
Fig. 12. Definition of VT+, VT- and VH  
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Product data sheet  
Rev. 13 — 9 May 2023  
11 / 20  
 
 
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
001aad691  
001aad692  
240  
1200  
I
I
CC  
(µA)  
CC  
(µA)  
160  
800  
80  
400  
0
0
0
0.4  
0.8  
1.2  
1.6  
2.0  
0
1.0  
2.0  
3.0  
V (V)  
I
V (V)  
I
Fig. 13. Typical transfer characteristics; VCC = 1.8 V  
Fig. 14. Typical transfer characteristics; VCC = 3.0 V  
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74AUP1G97  
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Product data sheet  
Rev. 13 — 9 May 2023  
12 / 20  
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
13. Package outline  
TSSOP6: plastic thin shrink small outline package; 6 leads; body width 1.25 mm  
SOT363-2  
D
B
E
A
X
c
(6x)  
y
H
E
v
M
A
e
1
6
5
4
pin 1 index  
A
A
2
A
1
1
2
3
A
3
θ
L
w
M B  
p
b
p
(6x)  
detail X  
e
e
0
3 mm  
scale  
Dimensions (mm are the original dimensions)  
Unit  
(1)  
(1)  
A
A
A
A
b
c
D
E
e
e
1
H
E
L
p
v
w
y
θ
1
2
3
p
max 1.1 0.1 1.0  
0.8 0.8  
0.30 0.25 2.2 1.35  
0.15 0.08 1.8 1.15  
2.4 0.46  
1.8 0.26  
8°  
0°  
mm  
0.15  
0.65 1.3  
0.3 0.1 0.1  
0
min  
Note  
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.  
sot363-2_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
21-12-15  
21-12-16  
SOT363-2  
SC-88A  
MO-203  
Fig. 15. Package outline SOT363-2 (TSSOP6)  
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Product data sheet  
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13 / 20  
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm  
SOT886  
b
1
2
3
4x  
(2)  
L
L
1
e
6
5
4
e
e
1
1
6x  
(2)  
A
A
1
D
E
terminal 1  
index area  
0
1
2 mm  
scale  
Dimensions (mm are the original dimensions)  
(1)  
Unit  
A
A
b
D
E
e
e
L
L
1
1
1
max 0.5 0.04 0.25 1.50 1.05  
0.35 0.40  
0.30 0.35  
0.27 0.32  
nom  
min  
0.20 1.45 1.00 0.6  
0.17 1.40 0.95  
mm  
0.5  
Notes  
1. Including plating thickness.  
2. Can be visible in some manufacturing processes.  
sot886_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
MO-252  
JEITA  
04-07-22  
12-01-05  
SOT886  
Fig. 16. Package outline SOT886 (XSON6)  
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74AUP1G97  
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Product data sheet  
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14 / 20  
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
XSON6: extremely thin small outline package; no leads;  
6 terminals; body 0.9 x 1.0 x 0.35 mm  
SOT1115  
b
3
(2)  
(4×)  
1
2
L
L
1
e
6
5
4
e
e
1
1
(2)  
(6×)  
A
1
A
D
E
terminal 1  
index area  
0
L
0.5  
scale  
1 mm  
Dimensions  
Unit  
(1)  
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 0.95 1.05  
0.35 0.40  
0.15 0.90 1.00 0.55 0.3 0.30 0.35  
0.12 0.85 0.95 0.27 0.32  
mm nom  
min  
Note  
1. Including plating thickness.  
2. Visible depending upon used manufacturing technology.  
sot1115_po  
Issue date  
References  
Outline  
version  
European  
projection  
IEC  
JEDEC  
JEITA  
10-04-02  
10-04-07  
SOT1115  
Fig. 17. Package outline SOT1115 (XSON6)  
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Product data sheet  
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15 / 20  
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
XSON6: extremely thin small outline package; no leads;  
6 terminals; body 1.0 x 1.0 x 0.35 mm  
SOT1202  
b
3
(2)  
1
2
(4×)  
L
L
1
e
6
5
4
e
e
1
1
(2)  
(6×)  
A
1
A
D
E
terminal 1  
index area  
0
L
0.5  
1 mm  
scale  
Dimensions  
Unit  
(1)  
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 1.05 1.05  
0.35 0.40  
0.15 1.00 1.00 0.55 0.35 0.30 0.35  
0.12 0.95 0.95 0.27 0.32  
mm nom  
min  
Note  
1. Including plating thickness.  
2. Visible depending upon used manufacturing technology.  
sot1202_po  
References  
Outline  
version  
European  
Issue date  
projection  
IEC  
JEDEC  
JEITA  
10-04-02  
10-04-06  
SOT1202  
Fig. 18. Package outline SOT1202 (XSON6)  
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Product data sheet  
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16 / 20  
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
X2SON6: plastic thermal enhanced extremely thin small outline package; no leads;  
6 terminals; body 1.0 x 0.8 x 0.32 mm  
SOT1255-2  
C
Seating Plane  
y
C
X
D
A
B
E
pin 1  
ID area  
A
A
3
u
C
A
1
detail X  
2x  
A
u
C
2x  
e
1
b
(4x)  
y
C
1
v
w
C
C
B
3
4
L
(4x)  
2
5
Dh  
(6x)  
pin 1  
ID area  
1
6
e
2
0
1 mm  
scale  
Dimensions (mm are the original dimensions)  
Unit  
A
A
A
b
D
D
E
e
1
e
L
y
y
1
u
v
w
1
3
h
2
max 0.35 0.04  
mm nom 0.32 0.02  
0.31  
0.26  
0.21  
0.30  
0.25  
0.10  
(Typ.)  
0.25 0.80 0.60 0.40 0.20 0.05 0.05 0.05 0.10 0.05  
0.20  
1.00  
0.30 0.00  
0.15  
min  
sot1255-2_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
- - -  
JEITA  
19-11-07  
19-11-08  
SOT1255-2  
Fig. 19. Package outline SOT1255-2 (X2SON6)  
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Product data sheet  
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17 / 20  
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
14. Abbreviations  
Table 13. Abbreviations  
Acronym  
Description  
CDM  
DUT  
ESD  
HBM  
MM  
Charged Device Model  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Machine Model  
15. Revision history  
Table 14. Revision history  
Document ID  
Release date Data sheet status  
20230509 Product data sheet  
Package SOT1255 (X2SON6) changed to SOT1255-2 (X2SON6).  
20230123 Product data sheet 74AUP1G97 v.11  
Type number 74AUP1G97GF (SOT891/XSON6) removed.  
20220208 Product data sheet 74AUP1G97 v.10  
Change notice Supersedes  
74AUP1G97 v.13  
Modifications:  
-
74AUP1G97 v.12  
74AUP1G97 v.12  
Modifications:  
-
74AUP1G97 v.11  
Modifications:  
-
Table 6: Derating values for Ptot total power dissipation updated.  
Section 1 and Section 2 updated.  
SOT363 (SC-88) package changed to SOT363-2 (TSSOP6) package.  
Type number 74AUP1G97UK (SOT1454-1/WLCSP6) removed.  
74AUP1G97 v.10  
Modifications:  
20170328  
Added type number 74AUP1G97UK (SOT1454-1/WLCSP6).  
20150917 Product data sheet 74AUP1G97 v.8  
Added type number 74AUP1G97GX (SOT1255/X2SON6).  
Product data sheet  
-
74AUP1G97 v.9  
74AUP1G97 v.9  
Modifications:  
-
74AUP1G97 v.8  
Modifications:  
20120815  
Product data sheet  
-
74AUP1G97 v.7  
Package outline drawing of SOT886 (Fig. 16) modified.  
74AUP1G97 v.7  
74AUP1G97 v.6  
74AUP1G97 v.5  
74AUP1G97 v.4  
74AUP1G97 v.3  
74AUP1G97 v.2  
74AUP1G97 v.1  
20111128  
20110110  
20101020  
20090623  
20090518  
20090327  
20061107  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
-
-
-
-
-
-
-
74AUP1G97 v.6  
74AUP1G97 v.5  
74AUP1G97 v.4  
74AUP1G97 v.3  
74AUP1G97 v.2  
74AUP1G97 v.1  
-
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Product data sheet  
Rev. 13 — 9 May 2023  
18 / 20  
 
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
16. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
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customer (a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
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automotive applications beyond Nexperia’s standard warranty and Nexperia’s  
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Suitability for use — Nexperia products are not designed, authorized or  
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©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
19 / 20  
 
Nexperia  
74AUP1G97  
Low-power configurable multiple function gate  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................2  
4. Marking..........................................................................2  
5. Functional diagram.......................................................2  
6. Pinning information......................................................3  
6.1. Pinning.........................................................................3  
6.2. Pin description.............................................................3  
7. Functional description................................................. 4  
7.1. Logic configurations.....................................................4  
8. Limiting values............................................................. 5  
9. Recommended operating conditions..........................5  
10. Static characteristics..................................................6  
11. Dynamic characteristics.............................................8  
11.1. Waveforms and test circuit.......................................10  
12. Transfer characteristics........................................... 11  
12.1. Waveforms transfer characteristics..........................11  
13. Package outline........................................................ 13  
14. Abbreviations............................................................18  
15. Revision history........................................................18  
16. Legal information......................................................19  
© Nexperia B.V. 2023. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 9 May 2023  
©
74AUP1G97  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 13 — 9 May 2023  
20 / 20  

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