74AUP2GU04-Q100 [NEXPERIA]
Low-power dual unbuffered inverter;
| 型号： | 74AUP2GU04-Q100 |
| 厂家： | 
Nexperia |
| 描述： | Low-power dual unbuffered inverter |
| 文件： | 总14页 (文件大小：235K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74AUP2GU04-Q100
Low-power dual unbuffered inverter
Rev. 2 — 28 January 2019
Product data sheet
1. General description
The 74AUP2GU04-Q100 provides two unbuffered inverting gates.
This device ensures a very low static and dynamic power consumption across the entire VCC range
from 0.8 V to 3.6 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
•
•
•
•
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
•
•
•
MIL-STD-883, method 3015 Class 3A. Exceeds 5000 V
HBM JESD22-A114F Class 3A. Exceeds 5000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 Ω)
•
•
•
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
SOT363
SOT886
74AUP2GU04GW-Q100 -40 °C to +125 °C
74AUP2GU04GM-Q100 -40 °C to +125 °C
SC-88
plastic surface-mounted package; 6 leads
XSON6
plastic extremely thin small outline package;
no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
4. Marking
Table 2. Marking
Type number
Marking code[1]
74AUP2GU04GW-Q100
74AUP2GU04GM-Q100
aD
aD
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
5. Functional diagram
6
1
1A
1Y
1
1
V
CC
1
3
6
4
540 Ω
50 Ω
A
Y
4
3
2A
2Y
mnb106
mnb107
001aad073
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
Fig. 3. Logic diagram (one gate)
6. Pinning information
6.1. Pinning
74AUP2GU04
74AUP2GU04
1A
GND
2A
1
2
3
6
5
4
1Y
1
2
3
6
5
4
1A
GND
2A
1Y
V
CC
V
CC
2Y
2Y
001aad700
Transparent top view
001aad699
Fig. 4. Pin configuration SOT363
Fig. 5. Pin configuration SOT886
6.2. Pin description
Table 3. Pin description
Symbol
Pin
1
Description
data input
1A
GND
2A
2
ground (0 V)
data input
3
2Y
4
data output
supply voltage
data output
VCC
1Y
5
6
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level.
Input
nA
L
Output
nY
H
H
L
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
2 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
-0.5
-50
-0.5
-50
-0.5
-
Max
Unit
V
supply voltage
+4.6
input clamping current
input voltage
VI < 0 V
-
+4.6
-
mA
V
VI
[1]
[2]
IOK
output clamping current
output voltage
VO < 0 V
mA
V
VO
VCC + 0.5
±20
50
IO
output current
VO = 0 V to VCC
mA
mA
mA
°C
ICC
supply current
-
IGND
Tstg
Ptot
ground current
-50
-65
-
-
storage temperature
total power dissipation
+150
250
Tamb = -40 °C to +125 °C
[3]
mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SC-88 package: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 package: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol
VCC
Parameter
Conditions
Min
0.8
0
Max Unit
supply voltage
input voltage
3.6
3.6
V
V
V
VI
VO
output voltage
ambient temperature
0
VCC
Tamb
Δt/ΔV
-40
0
+125 °C
input transition rise and fall rate VCC = 0.8 V to 3.6 V
200 ns/V
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
3 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = 25 °C
Conditions
Min
Typ
Max
Unit
VIH
VIL
HIGH-level input voltage
LOW-level input voltage
VCC = 0.8 V to 3.6 V
VCC = 0.8 V to 3.6 V
0.75 × VCC
-
-
-
-
V
V
0.25 × VCC
VOH
HIGH-level output voltage VI = GND or VCC
IO = -20 μA; VCC = 0.8 V to 3.6 V
VCC - 0.1
0.75 × VCC
1.11
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
IO = -1.1 mA; VCC = 1.1 V
IO = -1.7 mA; VCC = 1.4 V
IO = -1.9 mA; VCC = 1.65 V
IO = -2.3 mA; VCC = 2.3 V
IO = -3.1 mA; VCC = 2.3 V
IO = -2.7 mA; VCC = 3.0 V
IO = -4.0 mA; VCC = 3.0 V
VI = GND or VCC
1.32
2.05
1.9
2.72
2.6
VOL
LOW-level output voltage
IO = 20 μA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.3 × VCC
0.31
V
V
V
0.31
V
0.31
V
0.44
V
0.31
V
0.44
V
II
input leakage current
supply current
±0.1
μA
μA
ICC
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
0.5
CI
input capacitance
output capacitance
VCC = 0 V to 3.6 V; VI = GND or VCC
VO = GND; VCC = 0 V
-
-
1.5
1.8
-
-
pF
pF
CO
Tamb = -40 °C to +85 °C
VIH
VIL
HIGH-level input voltage
LOW-level input voltage
VCC = 0.8 V to 3.6 V
VCC = 0.8 V to 3.6 V
0.75 × VCC
-
-
-
-
V
V
0.25 × VCC
VOH
HIGH-level output voltage VI = GND or VCC
IO = -20 μA; VCC = 0.8 V to 3.6 V
VCC - 0.1
0.7 × VCC
1.03
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
IO = -1.1 mA; VCC = 1.1 V
IO = -1.7 mA; VCC = 1.4 V
IO = -1.9 mA; VCC = 1.65 V
IO = -2.3 mA; VCC = 2.3 V
IO = -3.1 mA; VCC = 2.3 V
IO = -2.7 mA; VCC = 3.0 V
IO = -4.0 mA; VCC = 3.0 V
1.30
1.97
1.85
2.67
2.55
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
4 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = GND or VCC
IO = 20 μA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.3 × VCC
0.37
V
V
V
0.35
V
0.33
V
0.45
V
0.33
V
0.45
V
II
input leakage current
supply current
±0.5
μA
μA
ICC
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
0.9
Tamb = -40 °C to +125 °C
VIH
VIL
HIGH-level input voltage
LOW-level input voltage
VCC = 0.8 V to 3.6 V
VCC = 0.8 V to 3.6 V
0.75 × VCC
-
-
-
-
V
V
0.25 × VCC
VOH
HIGH-level output voltage VI = GND or VCC
IO = -20 μA; VCC = 0.8 V to 3.6 V
VCC - 0.11
0.6 × VCC
0.93
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
IO = -1.1 mA; VCC = 1.1 V
IO = -1.7 mA; VCC = 1.4 V
IO = -1.9 mA; VCC = 1.65 V
IO = -2.3 mA; VCC = 2.3 V
IO = -3.1 mA; VCC = 2.3 V
IO = -2.7 mA; VCC = 3.0 V
IO = -4.0 mA; VCC = 3.0 V
VI = GND or VCC
1.17
1.77
1.67
2.40
2.30
VOL
LOW-level output voltage
IO = 20 μA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.11
0.33 × VCC
0.41
V
V
V
0.39
V
0.36
V
0.50
V
0.36
V
0.50
V
II
input leakage current
supply current
±0.75
1.4
μA
μA
ICC
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
5 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7.
Symbol Parameter
Conditions
25 °C
-40 °C to +125 °C
Unit
Min Typ[1] Max
Min
Max
Max
(85 °C) (125 °C)
CL = 5 pF
tpd
propagation delay nA to nY; see Fig. 6
VCC = 0.8 V
[2]
[2]
[2]
[2]
-
6.2
2.3
1.7
1.4
1.1
1.0
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.9
0.7
0.5
0.4
0.3
4.4
3.1
2.6
2.0
1.8
0.9
0.6
0.5
0.4
0.3
4.8
3.4
2.9
2.3
2.1
5.3
3.8
3.2
2.6
2.4
CL = 10 pF
tpd
propagation delay nA to nY; see Fig. 6
VCC = 0.8 V
-
9.6
3.1
2.3
1.9
1.5
1.3
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.2
1.0
0.8
0.6
0.5
6.1
4.0
3.3
2.7
2.4
1.2
0.9
0.7
0.6
0.5
6.8
4.6
3.8
3.1
2.7
7.5
5.1
4.2
3.5
3.0
CL = 15 pF
tpd
propagation delay nA to nY; see Fig. 6
VCC = 0.8 V
-
13.0
3.8
2.8
2.3
1.9
1.6
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.6
1.3
1.0
0.8
0.7
7.9
4.9
4.0
3.2
2.9
1.4
1.1
0.9
0.8
0.7
8.8
5.7
4.7
3.7
3.3
9.7
6.3
5.2
4.1
3.7
CL = 30 pF
tpd
propagation delay nA to nY; see Fig. 6
VCC = 0.8 V
-
23.2
6.0
4.2
3.6
2.9
2.5
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
2.4
2.0
1.7
1.4
1.2
13.1
7.6
6.1
4.8
4.3
2.2
1.8
1.5
1.3
1.1
14.8
9.0
7.2
5.7
5.1
16.3
9.9
8.0
6.3
5.7
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
6 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
Symbol Parameter
Conditions
25 °C
-40 °C to +125 °C
Unit
Min Typ[1] Max
Min
Max
Max
(85 °C) (125 °C)
CL = 5 pF, 10 pF, 15 pF and 30 pF
CPD power dissipation fi = 1 MHz; VI = GND to VCC [3][4]
capacitance
VCC = 0.8 V
-
-
-
-
-
-
1.1
1.1
1.3
1.5
3.0
4.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF
pF
pF
pF
pF
pF
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
[1] All typical values are measured at nominal VCC
.
[2] tpd is the same as tPLH and tPHL
.
[3] All specified values are the average typical values over all stated loads.
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC2 x fi x N + Σ(CL x VCC2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC2 x fo) = sum of the outputs.
11.1. Waveforms and test circuit
V
I
V
V
nA input
M
M
GND
t
t
PHL
PLH
V
OH
V
M
V
M
nY output
V
mna344
OL
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage drops that occur with the output load.
Fig. 6. The data input (nA) to output (nY) propagation delays
Table 9. Measurement points
Supply voltage
VCC
Output
VM
Input
VM
VI
tr = tf
0.8 V to 3.6 V
0.5 × VCC
0.5 × VCC
VCC
≤ 3.0 ns
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
7 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
V
V
EXT
CC
5 kΩ
V
I
V
O
G
DUT
R
T
C
L
R
L
001aac521
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 7. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VCC
Load
CL
VEXT
RL [1]
tPLH, tPHL
open
tPZH, tPHZ
tPZL, tPLZ
0.8 V to 3.6 V
5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ
GND
2 × VCC
[1] For measuring enable and disable times RL = 5 kΩ.
For measuring propagation delays, set-up and hold times and pulse width RL = 1 MΩ.
12. Additional characteristics
001aad074
30
g
fs
(mA/V)
R
bias
= 560 kΩ
20
V
CC
0.47 µF
100 µF
input
output
10
V
I
A
I
O
(f = 1 kHz)
GND
mna050
0
0
1
2
3
4
V
(V)
CC
VO is constant.
Tamb = 25 °C.
Fig. 8. Test set-up for measuring forward
transconductance
Fig. 9. Typical forward transconductance as a function
of supply voltage
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74AUP2GU04_Q100
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Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
8 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
13. Application information
Some applications for the 74AUP2GU04-Q100 are:
•
•
Linear amplifier (see Fig. 10)
Crystal oscillator (see Fig. 11)
Remark: All values given are typical values unless otherwise specified.
R2
V
CC
1 µF
R1
U04
Z
L
mna052
ZL > 10 kΩ.
R1 ≥ 3 kΩ.
R2 ≤ 1 MΩ.
Open loop amplification: AOL = 20.
Voltage amplification:
.
Vo(p-p) = VCC - 1.5 V centered at 0.5 × VCC
.
Unity gain bandwidth product is 5 MHz.
Fig. 10. Linear amplifier application
R1
R2
U04
C1
C2
out
mna053
C1 = 47 pF.
C2 = 22 pF.
R1 = 1 MΩ to 10 MΩ.
R2 optimum value depends on the frequency and required stability against changes in
VCC or average minimum ICC (ICC = 2 mA at VCC = 3.3 V and f = 10 MHz).
Fig. 11. Crystal oscillator application
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74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
9 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
14. Package outline
Plastic surface-mounted package; 6 leads
SOT363
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1
index
A
A
1
1
2
3
c
e
1
b
L
w
M B
p
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
A
b
p
c
D
e
e
H
L
Q
v
w
y
E
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
04-11-08
06-03-16
SOT363
SC-88
Fig. 12. Package outline SOT363 (SC-88)
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
10 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4x
(2)
L
L
1
e
6
5
4
e
e
1
1
6x
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
Dimensions (mm are the original dimensions)
(1)
Unit
A
A
b
D
E
e
e
L
L
1
1
1
max 0.5 0.04 0.25 1.50 1.05
0.35 0.40
0.30 0.35
0.27 0.32
nom
min
0.20 1.45 1.00 0.6
0.17 1.40 0.95
mm
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
sot886_po
References
Outline
version
European
Issue date
projection
IEC
JEDEC
MO-252
JEITA
04-07-22
12-01-05
SOT886
Fig. 13. Package outline SOT886 (XSON6)
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74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
11 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
15. Abbreviations
Table 11. Abbreviations
Acronym
DUT
Description
Device Under Test
ElectroStatic Discharge
Human Body Model
Military
ESD
HBM
MIL
MM
Machine Model
16. Revision history
Table 12. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74AUP2GU04_Q100 v.2 20190128
Product data sheet
-
74AUP2GU04_Q100 v.1
Modifications:
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Added type number 74AUP2GU04GM-Q100 (SOT886/XSON6).
74AUP2GU04_Q100 v.1 20141020
Product data sheet
-
-
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
12 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
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©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
13 / 14
Nexperia
74AUP2GU04-Q100
Low-power dual unbuffered inverter
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Marking..........................................................................1
5. Functional diagram.......................................................2
6. Pinning information......................................................2
6.1. Pinning.........................................................................2
6.2. Pin description.............................................................2
7. Functional description................................................. 2
8. Limiting values............................................................. 3
9. Recommended operating conditions..........................3
10. Static characteristics..................................................4
11. Dynamic characteristics.............................................6
11.1. Waveforms and test circuit........................................ 7
12. Additional characteristics..........................................8
13. Application information............................................. 9
14. Package outline........................................................ 10
15. Abbreviations............................................................12
16. Revision history........................................................12
17. Legal information......................................................13
© Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 28 January 2019
©
74AUP2GU04_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 2 — 28 January 2019
14 / 14
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