74AXP4T245PW [NEXPERIA]

4-bit dual supply translating transceiver; 3-stateProduction;
74AXP4T245PW
型号: 74AXP4T245PW
厂家: Nexperia    Nexperia
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4-bit dual supply translating transceiver; 3-stateProduction

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74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Rev. 2 — 6 February 2020  
Product data sheet  
1. General description  
The 74AXP4T245 is an 4-bit dual supply translating transceiver with 3-state outputs that enable  
bidirectional level translation. The device can be used as two 2-bit transceivers or as a 4-bit  
transceiver. It features four 2-bit input-output ports (nAn and nBn), a direction control input (nDIR),  
a output enable input (nOE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can  
be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating  
between any of the low voltage nodes (0.9 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power  
supply sequencing is required and output glitches during power supply transitions are prevented  
using patented circuitry. As a result glitches will not appear on the outputs for supply transitions  
during power-up/down between 20 mV/µs and 5.5 V/s.  
Pins nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH  
on nDIR allows transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to  
nAn. The output enable input (nOE) can be used to disable the outputs so the buses are effectively  
isolated.  
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing any damaging backflow current through the device when it is  
powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn  
are in the high-impedance OFF-state.  
2. Features and benefits  
Wide supply voltage range:  
VCC(A): 0.9 V to 5.5 V  
VCC(B): 0.9 V to 5.5 V  
Low input capacitance; CI = 1.2 pF (typical)  
Low output capacitance; CO = 3.6 pF (typical)  
Low dynamic power consumption; CPD = 10 pF (typical)  
Low static power consumption; ICC = 2 μA (25 °C maximum)  
High noise immunity  
Complies with JEDEC standard:  
JESD8-12 (1.1 V to 1.3 V; inputs)  
JESD8-11 (1.4 V to 1.6 V)  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8C (2.7 V to 3.6 V)  
JESD12-6 (4.5 V to 5.5 V)  
ESD protection:  
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV  
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV  
Latch-up performance exceeds 100 mA per JESD78D Class II  
Inputs accept voltages up to 5.5 V  
Low noise overshoot and undershoot < 10% of VCCO  
IOFF circuitry provides partial power-down mode operation  
Specified from -40 °C to +125 °C  
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AXP4T245PW -40 °C to +125 °C  
TSSOP16  
plastic thin shrink small outline package; 16 leads;  
body width 4.4 mm  
SOT403-1  
74AXP4T245BQ -40 °C to +125 °C  
DHVQFN16 plastic dual in-line compatible thermal enhanced  
very thin quad flat package; no leads; 16 terminals;  
body 2.5 × 3.5 × 0.85 mm  
SOT763-1  
4. Functional diagram  
13  
1B1  
12  
1B2  
11  
2B1  
10  
2B2  
V
V
CC(B)  
CC(A)  
1OE  
2OE  
15  
2
14  
3
1DIR  
2DIR  
1A1  
4
1A2  
2A1  
2A2  
001aak280  
5
6
7
Fig. 1. Logic symbol  
DIR  
OE  
B1  
B2  
A1  
A2  
V
V
CC(B)  
CC(A)  
001aak281  
Fig. 2. Logic diagram (one 2-bit transceiver)  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
2 / 27  
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
5. Pinning information  
5.1. Pinning  
74AXP4T245  
terminal 1  
index area  
2
3
4
5
6
7
15  
14  
13  
12  
11  
10  
1DIR  
2DIR  
1A1  
1A2  
2A1  
2A2  
1OE  
2OE  
1B1  
1B2  
2B1  
2B2  
74XP4T245  
(1)  
GND  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
V
CC(B)  
CC(A)  
1DIR  
1OE  
2OE  
1B1  
1B2  
2B1  
2B2  
GND  
2DIR  
1A1  
1A2  
2A1  
2A2  
GND  
aaa-029976  
Transparent top view  
(1) This is not a ground pin. There is no electrical or  
mechanical requirement to solder the pad. In case  
soldered, the solder land should remain floating or  
connected to GND.  
aaa-029975  
Fig. 3. Pin configuration SOT403-1 (TSSOP16)  
Fig. 4. Pin configuration SOT763-1 (DHVQFN16)  
5.2. Pin description  
Table 2. Pin description  
Symbol  
VCC(A)  
Pin  
Description  
1
supply voltage A (nAn, nOE and nDIR are referenced to VCC(A)  
)
1DIR, 2DIR  
1A1, 1A2  
2A1, 2A2  
GND [1]  
2B2, 2B1  
1B2, 1B1  
2OE, 1OE  
VCC(B)  
2, 3  
4, 5  
6, 7  
8, 9  
10, 11  
12, 13  
14, 15  
16  
direction control  
data input or output  
data input or output  
ground (0 V)  
data input or output  
data input or output  
output enable input (active LOW)  
supply voltage B (nBn is referenced to VCC(B)  
)
[1] All GND pins must be connected to ground (0 V).  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
3 / 27  
 
 
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
6. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
Supply voltage  
VCC(A), VCC(B)  
0.9 V to 5.5 V  
0.9 V to 5.5 V  
0.9 V to 5.5 V  
GND [1]  
Input  
Input/output [1]  
nOE [2]  
nDIR [2]  
nAn [2]  
nBn [2]  
L
L
nAn = nBn  
input  
L
H
X
X
input  
Z
nBn = nAn  
H
X
Z
Z
Z
[1] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.  
[2] nAn, nDIR and nOE are referenced to VCC(A); nBn is referenced to VCC(B)  
.
7. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC(A)  
VCC(B)  
IIK  
Parameter  
Conditions  
Min  
-0.5  
-0.5  
-20  
-0.5  
-20  
-0.5  
-0.5  
-
Max  
+6.5  
+6.5  
-
Unit  
V
supply voltage A  
supply voltage B  
input clamping current  
input voltage  
V
VI < 0 V  
mA  
V
VI  
[1]  
+6.5  
-
IOK  
output clamping current  
output voltage  
VO < 0 V  
mA  
VO  
Active mode  
[1][2][3]  
[1]  
VCCO + 0.5 V  
Suspend or 3-state mode  
VO = 0 V to VCCO  
ICC(A) or ICC(B); per VCC pin  
per GND pin  
+6.5  
±25  
100  
-
V
IO  
output current  
[2]  
mA  
mA  
mA  
°C  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
-100  
-65  
-
storage temperature  
total power dissipation  
+150  
500  
Tamb = -40 °C to +125 °C  
[4]  
mW  
[1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] VCCO is the supply voltage associated with the output port.  
[3] VCCO + 0.5 V should not exceed 6.5 V.  
[4] For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.  
For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C.  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
4 / 27  
 
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
8. Recommended operating conditions  
Table 5. Recommended operating conditions  
Symbol  
VCC(A)  
VCC(B)  
VI  
Parameter  
Conditions  
Min  
Max  
5.5  
5.5  
5.5  
VCCO  
5.5  
+125  
20  
Unit  
V
supply voltage A  
supply voltage B  
input voltage  
0.9  
0.9  
V
0
0
0
-40  
-
V
VO  
output voltage  
Active mode  
[1]  
[2]  
V
Suspend or 3-state mode  
V
Tamb  
ambient temperature  
°C  
Δt/ΔV  
input transition rise and fall rate VCCI = 0.9 V  
VCCI = 1.2 V  
ns/V  
ns/V  
ns/V  
ns/V  
ns/V  
ns/V  
-
20  
VCCI = 1.4 V to 1.95 V  
-
20  
VCCI = 2.3 V to 2.7 V  
VCCI = 3 V to 3.6 V  
VCCI = 4.5 V to 5.5 V  
-
20  
-
10  
-
8
[1] VCCO is the supply voltage associated with the output port.  
[2] VCCI is the supply voltage associated with the input port.  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
5 / 27  
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
9. Static characteristics  
Table 6. Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
-40 °C to +125 °C  
Min  
+25 °C  
-40 °C to +85 °C  
Max  
-40 °C to +125 °C Unit  
Max  
Typ  
Max  
VIH  
HIGH-level  
input voltage  
nAn, nBn, nDIR, nOE input  
VCCI = 0.9 V  
[1]  
0.7VCCI  
0.65VCCI  
1.6  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
VCCI = 1.1 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
VCCI = 4.5 V to 5.5 V  
nAn, nBn, nDIR, nOE input  
VCCI = 0.9 V  
2.0  
0.7VCCI  
VIL  
LOW-level  
[1]  
input voltage  
-
-
-
-
-
-
-
-
-
-
0.3VCCI  
0.35VCCI  
0.7  
0.3VCCI  
0.35VCCI  
0.7  
0.3VCCI  
0.35VCCI  
0.7  
V
V
V
V
V
VCCI = 1.1 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
VCCI = 4.5 V to 5.5 V  
VI = VIH  
0.8  
0.8  
0.8  
0.3VCCI  
0.3VCCI  
0.3VCCI  
VOH  
HIGH-level  
[2]  
[3]  
output voltage  
IO = -0.1 mA; VCCO = 0.9 V to 5.5 V  
IO = -1.5 mA; VCCO = 1.1 V  
IO = -3 mA; VCCO = 1.4 V  
IO = -4.5 mA; VCCO = 1.65 V  
IO = -8 mA; VCCO = 2.3 V  
IO = -10 mA; VCCO = 3.0 V  
IO = -12 mA; VCCO = 4.5 V  
VCCO - 0.1  
0.825  
1.05  
1.2  
VCCO  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
-
-
-
-
-
-
1.7  
2.2  
3.7  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
6 / 27  
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +125 °C  
Min  
+25 °C  
-40 °C to +85 °C  
Max  
-40 °C to +125 °C Unit  
Max  
Typ  
Max  
VOL  
LOW-level  
output voltage  
VI = VIL  
[2]  
[3]  
IO = 0.1 mA; VCCO = 0.9 V to 5.5 V  
-
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
0.1  
0.1  
0.275  
0.35  
0.45  
0.7  
0.1  
0.275  
0.35  
0.45  
0.7  
V
V
V
V
V
V
V
V
μA  
IO = 1.5 mA; VCCO = 1.1 V  
IO = 3 mA; VCCO = 1.4 V  
0.275  
0.35  
0.45  
0.7  
IO = 4.5 mA; VCCO = 1.65 V  
IO = 8 mA; VCCO = 2.3 V  
IO = 10 mA; VCCO = 3.0 V  
0.8  
0.8  
0.8  
IO = 8 mA; VCCO = 4.5 V  
0.5  
0.5  
0.5  
IO = 12 mA; VCCO = 4.5 V  
0.8  
0.8  
0.8  
II  
input leakage  
current  
nDIR, nOE input; VI = 0 V to 5.5 V; VCCI = 0.9 V to 5.5 V  
±0.1  
±0.5  
±1  
IOZ  
OFF-state  
output current  
A or B port; VO = 0 V or VCCO; VCCO = 0.9 V to 5.5 V  
[2]  
[2]  
-
-
-
-
±0.1  
±0.1  
±0.5  
±0.5  
±2  
±2  
μA  
μA  
suspend mode A port; VO = 0 V or VCCO; VCC(A) = 5.5 V;  
VCC(B) = 0 V  
suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V;  
VCC(B) = 5.5 V  
[2]  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
±0.1  
0.1  
±0.5  
0.5  
±2  
2
μA  
μA  
μA  
μA  
μA  
μA  
μA  
IOFF  
power-off  
nDIR, nOE input; VI = 0 V to 5.5 V; VCC(A) = 0 V;  
leakage current VCC(B) = 0.9 V to 5.5 V  
A port; VI or VO = 0 V to 5.5 V; VCC(A) = 0 V;  
VCC(B) = 0.9 V to 5.5 V  
0.1  
0.5  
2
B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V;  
VCC(A) = 0.9 V to 5.5 V  
0.1  
0.5  
2
ΔIOFF  
additional  
power-off  
leakage current  
nDIR, nOE input; VI = 0 V or 5.5 V; VCC(A) = 0 V to 0.1 V;  
VCC(B) = 0.9 V to 5.5 V  
±0.1  
±0.1  
±0.1  
±0.5  
±0.5  
±0.5  
±2  
±2  
±2  
A port; VO = 0 V or 5.5 V; VCC(A) = 0 V to 0.1 V;  
VCC(B) = 0.9 V to 5.5 V; VI = 0 V or 5.5 V  
B port; VO = 0 V or 5.5 V; VCC(B) = 0 V to 0.1 V;  
VCC(A) = 0.9 V to 5.5 V; VI = 0 V or 5.5 V  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
7 / 27  
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +125 °C  
Min  
+25 °C  
-40 °C to +85 °C  
Max  
-40 °C to +125 °C Unit  
Max  
Typ  
Max  
ICC  
supply current A port; VI = 0 V or VCCI; IO = 0 A  
VCC(A), VCC(B) = 0.9 V to 5.5 V  
VCC(A) = 5.5 V; VCC(B) = 0 V  
[1]  
-
-
-
-
-
-
2
2
8
8
20  
20  
±1  
μA  
μA  
μA  
VCC(A) = 0 V; VCC(B) = 5.5 V  
-0.1  
±0.4  
B port; VI = 0 V or VCCI; IO = 0 A  
VCC(A), VCC(B) = 0.9 V to 5.5 V  
VCC(B) = 5.5 V; VCC(A) = 0 V  
-
-
-
-
-
-
2
8
±0.4  
8
20  
±1  
μA  
μA  
μA  
μA  
-0.1  
2
VCC(B) = 0 V; VCC(A) = 5.5 V  
-
20  
ΔICC  
additional  
per input; other pins at VCCI or ground (0 V); IO = 0 A;  
[4]  
2
100  
150  
200  
supply current VCC(A), VCC(B) = 4.5 V to 5.5 V; VI = VCCI - 0.6 V  
[1] VCCI is the supply voltage associated with the control inputs or input port.  
[2] VCCO is the supply voltage associated with the output port.  
[3] Typical values for VOL and VOH are measured at VCCO is 0.9 V.  
[4] Typical values for ΔICC are measured at VCC(A), VCC(B) = 5 V.  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
8 / 27  
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Table 7. Typical total supply current ICC(A) at Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V).  
VCC(A)  
VCC(B)  
Unit  
0 V  
0.9 V  
0.01  
0.01  
0.01  
0.02  
0.06  
0.20  
0.39  
0.96  
1.2 V  
0.01  
0.01  
0.01  
0.01  
0.03  
0.17  
0.37  
0.96  
1.5 V  
0.01  
0.01  
0.01  
0.01  
0.01  
0.12  
0.34  
0.94  
1.8 V  
0.01  
0.01  
0.01  
0.01  
0.01  
0.07  
0.29  
0.90  
2.5 V  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.12  
0.77  
3.3 V  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.54  
5.0 V  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0 V  
0.00  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
5.0 V  
Table 8. Typical total supply current ICC(B) at Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V).  
VCC(A)  
VCC(B)  
Unit  
0 V  
0.9 V  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
1.2 V  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
1.5 V  
0.01  
0.02  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
1.8 V  
0.01  
0.06  
0.03  
0.01  
0.01  
0.01  
0.01  
0.01  
2.5 V  
0.01  
0.20  
0.17  
0.12  
0.07  
0.01  
0.01  
0.01  
3.3 V  
0.01  
0.39  
0.37  
0.34  
0.29  
0.12  
0.01  
0.01  
5.0 V  
0.01  
0.96  
0.96  
0.94  
0.90  
0.77  
0.54  
0.01  
0 V  
0.00  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
0.01  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
5.0 V  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
9 / 27  
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
10. Dynamic characteristics  
Table 9. Typical dynamic characteristics at VCC(A) = 0.9 V and Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6.  
Symbol Parameter  
Conditions  
VCC(B)  
1.8 V  
16.5  
31  
Unit  
0.9 V  
40  
1.2 V  
22  
1.5 V  
18.5  
32  
2.5 V  
15  
3.3 V  
15  
5.0 V  
15  
tpd  
tdis  
ten  
propagation delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
[1]  
[1]  
[1]  
[1]  
[1]  
[1]  
ns  
ns  
ns  
ns  
ns  
ns  
40  
33  
31  
31  
32  
disable time  
enable time  
34  
34  
34  
34  
34  
34  
34  
42  
30  
26  
26  
24  
25  
23  
49  
49  
49  
49  
49  
49  
49  
52  
32  
28  
27  
27  
27  
30  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
Table 10. Typical dynamic characteristics at VCC(B) = 0.9 V and Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6.  
Symbol Parameter  
Conditions  
VCC(A)  
1.8 V  
31  
Unit  
0.9 V  
40  
1.2 V  
33  
1.5 V  
32  
2.5 V  
31  
3.3 V  
31  
5.0 V  
32  
tpd  
tdis  
ten  
propagation delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
[1]  
[1]  
[1]  
[1]  
[1]  
[1]  
ns  
ns  
40  
22  
18.5  
11  
16.5  
10  
15  
15  
15  
disable time  
enable time  
34  
16  
7
7.7  
27  
5.3 ns  
27 ns  
3.6 ns  
42  
31  
28  
28  
27  
49  
18  
11.5  
36  
8.4  
5.6  
34  
4.5  
34  
52  
39  
35  
35  
ns  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
Table 11. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C  
[1] [2]Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7.  
Symbol Parameter  
Conditions  
VCC(A) and VCC(B)  
0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V  
Unit  
CPD  
power dissipation A port: (direction A to B);  
0.5  
0.5  
0.5  
0.5  
0.5  
0.7  
0.9 pF  
capacitance  
B port: (direction B to A)  
A port: (direction B to A);  
B port: (direction A to B)  
9.0  
9.3  
9.5  
9.7  
9.9  
10.2 10.9 pF  
CI  
input capacitance VI = 0 V or VCCI; VCCI = 0 V to 5.5 V 1.2  
1.2  
3.6  
1.2  
3.6  
1.2  
3.6  
1.2  
3.6  
1.2  
3.6  
1.2 pF  
3.6 pF  
CI/O  
input/output  
capacitance  
VO = 0 V; VCCO = 0 V  
3.6  
[1] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC2 × fo) = sum of the outputs.  
[2] fi = 1 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
10 / 27  
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Table 12. Dynamic characteristics for temperature range -40 °C to +85 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6.  
Symbol Parameter Conditions  
VCC(B)  
1.8 V ± 0.15 V  
Unit  
1.2 V ± 0.1 V  
1.5 V ± 0.1 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
5.0 V ± 0.5 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
tpd  
propagation nAn to nBn  
delay  
[1]  
VCC(A) = 1.2 V ± 0.1 V  
4
38  
33  
32  
31  
31  
31  
3.6  
3
25  
21  
3.4  
2.8  
2.4  
2.1  
2
21  
16.5  
15  
3.1  
2.6  
2.2  
1.9  
1.8  
1.6  
16  
12.5  
11  
2.9  
2.4  
2.1  
1.7  
1.6  
1.4  
14.5  
10.5  
9
2.7  
2.2  
1.9  
1.6  
1.4  
1.2  
14.5 ns  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
3.5  
3.1  
2.8  
2.7  
2.7  
9.8  
8.2  
6.6  
5.8  
5
ns  
ns  
ns  
ns  
ns  
2.7  
2.4  
2.3  
2.2  
19  
17.5  
17  
13.5  
13  
9.1  
8.5  
8.1  
7.5  
6.9  
6.4  
16.5  
1.9  
12.5  
nBn to nAn  
VCC(A) = 1.2 V ± 0.1 V  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
4
38  
25  
3.5  
3
33  
21  
3.1  
2.7  
2.4  
2.2  
2.1  
1.9  
32  
19  
15  
11  
9
2.8  
2.4  
2.1  
1.9  
1.7  
1.6  
31  
17.5  
13.5  
9.1  
2.7  
2.3  
2
31  
17  
2.7  
2.2  
1.9  
1.6  
1.4  
1.2  
31  
ns  
3.6  
3.4  
3.1  
2.9  
2.7  
16.5 ns  
12.5 ns  
21  
2.8  
2.6  
2.4  
2.2  
16.5  
12.5  
10.5  
9.8  
13  
16  
1.8  
1.6  
1.4  
8.5  
6.9  
5.8  
8.1  
6.4  
5
ns  
ns  
ns  
14.5  
14.5  
7.5  
8.2  
6.6  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
11 / 27  
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Symbol Parameter Conditions  
VCC(B)  
1.8 V ± 0.15 V  
Unit  
1.2 V ± 0.1 V  
1.5 V ± 0.1 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
5.0 V ± 0.5 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
ten  
enable time nOE to nAn  
VCC(A) = 1.2 V ± 0.1 V  
[1]  
4.6  
3.6  
2.9  
2.3  
2
48  
24  
4.6  
3.6  
2.9  
2.3  
2
48  
24  
4.6  
3.6  
2.9  
2.3  
2
48  
24  
4.6  
3.6  
2.9  
2.3  
2
48  
24  
4.6  
3.6  
2.9  
2.3  
2
48  
24  
4.6  
3.6  
2.9  
2.3  
2
48  
24  
ns  
ns  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
17.5  
11  
17.5  
11  
17.5  
11  
17.5  
11  
17.5  
11  
17.5 ns  
11  
8.1  
6
ns  
ns  
ns  
8.1  
6
8.1  
6
8.1  
6
8.1  
6
8.1  
6
1.8  
1.8  
1.8  
1.8  
1.8  
1.8  
nOE to nBn  
VCC(A) = 1.2 V ± 0.1 V  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
5
46  
40  
36  
35  
34  
37  
4.6  
3.8  
3.3  
2.8  
2.7  
2.4  
32  
24  
4.1  
3.5  
3
27  
4.1  
3.3  
2.8  
2.3  
2.1  
1.9  
24  
16  
4
25.5  
15  
4.1  
3.3  
2.8  
2.2  
1.9  
1.7  
26  
ns  
4.2  
3.9  
3.4  
3.2  
3.1  
19.5  
17.5  
14.5  
13.5  
13  
3.3  
2.8  
2.2  
1.9  
1.8  
14.5 ns  
11.5 ns  
21  
13.5  
11  
12  
18.5  
17.5  
17  
2.5  
2.3  
2.1  
9.3  
8.1  
7.3  
8.4  
7.1  
6.1  
ns  
ns  
ns  
9.5  
8.7  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
12 / 27  
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Symbol Parameter Conditions  
VCC(B)  
1.8 V ± 0.15 V  
Unit  
1.2 V ± 0.1 V  
1.5 V ± 0.1 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
5.0 V ± 0.5 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
tdis  
disable time nOE to nAn  
VCC(A) = 1.2 V ± 0.1 V  
[1]  
4.9  
3.9  
4
36  
22  
19  
13  
13  
9.7  
4.9  
3.9  
4
36  
22  
19  
13  
13  
9.7  
4.9  
3.9  
4
36  
22  
19  
13  
13  
9.7  
4.9  
3.9  
4
36  
22  
19  
13  
13  
9.7  
4.9  
3.9  
4
36  
22  
19  
13  
13  
9.7  
4.9  
3.9  
4
36  
22  
19  
13  
13  
9.7  
ns  
ns  
ns  
ns  
ns  
ns  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
2.9  
3.5  
2.4  
2.9  
3.5  
2.4  
2.9  
3.5  
2.4  
2.9  
3.5  
2.4  
2.9  
3.5  
2.4  
2.9  
3.5  
2.4  
nOE to nBn  
VCC(A) = 1.2 V ± 0.1 V  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
nAn, nBn output  
5.6  
5.1  
4.7  
4.3  
4.2  
4.1  
41  
34  
4.8  
4.4  
4
32  
25  
5.1  
4.6  
4.3  
3.9  
3.7  
3.6  
30  
23  
4.4  
3.8  
3.4  
3
26  
5.1  
4.6  
4.2  
3.9  
3.7  
3.5  
27  
19.5  
17.5  
15  
4.1  
3.6  
3.3  
2.9  
2.7  
2.5  
24  
17  
15  
ns  
ns  
ns  
18.5  
16.5  
14.5  
13.5  
12.5  
32  
23  
21  
29.5  
29  
3.6  
3.5  
3.3  
20.6  
19.5  
19  
18.5  
17.5  
16.5  
12.1 ns  
2.9  
2.7  
14  
11  
10  
ns  
ns  
28  
13  
tt  
transition  
time  
VCC(A) = 1.1 V to 5.5 V  
1
-
1
-
1
-
1
-
1
-
1
-
ns  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
13 / 27  
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Table 13. Dynamic characteristics for temperature range -40 °C to +125 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6.  
Symbol Parameter Conditions  
VCC(B)  
1.8 V ± 0.15 V  
Unit  
1.2 V ± 0.1 V  
1.5 V ± 0.1 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
5.0 V ± 0.5 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
tpd  
propagation nAn to nBn  
delay  
[1]  
VCC(A) = 1.2 V ± 0.1 V  
4
38  
33  
32  
31  
31  
31  
3.6  
3
26  
22  
3.4  
2.8  
2.4  
2.1  
2
22  
17.5  
16  
3.1  
2.6  
2.2  
1.9  
1.8  
1.6  
17  
13.5  
12  
2.9  
2.4  
2.1  
1.7  
1.6  
1.4  
15  
11.5  
9.7  
8.1  
7.5  
6.9  
2.7  
2.2  
1.9  
1.6  
1.4  
1.2  
15  
ns  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
3.5  
3.1  
2.8  
2.7  
2.7  
10.5 ns  
2.7  
2.4  
2.3  
2.2  
20  
8.7  
7.1  
6.3  
5.5  
ns  
ns  
ns  
ns  
18.5  
18  
14.5  
14  
9.8  
9.2  
8.8  
17.5  
1.9  
13.5  
nBn to nAn  
VCC(A) = 1.2 V ± 0.1 V  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
4
38  
26  
22  
17  
15  
15  
3.5  
3
33  
3.1  
2.7  
2.4  
2.2  
2.1  
1.9  
32  
20  
2.8  
2.4  
2.1  
1.9  
1.7  
1.6  
31  
18.5  
14.5  
9.8  
2.7  
2.3  
2
31  
18  
2.7  
2.2  
1.9  
1.6  
1.4  
1.2  
31  
ns  
3.6  
3.4  
3.1  
2.9  
2.7  
22  
17.5 ns  
13.5 ns  
2.8  
2.6  
2.4  
2.2  
17.5  
13.5  
11.5  
10.5  
16  
14  
12  
1.8  
1.6  
1.4  
9.2  
7.5  
6.3  
8.8  
6.9  
5.5  
ns  
ns  
ns  
9.7  
8.7  
8.1  
7.1  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
14 / 27  
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Symbol Parameter Conditions  
VCC(B)  
1.8 V ± 0.15 V  
Unit  
1.2 V ± 0.1 V  
1.5 V ± 0.1 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
5.0 V ± 0.5 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
ten  
enable time nOE to nAn  
VCC(A) = 1.2 V ± 0.1 V  
[1]  
4.6  
3.6  
2.9  
2.3  
2
48  
25  
4.6  
3.6  
2.9  
2.3  
2
48  
25  
4.6  
3.6  
2.9  
2.3  
2
48  
25  
4.6  
3.6  
2.9  
2.3  
2
48  
25  
4.6  
3.6  
2.9  
2.3  
2
48  
25  
4.6  
3.6  
2.9  
2.3  
2
48  
25  
ns  
ns  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
18.5  
11.5  
8.7  
18.5  
11.5  
8.7  
18.5  
11.5  
8.7  
18.5  
11.5  
8.7  
18.5  
11.5  
8.7  
18.5 ns  
11.5 ns  
8.7  
6.5  
ns  
ns  
1.8  
6.5  
1.8  
6.5  
1.8  
6.5  
1.8  
6.5  
1.8  
6.5  
1.8  
nOE to nBn  
VCC(A) = 1.2 V ± 0.1 V  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
5
46  
40  
36  
35  
34  
37  
4.6  
3.8  
3.3  
2.8  
2.7  
2.4  
32  
25  
4.1  
3.5  
3
28  
21  
4.1  
3.3  
2.8  
2.3  
2.1  
1.9  
25  
17  
4
26  
16  
4.1  
3.3  
2.8  
2.2  
1.9  
1.7  
26  
ns  
4.2  
3.9  
3.4  
3.2  
3.1  
3.3  
2.8  
2.2  
1.9  
1.8  
15.5 ns  
12.5 ns  
23  
19  
14.5  
12  
13  
19.5  
18.5  
18  
2.5  
2.3  
2.1  
15.5  
14.5  
14  
10.5  
8.7  
7.9  
9.1  
7.6  
6.7  
ns  
ns  
ns  
10.5  
9.4  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
15 / 27  
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Symbol Parameter Conditions  
VCC(B)  
1.8 V ± 0.15 V  
Unit  
1.2 V ± 0.1 V  
1.5 V ± 0.1 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
5.0 V ± 0.5 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
tdis  
disable time nOE to nAn  
VCC(A) = 1.2 V ± 0.1 V  
[1]  
4.9  
3.9  
4
36  
23  
4.9  
3.9  
4
36  
23  
4.9  
3.9  
4
36  
23  
4.9  
3.9  
4
36  
23  
4.9  
3.9  
4
36  
23  
4.9  
3.9  
4
36  
23  
20  
14  
14  
ns  
ns  
ns  
ns  
ns  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
20  
20  
20  
20  
20  
2.9  
3.5  
2.4  
14  
2.9  
3.5  
2.4  
14  
2.9  
3.5  
2.4  
14  
2.9  
3.5  
2.4  
14  
2.9  
3.5  
2.4  
14  
2.9  
3.5  
2.4  
14  
14  
14  
14  
14  
10.2  
10.2  
10.2  
10.2  
10.2  
10.2 ns  
nOE to nBn  
VCC(A) = 1.2 V ± 0.1 V  
VCC(A) = 1.5 V ± 0.1 V  
VCC(A) = 1.8 V ± 0.15 V  
VCC(A) = 2.5 V ± 0.2 V  
VCC(A) = 3.3 V ± 0.3 V  
VCC(A) = 5.0 V ± 0.5 V  
nAn, nBn output  
5.6  
5.1  
4.7  
4.3  
4.2  
4.1  
41  
35  
33  
31  
30  
29  
4.8  
4.4  
4
33  
27  
24  
22  
21  
20  
5.1  
4.6  
4.3  
3.9  
3.7  
3.6  
31  
25  
4.4  
3.8  
3.4  
3
27  
5.1  
4.6  
4.2  
3.9  
3.7  
3.5  
28  
21  
4.1  
3.6  
3.3  
2.9  
2.7  
2.5  
25  
18  
16  
13  
ns  
ns  
ns  
ns  
20  
22  
17.5  
15.5  
14.5  
13.5  
18.5  
16  
3.6  
3.5  
3.3  
19.5  
18.5  
17.5  
2.9  
2.7  
15  
11.5 ns  
10.5 ns  
13.5  
tt  
transition  
time  
VCC(A) = 1.1 V to 5.5 V  
1
1
1
1
1
1
ns  
[1] tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH  
.
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74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
16 / 27  
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
10.1. Waveforms and test circuit  
V
I
nAn, nBn input  
GND  
V
M
t
t
PLH  
PHL  
V
OH  
nBn, nAn output  
V
M
V
OL  
001aak285  
Measurement points are given in Table 14.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 5. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times  
V
I
V
nOE input  
M
GND  
t
t
PZL  
PLZ  
V
CCO  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
001aak286  
Measurement points are given in Table 14.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 6. Enable and disable times  
Table 14. Measurement points  
Supply voltage  
VCC(A), VCC(B)  
0.9 V to 1.6 V  
1.65 V to 2.7 V  
3.0 V to 5.5 V  
Input [1]  
Output [2]  
VM  
VM  
VX  
VOL + 0.1 V  
VY  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCO  
0.5VCCO  
0.5VCCO  
VOH - 0.1 V  
VOH - 0.15 V  
VOH - 0.3 V  
VOL + 0.15 V  
VOL + 0.3 V  
[1] VCCI is the supply voltage associated with the data input port.  
[2] VCCO is the supply voltage associated with the output port.  
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74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
17 / 27  
 
 
 
 
 
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
I
O
G
DUT  
R
T
C
L
R
L
001aae331  
Test data is given in Table 15.  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance.  
VEXT = External voltage for measuring switching times.  
Fig. 7. Test circuit for measuring switching times  
Table 15. Test data  
Supply voltage  
VCC(A), VCC(B)  
0.9 V to 5.5 V  
Load  
CL  
Input  
tr, tf  
VEXT  
RL  
VI [1]  
tPLH, tPHL  
GND  
tPZH, tPHZ  
tPZL, tPLZ [2]  
5 pF  
10 kΩ  
≤3.0 ns  
VCCI  
GND  
2VCCO  
[1] VCCI is the supply voltage associated with the data input port.  
[2] VCCO is the supply voltage associated with the output port.  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
18 / 27  
 
 
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
10.2. Additional propagation delay versus load capacitance graphs  
aaa-029962  
aaa-029963  
6
8
6
4
2
0
t
pd  
(ns)  
(3)  
t
pd  
(ns)  
5
4
3
2
1
0
(3)  
(2)  
(1)  
(2)  
(1)  
0
20  
40  
60  
80  
C
100  
(pF)  
0
20  
40  
60  
80 100  
C (pF)  
L
L
Tamb = -40 °C to +125 °C  
For tPLH, tPHL, tPZH and tPZL  
(1) Minimum: VCCO = 5.5 V  
Tamb = -40 °C to +125 °C  
For tPLH, tPHL, tPZH and tPZL  
(1) Minimum: VCCO = 3.6 V  
(2) Typical: Tamb = 25 °C; VCCO = 5 V  
(3) Maximum: VCCO = 4.5 V  
(2) Typical: Tamb = 25 °C; VCCO = 3.3 V  
(3) Maximum: VCCO = 3 V  
Fig. 8. Additional propagation delay versus load  
capacitance  
Fig. 9. Additional propagation delay versus load  
capacitance  
aaa-029964  
aaa-029965  
10  
12  
t
pd  
(ns)  
t
(3)  
pd  
(ns)  
10  
8
(3)  
8
6
4
2
0
6
(2)  
(1)  
(2)  
4
(1)  
2
0
0
20  
40  
60  
80  
100  
(pF)  
0
20  
40  
60  
80  
100  
C (pF)  
L
C
L
Tamb = -40 °C to +125 °C  
For tPLH, tPHL, tPZH and tPZL  
(1) Minimum: VCCO = 2.7 V  
Tamb = -40 °C to +125 °C  
For tPLH, tPHL, tPZH and tPZL  
(1) Minimum: VCCO = 1.95 V  
(2) Typical: Tamb = 25 °C; VCCO = 2.5 V  
(3) Maximum: VCCO = 2.3 V  
(2) Typical: Tamb = 25 °C; VCCO = 1.8 V  
(3) Maximum: VCCO = 1.65 V  
Fig. 10. Additional propagation delay versus load  
capacitance  
Fig. 11. Additional propagation delay versus load  
capacitance  
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74AXP4T245  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
19 / 27  
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
aaa-029966  
aaa-029967  
16  
30  
t
pd  
(ns)  
t
pd  
(ns)  
(3)  
25  
(3)  
12  
20  
15  
10  
5
(2)  
(1)  
8
4
0
(2)  
(1)  
0
0
20  
40  
60  
80  
100  
(pF)  
0
20  
40  
60  
80  
100  
C (pF)  
L
C
L
Tamb = -40 °C to +125 °C  
For tPLH, tPHL, tPZH and tPZL  
(1) Minimum: VCCO = 1.6 V  
Tamb = -40 °C to +125 °C  
For tPLH, tPHL, tPZH and tPZL  
(1) Minimum: VCCO = 1.3 V  
(2) Typical: Tamb = 25 °C; VCCO = 1.5 V  
(3) Maximum: VCCO = 1.4 V  
(2) Typical: Tamb = 25 °C; VCCO = 1.2 V  
(3) Maximum: VCCO = 1.1 V  
Fig. 12. Additional propagation delay versus load  
capacitance  
Fig. 13. Additional propagation delay versus load  
capacitance  
aaa-029968  
32  
t
pd  
(ns)  
24  
16  
8
0
0
20  
40  
60  
80  
C
100  
(pF)  
L
Tamb = 25 °C; VCCO = 0.9 V  
For tPLH, tPHL, tPZH and tPZL  
Fig. 14. Additional propagation delay versus load capacitance  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
20 / 27  
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
11. Application information  
11.1. Unidirectional logic level-shifting application  
The circuit given in Fig. 15 is an example of the 74AXP4T245 being used in an unidirectional logic  
level-shifting application.  
V
V
V
CC1  
CC2  
CC2  
V
V
CC(B)  
CC(A)  
GND  
An  
1
16  
2,3  
DIR  
Bn  
V
CC1  
8,9  
74AXP4T245  
4,5,6,7  
10,11,12,13  
OE  
14,15  
system-1  
system-2  
aaa-029977  
Schematic given for one channel.  
Fig. 15. Unidirectional logic level-shifting application  
Table 16. Description unidirectional logic level-shifting application  
Name  
VCC(A)  
GND  
A
Function  
VCC1  
GND  
OUT  
IN  
Description  
supply voltage of system-1 (0.9 V to 5.5 V)  
device GND  
output level depends on VCC1 voltage  
input threshold value depends on VCC2 voltage  
the GND (LOW level) determines B port to A port direction  
supply voltage of system-2 (0.9 V to 5.5 V)  
The GND (LOW level) enables the output ports  
B
DIR  
VCC(B)  
OE  
DIR  
VCC2  
OE  
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74AXP4T245  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
21 / 27  
 
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
11.2. Bidirectional logic level-shifting application  
Fig. 16 shows the 74AXP4T245 being used in a bidirectional logic level-shifting application.  
V
V
V
V
CC2  
CC1  
CC1  
CC2  
V
V
CC(B)  
CC(A)  
GND  
A
I/O-1  
I/O-2  
1
16  
PULL-UP/DOWN  
PULL-UP/DOWN  
DIR  
B
8,9  
2,3  
74AXP4T245  
4,5,6,7 10,11,12,13  
OE  
14,15  
OE  
DIR CTRL  
system-1  
system-2  
aaa-029978  
Schematic given for one channel.  
Pull-up or pull-down only needed for 74AXP4T245.  
Fig. 16. Bidirectional logic level-shifting application  
Table 17 gives a sequence that will illustrate data transmission from system-1 to system-2 and then  
from system-2 to system-1.  
Table 17. Description bidirectional logic level-shifting application  
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.  
State DIR CTRL OE  
I/O-1  
I/O-2  
Description  
1
2
H
H
L
output input  
system-1 data to system-2  
H
Z
Z
Z
system-2 is getting ready to send data to  
system-1. I/O-1 and I/O-2 are disabled. The  
bus-line state depends on bus hold.  
3
4
L
L
H
L
Z
DIR bit is set LOW. I/O-1 and I/O-2 still are  
disabled. The bus-line state depends on bus  
hold.  
input  
output system-2 data to system-1  
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74AXP4T245  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
22 / 27  
 
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
12. Package outline  
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm  
SOT403-1  
D
E
A
X
c
y
H
v
M
A
E
Z
9
16  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
8
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.40  
0.06  
mm  
1.1  
0.65  
1
0.2  
0.13  
0.1  
0.25  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT403-1  
MO-153  
Fig. 17. Package outline SOT403-1 (TSSOP16)  
©
74AXP4T245  
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Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
23 / 27  
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
16 terminals; body 2.5 x 3.5 x 0.85 mm  
SOT763-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16  
15  
10  
D
h
X
0
2.5  
scale  
5 mm  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
1
b
c
E
h
e
e
y
D
D
E
L
v
w
y
1
1
h
max.  
0.05 0.30  
0.00 0.18  
3.6  
3.4  
2.15  
1.85  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
2.5  
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT763-1  
- - -  
MO-241  
- - -  
Fig. 18. Package outline SOT763-1 (DHVQFN16)  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
24 / 27  
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
13. Abbreviations  
Table 18. Abbreviations  
Acronym  
CDM  
Description  
Charged Device Model  
Device Under Test  
DUT  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
14. Revision history  
Table 19. Revision history  
Document ID  
74AXP4T245 v.2  
Modifications:  
Release date  
20200206  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
-
Section 1: General description updated.  
74AXP4T245 v.1  
20190624 Product data sheet  
-
-
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
25 / 27  
 
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
15. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
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Suitability for use — Nexperia products are not designed, authorized or  
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©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
26 / 27  
 
Nexperia  
74AXP4T245  
4-bit dual supply translating transceiver; 3-state  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................2  
4. Functional diagram.......................................................2  
5. Pinning information......................................................3  
5.1. Pinning.........................................................................3  
5.2. Pin description.............................................................3  
6. Functional description................................................. 4  
7. Limiting values............................................................. 4  
8. Recommended operating conditions..........................5  
9. Static characteristics....................................................6  
10. Dynamic characteristics.......................................... 10  
10.1. Waveforms and test circuit...................................... 17  
10.2. Additional propagation delay versus load  
capacitance graphs............................................................ 19  
11. Application information............................................21  
11.1. Unidirectional logic level-shifting application............ 21  
11.2. Bidirectional logic level-shifting application.............. 22  
12. Package outline........................................................ 23  
13. Abbreviations............................................................25  
14. Revision history........................................................25  
15. Legal information......................................................26  
© Nexperia B.V. 2020. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 6 February 2020  
©
74AXP4T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 2 — 6 February 2020  
27 / 27  

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