74HC299D [NEXPERIA]

8-bit universal shift register; 3-stateProduction;
74HC299D
型号: 74HC299D
厂家: Nexperia    Nexperia
描述:

8-bit universal shift register; 3-stateProduction

光电二极管 输出元件 逻辑集成电路 触发器
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74HC299  
8-bit universal shift register; 3-state  
Rev. 6 — 11 May 2021  
Product data sheet  
1. General description  
The 74HC299 is an 8-bit universal shift register with 3-state outputs. It contains eight  
edge-triggered D-type flip-flops and the interstage logic necessary to perform synchronous  
shift-right, shift-left, parallel load and hold operations. The type of operation is determined by the  
mode select inputs S0 and S1. Pins I/O0 to I/O7 are flip-flop 3-state buffer outputs which allow  
them to operate as data inputs in parallel load mode. The serial outputs Q0 and Q7 are used for  
expansion in serial shifting of longer words. A LOW signal on the asynchronous master reset  
input MR overrides the Sn and clock CP inputs and resets the flip-flops. All other state changes  
are initiated by the rising edge of the clock pulse. Inputs can change when the clock is either  
state, provided that the recommended set-up and hold times are observed. A HIGH signal on  
the 3-state output enable inputs OE1 or OE2 disables the 3-state buffers and the I/On outputs  
assume a high-impedance OFF-state. In this condition, the shift, hold, load and reset operations  
can still occur. The 3-state buffers are also disabled by HIGH signals on both S0 and S1, when  
in preparation for a parallel load operation. Inputs include clamp diodes. This enables the use of  
current limiting resistors to interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
CMOS input levels  
Multiplexed inputs/outputs provide improved bit density  
Four operating modes:  
Shift left  
Shift right  
Hold (store)  
Load data  
Operates with output enable or at high-impedance OFF-state  
3-state outputs drive bus lines directly  
Cascadable for n-bit word lengths  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range  
-40 °C to +125 °C  
Name  
Description  
Version  
74HC299D  
SO20  
plastic small outline package; 20 leads;  
body width 7.5 mm  
SOT163-1  
 
 
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
4. Functional diagram  
1
19  
S1  
S0  
DSL  
18  
DSR  
11  
CP  
12  
8-BIT SHIFT REGISTER  
MR  
9
Q7  
17  
Q0  
8
OE1  
2
INPUT/3-STATE OUTPUT CIRCUITRY  
OE2  
3
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7  
13 14 15 16  
7
6
5
4
001aai460  
Fig. 1. Functional diagram  
9
2
3
1
19  
12  
R
SRG8  
&
3EN5  
0
1
0
3
M
C4/1 /2  
11  
7
1, 4D  
3, 4D  
1
19  
11  
18  
I/O0  
I/O1  
I/O2  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
Q0  
7
S0  
8
Z6  
13  
6
S1  
6, 5  
13  
DSR  
DSL  
3, 4D  
5
14  
5
6
14  
5
12  
9
15  
4
CP  
15  
4
MR  
16  
8
16  
2
3
3, 4D  
7, 5  
2, 4D  
OE  
17  
Z7  
18  
Q7  
17  
001aai458  
001aai459  
Fig. 2. Logic symbol  
Fig. 3. IEC logic symbol  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
2 / 15  
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
DSR  
S0  
D
S1  
Q
I/O0  
CP  
FF0  
RD  
CP  
Q0  
D
OE1  
Q
I/O1  
I/O2  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
CP  
FF1  
RD  
OE2  
D
Q
CP  
FF2  
RD  
D
Q
CP  
FF3  
RD  
D
Q
CP  
FF4  
RD  
D
Q
CP  
FF5  
RD  
D
Q
CP  
FF6  
RD  
DSL  
D
Q
CP  
FF7  
RD  
Q7  
001aai461  
MR  
Fig. 4. Logic diagram  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
3 / 15  
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
5. Pinning information  
5.1. Pinning  
74HC299  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
S0  
OE1  
OE2  
I/O6  
I/O4  
I/O2  
I/O0  
Q0  
V
CC  
S1  
3
DSL  
Q7  
4
5
I/O7  
I/O5  
I/O3  
I/O1  
CP  
6
7
8
9
MR  
10  
GND  
DSR  
aaa-030321  
Fig. 5. Pin configuration SOT163-1 (SO20)  
5.2. Pin description  
Table 2. Pin description  
Symbol  
Pin  
Description  
mode select input  
S0, S1  
1, 19  
2, 3  
OE1, OE2  
3-state output enable input (active LOW)  
I/O0, I/O1, I/O2, I/O3,  
I/O4, I/O5, I/O6, I/O7  
7, 13, 6, 14,  
5, 15, 4, 16  
parallel data input or 3-state parallel output (bus driver)  
Q0, Q7  
MR  
8, 17  
9
serial output (standard output)  
asynchronous master reset input (active LOW)  
ground (0 V)  
GND  
DSR  
CP  
10  
11  
12  
18  
20  
serial data shift-right input  
clock input (LOW to HIGH, edge-triggered)  
serial data shift-left input  
DSL  
VCC  
positive supply voltage  
6. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level; ↑ = LOW to HIGH CP transition; X = don’t care.  
Input  
MR  
L
Response  
S1  
X
S0  
X
CP  
X
asynchronous reset; Q0 to Q7 = LOW  
parallel load; I/On → Qn  
H
H
L
H
H
L
H
shift right; DSR → Q0, Q0 → Q1, etc.  
shift left; DSL → Q7, Q7 → Q6, etc.  
hold  
H
H
L
H
L
X
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
4 / 15  
 
 
 
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
7. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
IIK  
Parameter  
Conditions  
Min  
Max Unit  
supply voltage  
-0.5  
+7  
V
input clamping current  
output clamping current  
output current  
VI < -0.5 V or VI > VCC + 0.5 V  
VO < -0.5 V or VO > VCC + 0.5 V  
-0.5 V < VO < VCC + 0.5 V  
standard outputs  
[1]  
[1]  
-
-
±20  
±20  
mA  
mA  
IOK  
IO  
-
-
±25  
±35  
50  
70  
-
mA  
mA  
mA  
mA  
mA  
mA  
bus driver outputs  
ICC  
supply current  
ground current  
standard outputs  
-
bus driver outputs  
-
IGND  
standard outputs  
-50  
-70  
-65  
-
bus driver outputs  
-
Tstg  
Ptot  
storage temperature  
total power dissipation  
+150 °C  
500 mW  
Tamb = -40 °C to +125 °C  
[2]  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For SOT163-1 (SO20) package: Ptot derates linearly with 12.3 mW/K above 109 °C.  
8. Recommended operating conditions  
Table 5. Recommended operating conditions  
Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
Parameter  
Conditions  
Min  
Typ  
Max Unit  
supply voltage  
2.0  
5.0  
6.0  
V
V
V
VI  
input voltage  
0
0
-
VCC  
VCC  
VO  
output voltage  
-
Tamb  
Δt/ΔV  
ambient temperature  
input transition rise and fall rate  
-40  
-
-
+125 °C  
625 ns/V  
139 ns/V  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
-
1.67  
-
-
-
83  
ns/V  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
5 / 15  
 
 
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
9. Static characteristics  
Table 6. Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
-40 °C to  
+85 °C  
-40 °C to  
+125 °C  
Unit  
Min  
1.5  
3.15  
4.2  
-
Typ Max  
Min  
1.5  
Max  
Min  
1.5  
Max  
VIH  
HIGH-level input VCC = 2.0 V  
1.2  
2.4  
3.2  
0.8  
2.1  
2.8  
-
-
-
-
V
V
V
V
V
V
voltage  
VCC = 4.5 V  
3.15  
-
-
3.15  
-
-
VCC = 6.0 V  
-
4.2  
4.2  
VIL  
LOW-level input VCC = 2.0 V  
0.5  
1.35  
1.8  
-
-
-
0.5  
1.35  
1.8  
-
-
-
0.5  
1.35  
1.8  
voltage  
VCC = 4.5 V  
-
VCC = 6.0 V  
-
VOH  
HIGH-level output VI = VIH or VIL  
voltage  
all outputs  
IO = -20 μA; VCC = 2.0 V  
1.9  
4.4  
5.9  
2.0  
4.5  
6.0  
-
-
-
1.9  
4.4  
5.9  
-
-
-
1.9  
4.4  
5.9  
-
-
-
V
V
V
IO = -20 μA; VCC = 4.5 V  
IO = -20 μA; VCC = 6.0 V  
standard outputs  
IO = -4.0 mA; VCC = 4.5 V  
IO = -5.2 mA; VCC = 6.0 V  
bus driver outputs  
3.98 4.32  
5.48 5.81  
-
-
3.84  
5.34  
-
-
3.7  
5.2  
-
-
V
V
IO = -6.0 mA; VCC = 4.5 V  
IO = -7.8 mA; VCC = 6.0 V  
3.98 4.32  
5.48 5.81  
-
-
3.84  
5.34  
-
-
3.7  
5.2  
-
-
V
V
VOL  
LOW-level output VI = VIH or VIL  
voltage  
all outputs  
IO = 20 μA; VCC = 2.0 V  
-
-
-
0
0
0
0.1  
0.1  
0.1  
-
-
-
0.1  
0.1  
0.1  
-
-
-
0.1  
0.1  
0.1  
V
V
V
IO = 20 μA; VCC = 4.5 V  
IO = 20 μA; VCC = 6.0 V  
standard outputs  
IO = 4.0 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
bus driver outputs  
-
-
0.15 0.26  
0.16 0.26  
-
-
0.33  
0.33  
-
-
0.4  
0.4  
V
V
IO = 6.0 mA; VCC = 4.5 V  
IO = 7.8 mA; VCC = 6.0 V  
VI = VCC or GND; VCC = 6.0 V  
-
-
-
0.15 0.26  
0.16 0.26  
-
-
-
0.33  
0.33  
±1.0  
-
-
-
0.4  
0.4  
V
V
II  
input leakage  
current  
-
-
-
±0.1  
±0.5  
8.0  
±1.0 μA  
±10.0 μA  
160 μA  
IOZ  
ICC  
OFF-state output VI = VIH or VIL; VCC = 6.0 V;  
-
-
-
-
±5.0  
80  
-
-
current  
VO = VCC or GND  
supply current  
VI = VCC or GND; IO = 0 A;  
VCC = 6.0 V  
CI  
input capacitance  
-
-
3.5  
10  
-
-
-
-
-
-
-
-
-
-
pF  
pF  
CI/O  
input/output  
capacitance  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
6 / 15  
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
Symbol Parameter  
Conditions  
25 °C  
-40 °C to  
+85 °C  
-40 °C to  
+125 °C  
Unit  
Min  
Typ Max  
Min  
Max  
Min  
Max  
CPD  
power dissipation VI = GND to VCC  
capacitance  
[1]  
-
120  
-
-
-
-
-
pF  
[1] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD x VCC 2 x fi + ∑(CL x VCC 2 x fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
∑(CL x VCC 2 x fo) = sum of outputs.  
CL = output load capacitance in pF;  
VCC = supply voltage in V.  
10. Dynamic characteristics  
Table 7. Dynamic characteristics  
GND (ground = 0 V); for test circuit, see Fig. 10.  
Symbol Parameter  
Conditions  
25 °C  
-40 °C to  
+85 °C  
-40 °C to Unit  
+125 °C  
Min Typ Max Min Max Min Max  
tpd  
propagation delay  
CP to Q0, Q7; see Fig. 6  
VCC = 2.0 V  
[1]  
-
-
-
-
66  
24  
20  
19  
200  
40  
-
-
-
-
-
250  
50  
-
-
-
-
-
300 ns  
60 ns  
VCC = 4.5 V  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V  
-
ns  
34  
43  
51 ns  
CP to I/On; see Fig. 6  
VCC = 2.0 V  
-
-
-
-
66  
24  
20  
19  
200  
40  
-
-
-
-
-
250  
50  
-
-
-
-
-
300 ns  
60 ns  
VCC = 4.5 V  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V  
-
ns  
34  
43  
51 ns  
MR to Q0, Q7 or I/On;  
see Fig. 7  
[2]  
[3]  
VCC = 2.0 V  
VCC = 4.5 V  
-
-
-
-
66  
24  
20  
19  
200  
40  
-
-
-
-
-
250  
50  
-
-
-
-
-
300 ns  
60 ns  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V  
-
ns  
34  
43  
51 ns  
tt  
transition time  
bus driver (I/On); see Fig. 6  
VCC = 2.0 V  
-
-
-
14  
5
60  
12  
10  
-
-
-
75  
15  
13  
-
-
-
90 ns  
18 ns  
15 ns  
VCC = 4.5 V  
VCC = 6.0 V  
4
standard (Q0, Q7); see Fig. 6  
VCC = 2.0 V  
-
-
-
19  
7
75  
15  
13  
-
-
-
95  
19  
16  
-
-
-
110 ns  
22 ns  
19 ns  
VCC = 4.5 V  
VCC = 6.0 V  
6
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
7 / 15  
 
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
Symbol Parameter  
Conditions  
25 °C  
-40 °C to  
+85 °C  
-40 °C to Unit  
+125 °C  
Min Typ Max Min Max Min Max  
tW  
pulse width  
CP HIGH or LOW; see Fig. 6  
VCC = 2.0 V  
80  
16  
14  
17  
6
-
-
-
100  
20  
-
-
-
120  
24  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
5
17  
20  
MR LOW; see Fig. 7  
VCC = 2.0 V  
80  
16  
14  
19  
7
-
-
-
100  
20  
-
-
-
120  
24  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
6
17  
20  
tPZH  
tPZL  
tPHZ  
tPLZ  
trec  
OFF-state to HIGH OEn to I/On; see Fig. 9  
[4]  
propagation delay  
VCC = 2.0 V  
-
-
-
50  
18  
14  
155  
31  
-
-
-
195  
39  
-
-
-
235 ns  
47 ns  
40 ns  
VCC = 4.5 V  
VCC = 6.0 V  
26  
33  
OFF-state to LOW OEn to I/On; see Fig. 9  
propagation delay  
VCC = 2.0 V  
-
-
-
41  
15  
12  
130  
26  
-
-
-
165  
33  
-
-
-
195 ns  
39 ns  
33 ns  
VCC = 4.5 V  
VCC = 6.0 V  
22  
28  
HIGH to OFF-state OEn to I/On; see Fig. 9  
[5]  
propagation delay  
VCC = 2.0 V  
-
-
-
66  
24  
19  
185  
37  
-
-
-
230  
46  
-
-
-
280 ns  
56 ns  
48 ns  
VCC = 4.5 V  
VCC = 6.0 V  
31  
39  
LOW to OFF-state OEn to I/On; see Fig. 9  
propagation delay  
VCC = 2.0 V  
-
-
-
55  
20  
16  
155  
31  
-
-
-
195  
39  
-
-
-
235 ns  
47 ns  
40 ns  
VCC = 4.5 V  
VCC = 6.0 V  
26  
33  
recovery time  
set-up time  
MR to CP; see Fig. 7  
VCC = 2.0 V  
5
5
5
-14  
-5  
-
-
-
5
5
5
-
-
-
5
5
5
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
-4  
tsu  
DSR, DSL to CP; see Fig. 6  
VCC = 2.0 V  
100  
20  
33  
12  
10  
-
-
-
125  
25  
-
-
-
150  
30  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
17  
21  
26  
S0, S1 to CP; see Fig. 8  
VCC = 2.0 V  
100  
20  
33  
12  
10  
-
-
-
125  
25  
-
-
-
150  
30  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
17  
21  
26  
I/On to CP; see Fig. 6  
VCC = 2.0 V  
125  
25  
39  
14  
11  
-
-
-
155  
31  
-
-
-
190  
38  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
21  
26  
32  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
8 / 15  
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
Symbol Parameter  
Conditions  
25 °C  
-40 °C to  
+85 °C  
-40 °C to Unit  
+125 °C  
Min Typ Max Min Max Min Max  
th  
hold time  
I/On, DSR, DSL to CP;  
see Fig. 6  
VCC = 2.0 V  
VCC = 4.5 V  
0
0
0
-14  
-5  
-
-
-
0
0
0
-
-
-
0
0
0
-
-
-
ns  
ns  
ns  
VCC = 6.0 V  
-4  
S0, S1 to CP; see Fig. 8  
VCC = 2.0 V  
0
0
0
-28  
-10  
-8  
-
-
-
0
0
0
-
-
-
0
0
0
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
fmax  
maximum frequency CP input; see Fig. 6  
VCC = 2.0 V  
5.0  
25  
-
15  
45  
50  
54  
-
-
-
-
4.0  
20  
-
-
-
-
-
3.4  
17  
-
-
-
-
-
MHz  
MHz  
MHz  
MHz  
VCC = 4.5 V  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V  
29  
24  
20  
[1] tpd is the same as tPHL and tPLH  
.
[2] tpd is the same as tPHL  
[3] tt is the same as tTHL and tTLH  
[4] ten is the same as tPZH and tPZL  
.
.
.
[5] tdis is the same as tPHZ and tPLZ  
.
10.1. Waveforms and test circuit  
V
I
I/On, DSR, DSL  
inputs  
V
M
GND  
t
t
h
h
t
t
su  
su  
1/f  
max  
V
I
CP input  
GND  
V
M
t
W
t
t
PLH  
PHL  
V
OH  
I/On, Q0, Q7  
outputs  
V
M
V
OL  
t
t
TLH  
THL  
001aai462  
The shaded areas indicate when the input is permitted to change for predictable output performance.  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig. 6. Clock pulse to outputs I/On, Q0, Q7 propagation delays, the clock pulse width, the I/On, DSR and DSL to  
clock pulse set-up and hold times, the output transition times and the maximum clock frequency  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
9 / 15  
 
 
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
V
I
MR input  
GND  
V
M
t
W
t
rec  
V
I
V
CP input  
GND  
M
t
PHL  
V
OH  
I/On, Q0, Q7  
outputs  
V
M
V
OL  
001aai463  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig. 7. The master reset pulse width (LOW), the master reset to outputs I/On, Q0, Q7 propagation delays and the  
master reset to clock pulse removal time  
V
I
I/On, DSR, DSL, Sn  
inputs  
V
M
GND  
t
su  
t
t
t
h
h
su  
V
I
CP input  
V
M
GND  
001aai464  
Measurement points are given in Table 8.  
Fig. 8. Set-up and hold times from the mode control inputs S0, S1 to the clock pulse  
t
r
t
f
V
I
90 %  
OEn input  
V
M
10 %  
GND  
t
t
PZL  
PLZ  
V
OH  
I/On output  
LOW to OFF  
OFF to LOW  
V
M
10 %  
V
OL  
t
t
PZH  
PHZ  
V
OH  
90 %  
I/On output  
HIGH to OFF  
OFF to HIGH  
V
M
V
OL  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
001aai465  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig. 9. 3-state enable and disable times for OEn inputs  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
10 / 15  
 
 
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
Table 8. Measurement points  
Input  
Output  
VM  
VI  
VM  
VCC  
0.5VCC  
0.5VCC  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
V
CC  
CC  
V
I
V
O
R
L
S1  
G
open  
DUT  
R
T
C
L
001aad983  
Test data is given in Table 9.  
Definitions test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
RL = Load resistance.  
S1 = Test selection switch.  
Fig. 10. Test circuit for measuring switching times  
Table 9. Test data  
Input  
VI  
Load  
S1 position  
tPHL, tPLH  
open  
tr, tf  
CL  
RL  
tPZH, tPHZ  
tPZL, tPLZ  
VCC  
6 ns  
15 pF, 50 pF  
1 kΩ  
GND  
VCC  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
11 / 15  
 
 
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
11. Package outline  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
D
E
A
X
c
y
H
E
v
M
A
Z
20  
11  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
10  
w
detail X  
e
M
b
p
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
max.  
(1)  
(1)  
(1)  
UNIT  
mm  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3  
0.1  
2.45  
2.25  
0.49  
0.36  
0.32  
0.23  
13.0  
12.6  
7.6  
7.4  
10.65  
10.00  
1.1  
0.4  
1.1  
1.0  
0.9  
0.4  
2.65  
0.1  
0.25  
0.01  
1.27  
0.05  
1.4  
0.25 0.25  
0.1  
8o  
0o  
0.012 0.096  
0.004 0.089  
0.019 0.013 0.51  
0.014 0.009 0.49  
0.30  
0.29  
0.419  
0.394  
0.043 0.043  
0.016 0.039  
0.035  
0.016  
inches  
0.055  
0.01 0.01 0.004  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT163-1  
075E04  
MS-013  
Fig. 11. Package outline SOT163-1 (SO20)  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
12 / 15  
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
12. Abbreviations  
Table 10. Abbreviations  
Acronym  
Description  
CMOS  
DUT  
ESD  
HBM  
MM  
Complementary Metal Oxide Semiconductor  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Machine Model  
13. Revision history  
Table 11. Revision history  
Document ID  
Release date Data sheet status  
Change notice Supersedes  
74HC299 v.6  
Modifications:  
20210511  
Product data sheet  
-
74HC299 v.5  
Type number 74HC299DB (SOT339-1 / SSOP20) removed.  
Section 7: Derating values for Ptot total power dissipation updated.  
74HC299 v.5  
Modifications:  
20190117  
Product data sheet  
-
74HC299 v.4  
The format of this data sheet has been redesigned to comply with the identity  
guidelines of Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Type number 74HC299PW (SOT360-1) removed.  
74HC299 v.4  
Modifications:  
20160226  
Product data sheet  
-
74HC_HCT299 v.3  
Type numbers 74HC299N and 74HCT299N (SOT146-1) removed.  
Type number 74HCT299D (SOT163-1) removed.  
Type number 74HCT299DB (SOT339-1) removed.  
Type number 74HCT299PW (SOT360-1) removed.  
74HC_HCT299 v.3  
Modifications:  
20080728  
Product data sheet  
-
74HC_HCT299_CNV_2  
The format of this data sheet has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Section 3: Ordering information added  
Section 12: Package outline drawings added  
Section 9 "Static characteristics": Family data added  
Section 11 "Waveforms": Test circuit added  
74HC_HCT299_CNV v.2  
19970828  
Product specification  
-
-
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
13 / 15  
 
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
14. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
for the content in this document if provided by an information source outside  
of Nexperia.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified, the  
product is not suitable for automotive use. It is neither qualified nor tested in  
accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of non-automotive qualified  
products in automotive equipment or applications.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
Nexperia’s specifications such use shall be solely at customer’s own risk,  
and (c) customer fully indemnifies Nexperia for any liability, damages or failed  
product claims resulting from customer design and use of the product for  
automotive applications beyond Nexperia’s standard warranty and Nexperia’s  
product specifications.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Trademarks  
Suitability for use — Nexperia products are not designed, authorized or  
warranted to be suitable for use in life support, life-critical or safety-critical  
systems or equipment, nor in applications where failure or malfunction  
of an Nexperia product can reasonably be expected to result in personal  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
14 / 15  
 
Nexperia  
74HC299  
8-bit universal shift register; 3-state  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................1  
4. Functional diagram.......................................................2  
5. Pinning information......................................................4  
5.1. Pinning.........................................................................4  
5.2. Pin description.............................................................4  
6. Functional description................................................. 4  
7. Limiting values............................................................. 5  
8. Recommended operating conditions..........................5  
9. Static characteristics....................................................6  
10. Dynamic characteristics............................................ 7  
10.1. Waveforms and test circuit........................................ 9  
11. Package outline........................................................ 12  
12. Abbreviations............................................................13  
13. Revision history........................................................13  
14. Legal information......................................................14  
© Nexperia B.V. 2021. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 11 May 2021  
©
74HC299  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 6 — 11 May 2021  
15 / 15  

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