74HCT173D [NEXPERIA]
Quad D-type flip-flop; positive-edge trigger; 3-stateProduction;
| 型号： | 74HCT173D |
| 厂家： | 
Nexperia |
| 描述： | Quad D-type flip-flop; positive-edge trigger; 3-stateProduction |
| 文件： | 总17页 (文件大小：270K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
Rev. 4 — 25 January 2021
Product data sheet
1. General description
The 74HC173; 74HCT173 is a quad positive-edge triggered D-type flip-flop. The device features
clock (CP), master reset (MR), two input enable (E1, E2) and two output enable (OE1, OE2) inputs.
When the input enables are LOW, the outputs Qn will assume the state of their corresponding Dn
inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition.
A HIGH on either input enable will cause the device to go into a hold mode, outputs hold their
previous state independently of clock and data inputs. A HIGH on MR forces the outputs LOW
independently of clock and data inputs. A HIGH on either output enable pin causes the outputs to
assume a high-impedance OFF-state. Operation of the output enable inputs does not affect the
state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors
to interface inputs to voltages in excess of VCC
.
2. Features and benefits
•
•
Complies with JEDEC standard no. 7A
Input levels:
For 74HC173: CMOS level
For 74HCT173: TTL level
•
•
•
•
•
•
•
Gated input enable for hold (do nothing) mode
Gated output enable control mode
Edge-triggered D-type register
Asynchronous master reset
ESD protection:
•
•
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
•
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
Version
74HC173D
-40 °C to +125 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT173D
74HC173PW
-40 °C to +125 °C
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
4. Functional diagram
7 CP
14 D0
13 D1
12 D2
11 D3
Q0 3
Q1 4
Q2 5
Q3 6
FF1
to
FF4
&
&
9
10
7
C1
EN
1
14 13 12 11
D0 D1 D2 D3
2
9 E1
15
R
9
10
7
E1
10 E2
E2
14
13
12
11
3
4
5
6
CP
1D
15 MR
1
OE1
OE2
2
1 OE1
2 OE2
MR Q0 Q1 Q2 Q3
15
3
4
5
6
aaa-024783
aaa-024784
aaa-024785
Fig. 1. Functional diagram
Fig. 2. Logic symbol
Fig. 3. IEC logic symbol
D0
D1
D2
D3
E1
E2
FF
1
FF
2
FF
3
FF
4
D
Q
Q
D
Q
Q
D
Q
Q
D
Q
Q
CP
CP
CP
CP
CP
RD
RD
RD
RD
MR
OE1
OE2
Q0
Q1
Q2
Q3
aaa-024786
Fig. 4. Logic diagram
©
74HC_HCT173
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
2 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
5. Pinning information
5.1. Pinning
74HC173
74HCT173
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OE1
OE2
V
CC
74HC173
74HCT173
MR
D0
D1
D2
D3
E2
E1
Q0
Q1
OE1
OE2
Q0
1
2
3
4
5
6
7
8
16
15
V
CC
MR
14 D0
13 D1
12 D2
11 D3
10 E2
Q2
Q1
Q3
Q2
Q3
CP
CP
GND
GND
9 E1
aaa-024787
aaa-024788
Fig. 5. Pin configuration for SOT109-1 (SO16)
Fig. 6. Pin configuration for SOT403-1 (TSSOP16)
5.2. Pin description
Table 2. Pin description
Symbol
OE1, OE2
Q0, Q1, Q2, Q3
CP
Pin
Description
1, 2
output enable input (active LOW)
3-state flip-flop output
3, 4, 5, 6
7
clock input (LOW-to-HIGH, edge triggered)
ground (0 V)
GND
8
E1, E2
9, 10
data enable input (active LOW)
data input
D0, D1, D2, D3
MR
14, 13, 12, 11
15
16
asynchronous master reset (active HIGH)
supply voltage
VCC
©
74HC_HCT173
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
3 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
6. Functional description
Table 3. Function table
H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level; I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
qn = lower case letters indicate the state of the referenced input (or output) one set-up time prior to the LOW-to-HIGH
CP transition; X = don’t care; ↑ = LOW-to-HIGH clock transition.
Register operating mode
Inputs
Outputs
MR
H
L
CP
X
↑
E1
X
l
E2
X
l
Dn
X
I
Qn (register)
Reset (clear)
Parallel load
L
L
L
↑
l
l
h
H
qn
qn
Hold (do nothing)
L
X
X
h
X
X
h
X
X
L
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high impedance OFF-state.
3-state buffer operating mode Inputs
Qn (register)
Outputs
OE1
L
OE2
L
Q0
L
Q1
L
Q2
L
Q3
L
Read
L
H
X
X
L
L
H
Z
H
Z
H
Z
H
Z
Disabled
H
X
X
H
Z
Z
Z
Z
7. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+7.0
±20
±20
±35
+70
-
Unit
V
supply voltage
-0.5
input clamping current
output clamping current
output current
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
-0.5 V < VO < VCC + 0.5 V
-
mA
mA
mA
mA
mA
°C
IOK
-
-
IO
ICC
supply current
-
IGND
Tstg
Ptot
ground current
-70
-65
-
storage temperature
total power dissipation
+150
500
[1]
mW
[1] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
©
74HC_HCT173
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
4 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
8. Recommended operating conditions
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
74HC173
74HCT173
Unit
Min
Typ
Max
6.0
Min
Typ
Max
5.5
VCC
VI
supply voltage
input voltage
2.0
5.0
4.5
5.0
V
V
V
0
0
-
VCC
VCC
+125
625
139
83
0
0
-
VCC
VCC
VO
output voltage
ambient temperature
-
+25
-
-
+25
-
Tamb
Δt/ΔV
-40
-
-40
-
+125 °C
input transition rise and fall rate VCC = 2.0 V
-
ns/V
VCC = 4.5 V
VCC = 6.0 V
-
1.67
-
-
1.67
-
139 ns/V
-
-
-
ns/V
9. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
74HC173
VIH
HIGH-level
input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VI = VIH or VIL
1.5
1.2
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
3.15 2.4
3.15
3.15
4.2
3.2
0.8
-
4.2
-
4.2
-
VIL
LOW-level
input voltage
-
-
-
0.5
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
2.1 1.35
2.8
1.8
VOH
HIGH-level
output voltage
IO = -20 μA; VCC = 2.0 V
1.9
4.4
5.9
2.0
4.5
6.0
-
-
-
-
-
1.9
4.4
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
IO = -20 μA; VCC = 4.5 V
IO = -20 μA; VCC = 6.0 V
5.9
IO = -6.0 mA; VCC = 4.5 V 3.98 4.32
IO = -7.8 mA; VCC = 6.0 V 5.48 5.81
3.84
5.34
VOL
LOW-level
output voltage
VI = VIH or VIL
IO = 20 μA; VCC = 2.0 V
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
V
V
V
V
V
IO = 20 μA; VCC = 4.5 V
IO = 20 μA; VCC = 6.0 V
0.1
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
0.15 0.26
0.16 0.26
0.33
0.33
±1.0
II
input leakage
current
-
-
-
±0.1
±0.5
8
±1.0 μA
IOZ
ICC
OFF-state
VI = VIH or VIL; VCC = 6.0 V;
output current VO = VCC or GND
-
-
-
-
±5.0
80
-
-
±10
160
μA
μA
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
©
74HC_HCT173
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
5 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
Symbol Parameter
Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
CI
input
-
3.5
-
-
-
-
-
pF
capacitance
74HCT173
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = -20 μA
4.4
4.5
-
-
4.4
-
-
4.4
3.7
-
-
V
V
IO = -6.0 mA
3.98 4.32
3.84
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 μA
-
-
-
0
0.1
-
-
-
0.1
-
-
-
0.1
0.4
V
V
IO = 6.0 mA
0.16 0.26
0.33
±1.0
II
input leakage
current
VI = VCC or GND; VCC = 5.5 V
-
-
-
±0.1
±0.5
8.0
±1.0 μA
IOZ
ICC
ΔICC
OFF-state
VI = VIH or VIL; VCC = 5.5 V;
output current VO = VCC or GND
-
-
-
-
±5.0
80
-
-
±10
160
μA
μA
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
additional
supply current VI = VCC - 2.1 V;
other inputs at VCC or GND;
per input pin;
VCC = 4.5 V to 5.5 V; IO = 0 A
OE1, OE2
MR
-
-
-
-
-
-
50
60
40
25
180
216
144
90
-
-
-
-
-
-
225
270
180
112.5
450
-
-
-
-
-
-
-
245
294
196
μA
μA
μA
E1, E2
Dn
122.5 μA
CP
100 360
3.5
490
-
μA
pF
CI
input
-
capacitance
©
74HC_HCT173
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
6 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
10. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Fig. 11.
Symbol Parameter Conditions
74HC173
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tpd
propagation CP to Qn; see Fig. 7
[1]
delay
VCC = 2.0 V
VCC = 4.5 V
-
-
-
-
55
20
17
16
175
35
-
-
-
-
-
220
44
-
-
-
-
-
265
53
-
ns
ns
ns
ns
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
30
37
45
tPHL
HIGH
MR to Qn; see Fig. 8
VCC = 2.0 V
to LOW
propagation
delay
-
-
-
-
44
16
13
13
150
30
-
-
-
-
-
190
38
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
26
33
38
ten
tdis
tt
enable time OEn to Qn; see Fig. 9
VCC = 2.0 V
[2]
[3]
[4]
-
-
-
52
19
15
150
30
-
-
-
190
38
-
-
-
225
45
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
33
38
disable time OEn to Qn; see Fig. 9
VCC = 2.0 V
-
-
-
52
19
15
150
30
-
-
-
190
38
-
-
-
225
45
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
33
38
transition
time
see Fig. 7
VCC = 2.0 V
-
-
-
14
5
60
12
10
-
-
-
75
15
13
-
-
-
90
18
15
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
tW
pulse width CP HIGH or LOW; see Fig. 7
VCC = 2.0 V
80
16
14
14
5
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
17
20
MR HIGH; see Fig. 8
VCC = 2.0 V
80
16
14
14
5
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
17
20
trec
recovery
time
MR to CP; see Fig. 8
VCC = 2.0 V
60
12
10
-8
-3
-2
-
-
-
75
15
13
-
-
-
90
18
15
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
©
74HC_HCT173
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
7 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
Symbol Parameter Conditions
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tsu
set-up time En to CP; see Fig. 10
VCC = 2.0 V
VCC = 4.5 V
100
20
33
12
10
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
VCC = 6.0 V
17
21
26
Dn to CP; see Fig. 10
VCC = 2.0 V
60
12
10
17
6
-
-
-
75
15
13
-
-
-
90
18
15
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
5
th
hold time
En to CP; see Fig. 10
VCC = 2.0 V
0
0
0
-17
-6
-
-
-
0
0
0
-
-
-
0
0
0
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
-5
Dn to CP; see Fig. 10
VCC = 2.0 V
1
1
1
-11
-4
-
-
-
1
1
1
-
-
-
1
1
1
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
-3
fmax
maximum
frequency
CP; see Fig. 7
VCC = 2.0 V
6
30
-
26
80
88
95
20
-
-
-
-
-
4.8
24
-
-
-
-
-
-
4
20
-
-
-
-
-
-
MHz
MHz
MHz
MHz
pF
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
35
-
28
-
24
-
CPD
power
VI = GND to VCC; VCC = 5 V; [5]
dissipation fi = 1 MHz
capacitance
©
74HC_HCT173
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
8 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
Symbol Parameter Conditions
74HCT173
25 °C
-40 °C to +85 °C -40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tpd
propagation CP to Qn; see Fig. 7
[1]
delay
VCC = 4.5 V
-
-
20
17
40
-
-
-
50
-
-
-
60
-
ns
ns
VCC = 5.0 V; CL = 15 pF
MR to Qn; see Fig. 8
VCC = 4.5 V
tPHL
HIGH
to LOW
propagation
delay
-
-
20
17
37
-
-
-
46
-
-
-
56
-
ns
ns
VCC = 5.0 V; CL = 15 pF
ten
tdis
tt
enable time OEn to Qn; VCC = 4.5 V;
see Fig. 9
[2]
[3]
[4]
-
20
19
5
35
30
12
-
-
44
38
15
-
-
53
45
19
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
disable time OEn to Qn; VCC = 4.5 V;
see Fig. 9
-
-
-
transition
time
VCC = 4.5 V; see Fig. 7
-
-
-
tW
pulse width CP HIGH or LOW;
VCC = 4.5 V; see Fig. 7
16
15
12
22
12
0
7
20
19
15
28
15
0
24
22
18
33
18
0
MR HIGH; VCC = 4.5 V;
see Fig. 8
6
-
-
-
trec
tsu
recovery
time
MR to CP; VCC = 4.5 V;
see Fig. 8
-2
13
7
-
-
-
set-up time En to CP; VCC = 4.5 V;
see Fig. 10
-
-
-
Dn to CP; VCC = 4.5 V;
see Fig. 10
-
-
-
th
hold time
En to CP; VCC = 4.5 V;
see Fig. 10
-6
-3
-
-
-
Dn to CP; VCC = 4.5 V;
see Fig. 10
0
-
0
-
0
-
fmax
maximum
frequency
CP; see Fig. 7
VCC = 4.5 V
30
-
80
88
20
-
-
-
24
-
-
-
-
20
-
-
-
-
MHz
MHz
pF
VCC = 5.0 V; CL = 15 pF
VI = GND to VCC - 1.5 V;
CPD
power
[5]
-
-
-
dissipation VCC = 5 V; fi = 1 MHz
capacitance
[1] tpd is the same as tPHL and tPLH
[2] ten is the same as tPZH and tPZL
[3] tdis is the same as tPHZ and tPLZ
[4] tt is the same as tTHL and tTLH
.
.
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD x VCC 2 x fi × N + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL x VCC 2 x fo) = sum of outputs.
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74HC_HCT173
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
9 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
10.1. Waveforms and test circuit
1/f
max
V
I
CP input
GND
V
M
t
W
t
t
PLH
PHL
V
OH
90 %
90 %
Qn output
V
M
10 %
10 %
V
OL
t
t
TLH
THL
aaa-024789
Measurement points are given in Table 9.
Logic levels VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7. The clock (CP) to outputs (Qn) propagation delays, clock pulse width, output transition times and
maximum frequency
V
I
MR input
V
M
GND
t
rec
t
W
V
I
CP input
V
M
GND
t
PHL
V
OH
Qn output
V
M
V
OL
aaa-024790
Measurement points are given in Table 9.
Logic levels VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 8. The master reset (MR) pulse width, master reset to output (Qn) propagation delays, and the master reset
to clock (CP) recovery times
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74HC_HCT173
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
10 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
V
I
OEn input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
aaa-024791
Measurement points are given in Table 9.
Logic levels VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 9. 3-state enable and disable times
V
I
En input
V
M
GND
V
I
V
Dn input
M
GND
t
t
su
su
t
t
h
h
V
I
CP input
V
M
GND
aaa-024792
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 9.
Fig. 10. The data set-up and hold times from input (En, Dn) to clock (CP)
Table 9. Measurement points
Type
Input
VM
Output
VM
VX
VY
74HC173
0.5 x VCC
1.3 V
0.5 x VCC
1.3 V
0.1 x VCC
0.1 x VCC
0.9 x VCC
0.9 x VCC
74HCT173
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74HC_HCT173
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
11 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
I
V
O
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 10.
Test circuit definitions:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance.
S1 = Test selection switch
Fig. 11. Test circuit for measuring switching times
Table 10. Test data
Type
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
CL
RL
tPZH, tPHZ
GND
tPZL, tPLZ
VCC
74HC173
VCC
3 V
15 pF, 50 pF
15 pF, 50 pF
1 kΩ
1 kΩ
74HCT173
open
GND
VCC
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74HC_HCT173
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
12 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
11. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 12. Package outline SOT109-1 (SO16)
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74HC_HCT173
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
13 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 13. Package outline SOT403-1 (TSSOP16)
©
74HC_HCT173
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
14 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
12. Abbreviations
Table 11. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
Machine Model
HBM
MM
TTL
Transistor-Transistor Logic
13. Revision history
Table 12. Revision history
Document ID
Release date
20210125
Data sheet status
Change notice
Supersedes
74HC_HCT173 v.4
Modifications:
Product data sheet
-
74HC_HCT173 v.3
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Type numbers 74HC173DB and 74HCT173DB (SOT338-1/SSOP16) removed.
Section 7: Derating values for Ptot total power dissipation have been updated.
74HC_HCT173 v.3
Modifications:
20161108
Product data sheet
-
74HC_HCT173 v.2
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type numbers 74HCT173N and 74HC173N removed.
74HC_HCT173 v.2
19901201
Product specification
-
-
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74HC_HCT173
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Product data sheet
Rev. 4 — 25 January 2021
15 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
14. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
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or construed as an offer to sell products that is open for acceptance or the
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Export control — This document as well as the item(s) described herein
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Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
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Non-automotive qualified products — Unless this data sheet expressly
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accepts no liability for inclusion and/or use of non-automotive qualified
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In no event shall Nexperia be liable for any indirect, incidental, punitive,
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or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
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In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
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Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
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to information published in this document, including without limitation
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document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
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74HC_HCT173
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Product data sheet
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16 / 17
Nexperia
74HC173; 74HCT173
Quad D-type flip-flop; positive-edge trigger; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description.............................................................3
6. Functional description................................................. 4
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................5
9. Static characteristics....................................................5
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit...................................... 10
11. Package outline........................................................ 13
12. Abbreviations............................................................15
13. Revision history........................................................15
14. Legal information......................................................16
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 25 January 2021
©
74HC_HCT173
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 25 January 2021
17 / 17
相关型号：
74HCT173DB
IC HCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16, SOT-338-1, SSOP-16, FF/Latch
NXP
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