74HCT2G66DC [NEXPERIA]

Dual single-pole single-throw analog switchProduction;
74HCT2G66DC
型号: 74HCT2G66DC
厂家: Nexperia    Nexperia
描述:

Dual single-pole single-throw analog switchProduction

光电二极管 输出元件
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74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
Rev. 11 — 6 November 2018  
Product data sheet  
1. General description  
The 74HC2G66; 74HCT2G66 is a dual single pole, single-throw analog switch. Each switch has  
two input/output terminals (nY and nZ) and a digital enable input (nE). When nE is LOW, the analog  
switch is turned off. Inputs include clamp diodes. This enables the use of current limiting resistors  
to interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
Wide supply voltage range from 2.0 V to 10.0 V for 74HC2G66  
Very low ON resistance:  
41 Ω (typ.) at VCC = 4.5 V  
30 Ω (typ.) at VCC = 6.0 V  
21 Ω (typ.) at VCC = 9.0 V  
High noise immunity  
Low power dissipation  
25 mA continuous switch current  
Multiple package options  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range  
-40 °C to +125 °C  
Name  
Description  
Version  
74HC2G66DP  
74HCT2G66DP  
74HC2G66DC  
74HCT2G66DC  
74HC2G66GT  
74HCT2G66GT  
TSSOP8  
plastic thin shrink small outline package;  
8 leads; body width 3 mm; lead length 0.5 mm  
SOT505-2  
-40 °C to +125 °C  
-40 °C to +125 °C  
VSSOP8  
XSON8  
plastic very thin shrink small outline package;  
8 leads; body width 2.3 mm  
SOT765-1  
SOT833-1  
plastic extremely thin small outline package;  
no leads; 8 terminals; body 1 × 1.95 × 0.5 mm  
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
4. Marking  
Table 2. Marking codes  
Type number  
Marking [1]  
74HC2G66DP  
74HCT2G66DP  
74HC2G66DC  
74HCT2G66DC  
74HC2G66GT  
74HCT2G66GT  
H66  
T66  
H66  
T66  
H66  
T66  
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.  
5. Functional diagram  
1Y  
1E  
2Z  
1Z  
2Y  
Y
Z
2E  
E
001aag497  
001aah372  
Fig. 1. Logic symbol  
Fig. 2. Logic diagram for 1 switch  
6. Pinning information  
6.1. Pinning  
74HC2G66  
74HCT2G66  
1Y  
1Z  
1
2
3
4
8
7
6
5
V
CC  
74HC2G66  
74HCT2G66  
1E  
2Z  
2Y  
1
2
3
4
8
7
6
5
1Y  
1Z  
V
CC  
2E  
1E  
2Z  
2Y  
2E  
GND  
GND  
001aam498  
Transparent top view  
001aai699  
Fig. 3. Pin configuration SOT505-2 (TSSOP8) and  
SOT765-1 (VSSOP8)  
Fig. 4. Pin configuration SOT833-1 (XSON8)  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
2 / 19  
 
 
 
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
6.2. Pin description  
Table 3. Pin description  
Symbol  
Pin  
1, 5  
2, 6  
4
Description  
1Y, 2Y  
1Z, 2Z  
GND  
independent input or output  
independent input or output  
ground (0 V)  
1E, 2E  
VCC  
7, 3  
8
enable input (active HIGH)  
supply voltage  
7. Functional description  
Table 4. Function table  
H = HIGH voltage level; L = LOW voltage level.  
Input nE  
Switch  
OFF  
L
H
ON  
8. Limiting values  
Table 5. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Max  
+11.0  
±20  
±20  
±20  
30  
Unit  
V
VCC  
IIK  
supply voltage  
-0.5  
input clamping current  
switch clamping current  
switch current  
VI < -0.5 V or VI > VCC + 0.5 V  
VI < -0.5 V or VI > VCC + 0.5 V  
VSW > -0.5 V or VSW < VCC + 0.5 V  
[1]  
[1]  
-
-
mA  
mA  
mA  
mA  
mA  
°C  
ISK  
ISW  
ICC  
IGND  
Tstg  
Ptot  
-
supply current  
-
ground current  
-30  
-65  
-
storage temperature  
total power dissipation  
+150  
Tamb = -40 °C to +125 °C  
per package  
[2]  
[2]  
-
-
300  
100  
mW  
mW  
per switch  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For TSSOP8 packages: above 55 °C the value of Ptot derates linearly with 2.5 mW/K.  
For VSSOP8 packages: above 110 °C the value of Ptot derates linearly with 8.0 mW/K.  
For XSON8 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
3 / 19  
 
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
9. Recommended operating conditions  
Table 6. Recommended operating conditions  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
74HC2G66  
74HCT2G66  
Unit  
Min  
Typ  
Max  
10.0  
VCC  
VCC  
VCC  
+125  
625  
139  
83  
Min  
Typ  
Max  
5.5  
VCC  
VI  
supply voltage  
2.0  
5.0  
4.5  
5.0  
V
V
V
V
input voltage  
0
0
0
-40  
-
-
0
0
0
-40  
-
-
VCC  
VCC  
VCC  
VO  
output voltage  
-
-
VSW  
Tamb  
Δt/ΔV  
switch voltage  
[1]  
-
-
ambient temperature  
input transition rise and fall rate  
+25  
+25  
+125 °C  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 10.0 V  
-
-
-
ns/V  
-
1.67  
-
1.67  
139 ns/V  
-
-
-
-
-
-
-
-
ns/V  
ns/V  
-
35  
-
[1] To avoid drawing VCC current out of pin nZ, when switch current flows in pin nY, the voltage drop across the bidirectional switch must  
not exceed 0.4 V. If the switch current flows into pin nZ, no VCC current will flow out of terminal nY. In this case there is no limit for the  
voltage drop across the switch, but the voltage at pins nY and nZ may not exceed VCC or GND.  
10. Static characteristics  
Table 7. Static characteristics  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min Typ [1] Max  
Min  
Max  
74HC2G66  
VIH  
VIL  
II  
HIGH-level input voltage  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 9.0 V  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 9.0 V  
nE; VI = VCC or GND  
VCC = 6.0 V  
VCC = 9.0 V  
1.5  
1.2  
2.4  
3.2  
4.7  
0.8  
2.1  
2.8  
4.3  
-
-
1.5  
-
-
V
V
V
V
V
V
V
V
3.15  
3.15  
4.2  
-
4.2  
-
6.3  
-
6.3  
-
LOW-level input voltage  
input leakage current  
-
-
-
-
0.5  
1.35  
1.8  
2.7  
-
-
-
-
0.5  
1.35  
1.8  
2.7  
-
-
-
-
-
±0.1  
±0.2  
1.0  
-
-
-
-
±0.1 μA  
±0.2 μA  
-
IS(OFF) OFF-state leakage current nY or nZ; VCC = 9.0 V; see Fig. 5  
IS(ON) ON-state leakage current nY or nZ; VCC = 9.0 V; see Fig. 6  
ICC  
0.1  
0.1  
1.0  
1.0  
μA  
μA  
1.0  
supply current  
nE, nY and nZ = VCC or GND  
VCC = 6.0 V  
-
-
-
-
10  
20  
-
-
20  
40  
μA  
μA  
VCC = 9.0 V  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
4 / 19  
 
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min Typ [1] Max  
Min  
Max  
CI  
input capacitance  
-
-
3.5  
9
-
-
-
-
-
-
pF  
pF  
CPD  
power dissipation  
capacitance  
CS(ON) ON-state capacitance  
-
8
-
-
-
pF  
74HCT2G66  
VIH  
VIL  
II  
HIGH-level input voltage  
LOW-level input voltage  
input leakage current  
VCC = 4.5 V to 5.5 V  
2.0  
1.6  
1.2  
-
-
2.0  
-
V
V
VCC = 4.5 V to 5.5 V  
-
-
-
-
-
0.8  
±1.0  
1.0  
1.0  
10  
-
-
-
-
-
0.8  
nE; VI = VCC or GND; VCC = 5.5 V  
±1.0 μA  
IS(OFF) OFF-state leakage current nY or nZ; VCC = 5.5 V; see Fig. 5  
IS(ON) ON-state leakage current nY or nZ; VCC = 5.5 V; see Fig. 6  
ICC  
0.1  
0.1  
-
1.0  
1.0  
20  
μA  
μA  
μA  
supply current  
nE, nY and nZ = VCC or GND;  
VCC = 4.5 V to 5.5 V  
ΔICC  
additional supply current  
input capacitance  
nE = VCC - 2.1 V; IO = 0 A;  
VCC = 4.5 V to 5.5 V;  
-
-
375  
-
410  
μA  
CI  
-
-
3.5  
9
-
-
-
-
-
-
pF  
pF  
CPD  
power dissipation  
capacitance  
CS(ON) ON-state capacitance  
-
8
-
-
-
pF  
[1] Typical values are measured at Tamb = 25 °C.  
10.1. Test circuits  
V
V
CC  
CC  
nE  
nY  
nE  
nY  
V
V
IH  
IL  
nZ  
nZ  
I
I
S
I
S
S
GND  
GND  
V
I
V
O
V
I
V
O
001aaj465  
001aaj466  
VI = VCC or GND and VO = GND or VCC  
.
VI = VCC or GND and VO = open circuit.  
Fig. 5. Test circuit for measuring OFF-state leakage  
current  
Fig. 6. Test circuit for measuring ON-state leakage  
current  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
5 / 19  
 
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
10.2. ON resistance  
Table 8. ON resistance for 74HC2G66 and 74HCT2G66  
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graph see Fig. 8.  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min Typ [1] Max  
Min  
Max  
74HC2G66 [2]  
RON(peak) ON resistance  
(peak)  
VI = GND to VCC; see Fig. 7 and Fig. 8  
ISW = 0.1 mA; VCC = 2.0 V  
ISW = 1.0 mA; VCC = 4.5 V  
ISW = 1.0 mA; VCC = 6.0 V  
ISW = 1.0 mA; VCC = 9.0 V  
-
-
-
-
250  
41  
-
-
-
-
-
-
Ω
Ω
Ω
Ω
118  
105  
88  
142  
126  
105  
30  
21  
RON(rail) ON resistance (rail) VI = GND; see Fig. 7 and Fig. 8  
ISW = 0.1 mA; VCC = 2.0 V  
-
-
-
-
65  
28  
22  
18  
-
-
-
-
-
-
Ω
Ω
Ω
Ω
ISW = 1.0 mA; VCC = 4.5 V  
95  
82  
70  
115  
100  
80  
ISW = 1.0 mA; VCC = 6.0 V  
ISW = 1.0 mA; VCC = 9.0 V  
VI = VCC; see Fig. 7 and Fig. 8  
ISW = 0.1 mA; VCC = 2.0 V  
-
-
-
-
65  
31  
23  
19  
-
-
-
-
-
-
Ω
Ω
Ω
Ω
ISW = 1.0 mA; VCC = 4.5 V  
106  
94  
78  
128  
113  
95  
ISW = 1.0 mA; VCC = 6.0 V  
ISW = 1.0 mA; VCC = 9.0 V  
ΔRON  
ON resistance  
mismatch  
between channels  
VI = VCC to GND; see Fig. 7 and Fig. 8  
VCC = 4.5 V  
-
-
-
5
4
3
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
VCC = 6.0 V  
VCC = 9.0 V  
74HCT2G66  
RON(peak) ON resistance  
(peak)  
VI = GND to VCC; see Fig. 7 and Fig. 8  
ISW = 1.0 mA; VCC = 4.5 V  
-
-
-
-
41  
28  
31  
5
118  
95  
106  
-
-
-
-
-
142  
115  
128  
-
Ω
Ω
Ω
Ω
RON(rail) ON resistance (rail) VI = GND; see Fig. 7 and Fig. 8  
ISW = 1.0 mA; VCC = 4.5 V  
VI = VCC; see Fig. 7 and Fig. 8  
ISW = 1.0 mA; VCC = 4.5 V  
ΔRON  
ON resistance  
mismatch between  
channels  
VI = VCC to GND; see Fig. 7 and Fig. 8  
VCC = 4.5 V  
[1] Typical values are measured at Tamb = 25 °C.  
[2] At supply voltages approaching 2 V, the ON resistance becomes extremely non-linear. Therefore it is recommended that these devices  
be used to transmit digital signals only, when using this supply voltage.  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
6 / 19  
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
10.3. ON resistance test circuit and graphs  
mnb006  
60  
R
ON  
(Ω)  
V
= 4.5 V  
V
CC  
SW  
40  
V
CC  
V
V
= 6.0 V  
= 9.0 V  
CC  
CC  
nE  
nY  
V
IH  
20  
0
nZ  
GND  
V
I
I
SW  
0
2
4
6
8
10  
V (V)  
I
001aaj467  
Tamb = 25 °C.  
RON = VSW / ISW  
.
Fig. 8. Typical ON resistance as a function of input  
voltage  
Fig. 7. Test circuit for measuring ON resistance  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
7 / 19  
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
11. Dynamic characteristics  
Table 9. Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); For test circuit see Fig. 11.  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ [1]  
Max  
Min  
Max  
74HC2G66  
tpd  
propagation delay  
nY to nZ or nZ to nY; RL = ∞ Ω; [2]  
see Fig. 9  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 9.0 V  
-
-
-
-
6.5  
2
65  
13  
11  
10  
-
-
-
-
80  
15  
14  
12  
ns  
ns  
ns  
ns  
1.5  
1.2  
ten  
enable time  
disable time  
nE to nY or nZ; see Fig. 10  
VCC = 2.0 V  
[2]  
[2]  
[3]  
-
-
-
-
40  
12  
10  
7
125  
29  
-
-
-
-
150  
30  
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
21  
26  
VCC = 9.0 V  
16  
20  
tdis  
nE to nY or nZ; see Fig. 10  
VCC = 2.0 V  
-
-
-
-
-
21  
12  
11  
10  
9
145  
29  
28  
23  
-
-
-
-
-
-
175  
35  
33  
27  
-
ns  
ns  
ns  
ns  
pF  
VCC = 4.5 V  
VCC = 6.0 V  
VCC = 9.0 V  
CPD  
power dissipation  
capacitance  
VI = GND to VCC  
74HCT2G66  
tpd  
propagation delay  
nY to nZ or nZ to nY; RL = ∞ Ω; [2]  
VCC = 4.5 V; see Fig. 9  
-
-
-
-
2
13  
13  
9
15  
30  
44  
-
-
-
-
-
18  
36  
53  
-
ns  
ns  
ns  
pF  
ten  
enable time  
disable time  
nE to nY or nZ; VCC = 4.5;  
see Fig. 10  
[2]  
[2]  
[3]  
tdis  
CPD  
nE to nY or nZ; VCC = 4.5 V;  
see Fig. 10  
power dissipation  
capacitance  
VI = GND to VCC - 1.5 V  
[1] All typical values are measured at Tamb = 25 °C.  
[2] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
.
.
.
[3] CPD is used to determine the dynamic power dissipation PD (μW).  
PD = CPD × VCC2 × fi + Σ((CL × CSW) × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
CSW = maximum switch capacitance in pF (see Table 7);  
VCC = supply voltage in volts;  
Σ((CL × CSW) × VCC2 × fo) = sum of outputs.  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
8 / 19  
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
11.1. Waveforms and test circuit  
V
I
nY or nZ  
input  
V
V
M
M
GND  
t
t
PLH  
PHL  
V
OH  
nZ or nY  
output  
V
V
M
M
V
OL  
001aaa541  
Measurement points are given in Table 10.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 9. Input (nY or nZ) to output (nZ or nY) propagation delays  
V
I
nE input  
V
M
GND  
t
t
PZL  
PLZ  
V
CC  
output  
nY or nZ  
nY or nZ  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
switch  
enabled  
switch  
enabled  
switch  
disabled  
001aaa542  
Measurement points are given in Table 10.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 10. Enable and disable times  
Table 10. Measurement points  
Type  
Input  
VM  
Output  
VM  
VX  
VY  
74HC2G66  
0.5VCC  
1.3 V  
0.5VCC  
1.3 V  
VOL + 10 %  
VOL + 10 %  
VOH - 10 %  
VOH - 10 %  
74HCT2G66  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
9 / 19  
 
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
V
CC  
CC  
V
I
V
O
R
L
S1  
G
open  
DUT  
R
T
C
L
001aad983  
Test data is given in Table 11.  
Definitions for test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
RL = Load resistance.  
S1 = Test selection switch.  
Fig. 11. Test circuit for measuring switching times  
Table 11. Test data  
Type  
Input  
VI  
Load  
CL  
S1 position  
tPHL, tPLH  
open  
tr, tf [1]  
RL  
tPZH, tPHZ  
GND  
tPZL, tPLZ  
VCC  
74HC2G66  
GND to VCC 6 ns  
GND to 3 V 6 ns  
50 pF  
50 pF  
1 kΩ  
1 kΩ  
74HCT2G66  
open  
GND  
VCC  
[1] There is no constraint on tr, tf with a 50 % duty factor when measuring fmax  
.
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
10 / 19  
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
11.2. Additional dynamic characteristics  
Table 12. Additional dynamic characteristics for 74HC2G66 and 74HCT2G66  
GND = 0 V; tr = tf = 6.0 ns; CL = 50 pF; unless otherwise specified. All typical values are measured at Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
THD  
total harmonic distortion fi = 1 kHz; RL = 10 kΩ; see Fig. 12  
VCC = 4.5 V; VI = 4.0 V (p-p)  
-
-
0.04  
0.02  
-
-
%
%
VCC = 9.0 V; VI = 8.0 V (p-p)  
fi = 10 kHz; RL = 10 kΩ; see Fig. 12  
VCC = 4.5 V; VI = 4.0 V (p-p)  
-
-
0.12  
0.06  
-
-
%
%
VCC = 9.0 V; VI = 8.0 V (p-p)  
f(-3dB)  
-3 dB frequency response RL = 50 Ω; CL = 10 pF; see Fig. 13 and Fig. 14  
VCC = 4.5 V  
-
-
180  
200  
-
-
MHz  
MHz  
VCC = 9.0 V  
αiso  
isolation (OFF-state)  
crosstalk voltage  
RL = 600 Ω; fi = 1 MHz; see Fig. 15 and Fig. 16  
VCC = 4.5 V  
VCC = 9.0 V  
-
-
-50  
-50  
-
-
dB  
dB  
Vct  
between digital input and switch (peak to peak  
value); RL = 600 Ω; fi = 1 MHz; see Fig. 17  
VCC = 4.5 V  
VCC = 9.0 V  
-
-
110  
220  
-
-
mV  
mV  
Xtalk  
crosstalk  
between switches; RL = 600 Ω; fi = 1 MHz;  
see Fig. 18  
VCC = 4.5 V  
VCC = 9.0 V  
-
-
-60  
-60  
-
-
dB  
dB  
11.3. Test circuits and graphs  
V
V
CC  
CC  
nE  
V
IH  
2R  
L
0.1 µF  
nY/nZ  
nZ/nY  
V
V
V
CC  
CC  
O
nE  
f
i
2R  
L
C
L
dB  
V
IH  
2R  
L
10 µF  
nY/nZ  
nZ/nY  
V
O
001aaj469  
f
i
2R  
L
C
L
D
With fi = 1 MHz adjust the switch input voltage for  
a 0 dBm level at the switch output, (0 dBm = 1 mW  
into 50 Ω). Then Increase the input frequency until  
the dB meter reads -3 dB.  
001aaj468  
Fig. 12. Test circuit for measuring total harmonic  
distortion  
Fig. 13. Test circuit for measuring the -3 dB frequency  
response  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
11 / 19  
 
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
mna083  
5
(dB)  
0
- 5  
10  
2
3
4
5
6
10  
10  
10  
10  
10  
f (kHz)  
i
Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ.  
Fig. 14. Typical -3 dB frequency response  
V
V
CC  
CC  
nE  
V
IL  
2R  
L
0.1 µF  
nY/nZ  
nZ/nY  
V
O
f
i
C
L
2R  
L
dB  
001aaj470  
Adjust the switch input voltage for a 0 dBm level (0 dBm = 1 mW into 600 Ω)  
Fig. 15. Test circuit for measuring isolation (OFF-state)  
mna082  
0
(dB)  
- 20  
- 40  
- 60  
- 80  
- 100  
2
3
4
5
6
10  
10  
10  
10  
10  
10  
f (kHz)  
i
Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ.  
Fig. 16. Typical isolation (OFF-state) as a function of frequency  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
12 / 19  
 
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
V
nE  
V
CC  
CC  
V
CC  
GND  
2R  
2R  
L
L
nY/nZ  
nZ/nY  
DUT  
2R  
L
2R  
L
C
L
oscilloscope  
GND  
mnb011  
a. Circuit  
V(p- p)  
mnb012  
b. Crosstalk voltage  
Adjust the switch input voltage for a 0 dBm level (0 dBm = 1 mW into 600 Ω)  
Fig. 17. Test circuit for measuring crosstalk voltage (between the digital input and the switch)  
V
CC  
1E  
V
IH  
2R  
L
0.1 µF  
R
L
1Y or 1Z  
1Z or 1Y  
CHANNEL  
ON  
f
V
i
V
O1  
2R  
L
C
L
2E  
V
IL  
V
CC  
V
CC  
2R  
L
L
2R  
L
2Y or 2Z  
2Z or 2Y  
CHANNEL  
OFF  
V
2R  
L
2R  
C
L
V
O2  
001aai846  
Adjust the switch input voltage for a 0 dBm level (0 dBm = 1 mW into 600 Ω)  
Fig. 18. Test circuit for measuring crosstalk (between the switches)  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
13 / 19  
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
12. Package outline  
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm  
SOT505-2  
D
E
A
X
c
H
v
M
y
A
E
Z
5
8
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
detail X  
1
4
e
w
M
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT  
v
w
y
Z
θ
1
2
3
p
max.  
0.15  
0.00  
0.95  
0.75  
0.38  
0.22  
0.18  
0.08  
3.1  
2.9  
3.1  
2.9  
4.1  
3.9  
0.47  
0.33  
0.70  
0.35  
8°  
0°  
mm  
1.1  
0.65  
0.5  
0.2  
0.13  
0.1  
0.25  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-01-16  
SOT505-2  
- - -  
Fig. 19. Package outline SOT505-2 (TSSOP8)  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
14 / 19  
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm  
SOT765-1  
D
E
A
X
c
y
H
E
v
A
Z
5
8
Q
A
2
A
A
(A )  
3
1
pin 1 index  
θ
L
p
detail X  
1
4
L
e
w
b
p
0
5 mm  
scale  
Dimensions (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
Unit  
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.  
max  
mm nom  
min  
0.15 0.85  
0.00 0.60  
0.27 0.23 2.1 2.4  
0.17 0.08 1.9 2.2  
3.2  
3.0  
0.40 0.21  
0.15 0.19  
0.4  
8°  
0°  
1
0.12  
0.5  
0.4  
0.2 0.08 0.1  
0.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
sot765-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
07-06-02  
16-05-31  
SOT765-1  
MO-187  
Fig. 20. Package outline SOT765-1 (VSSOP8)  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
15 / 19  
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm  
SOT833-1  
b
1
2
3
4
4×  
(2)  
L
L
1
e
8
7
6
5
e
e
e
1
1
1
8×  
(2)  
A
A
1
D
E
terminal 1  
index area  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
A
1
UNIT  
b
D
E
e
e
1
L
L
1
max max  
0.25  
0.17  
2.0  
1.9  
1.05  
0.95  
0.35 0.40  
0.27 0.32  
mm  
0.5 0.04  
0.6  
0.5  
Notes  
1. Including plating thickness.  
2. Can be visible in some manufacturing processes.  
REFERENCES  
JEDEC JEITA  
OUTLINE  
VERSION  
EUROPEAN  
PROJECTION  
ISSUE DATE  
IEC  
07-11-14  
07-12-07  
SOT833-1  
- - -  
- - -  
MO-252  
Fig. 21. Package outline SOT833-1 (XSON8)  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
16 / 19  
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
13. Abbreviations  
Table 13. Abbreviations  
Acronym  
Description  
DUT  
ESD  
HBM  
MM  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Machine Model  
14. Revision history  
Table 14. Revision history  
Document ID  
Release date  
20181106  
Data sheet status  
Change notice Supersedes  
74HC_HCT2G66 v.11  
Modifications:  
Product data sheet  
-
74HC_HCT2G66 v.10  
The format of this data sheet has been redesigned to comply with the identity guidelines  
of Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Type numbers 74HC2G66GD and 74HCT2G66GD (SOT996-2) removed.  
Corrected Fig. 2  
Package outline drawing SOT765-1 updated  
74HC_HCT2G66 v.10  
Modifications:  
20131003  
Product data sheet  
-
74HC_HCT2G66 v.9  
For type numbers 74HC2G66GD and 74HCT2G66GD XSON8U has changed to  
XSON8.  
74HC_HCT2G66 v.9  
74HC_HCT2G66 v.8  
74HC_HCT2G66 v.7  
74HC_HCT2G66 v.6  
74HC_HCT2G66 v.5  
74HC_HCT2G66 v.4  
74HC_HCT2G66 v.3  
74HC_HCT2G66 v.2  
74HC_HCT2G66 v.1  
20111213  
20100923  
20100914  
20100402  
20090126  
20040519  
20031126  
20030808  
20030625  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product specification  
Product specification  
Product specification  
Product specification  
-
-
-
-
-
-
-
-
-
74HC_HCT2G66 v.8  
74HC_HCT2G66 v.7  
74HC_HCT2G66 v.6  
74HC_HCT2G66 v.5  
74HC_HCT2G66 v.4  
74HC_HCT2G66 v.3  
74HC_HCT2G66 v.2  
74HC_HCT2G66 v.1  
-
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
17 / 19  
 
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
15. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
for the content in this document if provided by an information source outside  
of Nexperia.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified, the  
product is not suitable for automotive use. It is neither qualified nor tested in  
accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of non-automotive qualified  
products in automotive equipment or applications.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
Nexperia’s specifications such use shall be solely at customer’s own risk,  
and (c) customer fully indemnifies Nexperia for any liability, damages or failed  
product claims resulting from customer design and use of the product for  
automotive applications beyond Nexperia’s standard warranty and Nexperia’s  
product specifications.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Trademarks  
Suitability for use — Nexperia products are not designed, authorized or  
warranted to be suitable for use in life support, life-critical or safety-critical  
systems or equipment, nor in applications where failure or malfunction  
of an Nexperia product can reasonably be expected to result in personal  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
18 / 19  
 
Nexperia  
74HC2G66; 74HCT2G66  
Dual single-pole single-throw analog switch  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................1  
4. Marking..........................................................................2  
5. Functional diagram.......................................................2  
6. Pinning information......................................................2  
6.1. Pinning.........................................................................2  
6.2. Pin description.............................................................3  
7. Functional description................................................. 3  
8. Limiting values............................................................. 3  
9. Recommended operating conditions..........................4  
10. Static characteristics..................................................4  
10.1. Test circuits................................................................5  
10.2. ON resistance............................................................6  
10.3. ON resistance test circuit and graphs........................7  
11. Dynamic characteristics.............................................8  
11.1. Waveforms and test circuit........................................ 9  
11.2. Additional dynamic characteristics...........................11  
11.3. Test circuits and graphs...........................................11  
12. Package outline........................................................ 14  
13. Abbreviations............................................................17  
14. Revision history........................................................17  
15. Legal information......................................................18  
© Nexperia B.V. 2018. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 6 November 2018  
©
74HC_HCT2G66  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2018. All rights reserved  
Product data sheet  
Rev. 11 — 6 November 2018  
19 / 19  

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NXP

74HCT2G66DP-G

Bilateral switches - Description: Dual PicoGate Bilateral Switch; TTL Enabled ; Logic switching levels: TTL ; Number of pins: 8 ; On resistance: 28 Ohms; Power dissipation considerations: Low Power ; Propagation delay: 2 ns; Voltage: 4.5-5.5 V
NXP

74HCT2G66DP-Q100

Dual single-pole single-throw analog switchProduction
NEXPERIA

74HCT2G66GD

Dual single-pole single-throw analog switch
NXP

74HCT2G66GD,125

74HC(T)2G66 - Dual single-pole single-throw analog switch SON 8-Pin
NXP

74HCT2G66GT

IC DUAL 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT833-1, SON-8, Multiplexer or Switch
NXP