74LV164PW [NEXPERIA]
8-bit serial-in/parallel-out shift registerProduction;型号: | 74LV164PW |
厂家: | Nexperia |
描述: | 8-bit serial-in/parallel-out shift registerProduction 光电二极管 逻辑集成电路 触发器 |
文件: | 总15页 (文件大小:255K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74LV164
8-bit serial-in/parallel-out shift register
Rev. 6 — 15 September 2021
Product data sheet
1. General description
The 74LV164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data
inputs (DSA and DSB), eight parallel outputs (Q0 to Q7). Data is entered serially through DSA or
DSB and either input can be used as an active HIGH enable for data entry through the other input.
Data is shifted on the LOW-to-HIGH transition of the clock input (CP). A LOW on the master reset
input (MR) clears the register and forces all outputs LOW, independently of other inputs.
Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to
voltages in excess VCC
.
2. Features and benefits
•
Wide supply voltage range from 1.0 V to 5.5 V
•
CMOS low power dissipation
•
•
•
•
•
•
•
•
Optimized for low-voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical VOLP (output ground bounce): < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
Typical VOHV (output VOH undershoot): > 2 V at VCC = 3.3 V and Tamb = 25 °C
Gated serial data inputs
Asynchronous master reset
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
•
•
•
•
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
•
•
ESD protection:
•
•
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +80 °C and from -40 °C to +125 °C.
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
Version
74LV164D
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LV164PW
74LV164BQ
TSSOP14
DHVQFN14
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
SOT762-1
plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
4. Functional diagram
SRG8
8
C1/
9
R
1
3
&
1D
2
4
5
3
4
5
6
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
DSA
1
6
2
DSB
10
11
12
13
10
11
12
13
CP
8
9
MR
001aac423
001aac424
Fig. 1. Logic symbol
Fig. 2. IEC logic symbol
1
2
DSA
DSB
8-BIT SERIAL- IN/PARALLEL- OUT
SHIFT REGISTER
8
9
CP
MR
3
4
5
6
10 11 12 13
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
001aac425
Fig. 3. Functional diagram
5. Pinning information
5.1. Pinning
74LV164
terminal 1
index area
2
3
4
5
6
13
DSB
Q0
Q7
Q6
Q5
Q4
MR
12
11
10
9
74LV164
Q1
(1)
Q2
V
CC
1
2
3
4
5
6
7
14
V
DSA
DSB
Q0
CC
Q3
13
12
11
10
9
Q7
Q6
Q5
Q4
MR
CP
Q1
001aac429
Q2
Transparent top view
Q3
(1) This is not a supply pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
GND
8
001aac422
connected to VCC
.
Fig. 4. Pin configuration SOT108-1 (SO14) and
SOT402-1 (TSSOP14)
Fig. 5. Pin configuration SOT762-1 (DHVQFN14)
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
2 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
5.2. Pin description
Table 2. Pin description
Symbol
Pin
1
Description
DSA
DSB
Q0
data input SA
2
data input SB
3
output 0
Q1
4
output 1
Q2
5
output 2
Q3
6
output 3
GND
CP
7
ground (0 V)
8
clock input (edge triggered LOW-to-HIGH)
MR
Q4
9
master reset input (active LOW)
10
11
12
13
14
output 4
Q5
output 5
Q6
output 6
Q7
output 7
VCC
supply voltage
6. Functional description
Table 3. Function table
H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
q = lower case letter indicates the state of referenced input one set-up time prior to the LOW-to-HIGH CP transition;
↑ = LOW-to-HIGH clock transition.
Operating mode
Input
MR
L
Output
CP
X
↑
DSA
DSB
Q0
L
Q1 to Q7
L to L
Reset (clear)
Shift
X
l
X
l
H
L
q0 to q6
q0 to q6
q0 to q6
q0 to q6
H
↑
l
h
l
L
H
↑
h
h
L
H
↑
h
H
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
3 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max Unit
supply voltage
-0.5
+7.0
±20
±50
±25
50
V
input clamping current
output clamping current
output current
VI < -0.5 V or VI > VCC + 0.5 V
VO < -0.5 V or VO > VCC + 0.5 V
VO = -0.5 V to (VCC + 0.5 V)
[1]
[1]
-
mA
mA
mA
mA
mA
IOK
-
-
IO
ICC
supply current
-
IGND
Tstg
Ptot
ground current
-50
-65
-
-
storage temperature
total power dissipation
+150 °C
500 mW
Tamb = -40 °C to +125 °C
[2]
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C.
For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.
For SOT762-1 (DHVQFN14) package: Ptot derates linearly with 9.6 mW/K above 98 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
V
VCC
VI
supply voltage
[1]
1.0
3.3
5.5
VCC
VCC
+125
500
200
100
50
input voltage
0
-
V
VO
output voltage
0
-
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
-40
+25
°C
VCC = 1.0 V to 2.0 V
VCC = 2.0 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 5.5 V
-
-
-
-
-
-
-
-
ns/V
ns/V
ns/V
ns/V
[1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to
VCC = 1.0 V (with input levels GND or VCC).
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
4 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
9. Static characteristics
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
VIH
HIGH-level input voltage
VCC = 1.2 V
0.9
-
-
-
-
-
-
-
-
-
0.9
-
V
V
V
V
V
V
V
V
VCC = 2.0 V
1.4
-
-
1.4
-
-
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.2 V
2.0
2.0
0.7VCC
-
0.7VCC
-
VIL
LOW-level input voltage
-
-
-
-
0.3
0.6
0.8
0.3VCC
-
-
-
-
0.3
0.6
0.8
0.3VCC
VCC = 2.0 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
VOH
HIGH-level output voltage VI = VIH or VIL
IO = -100 μA; VCC = 1.2 V
-
1.2
2.0
2.7
3.0
4.5
2.82
4.2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
IO = -100 μA; VCC = 2.0 V
IO = -100 μA; VCC = 2.7 V
IO = -100 μA; VCC = 3.0 V
IO = -100 μA; VCC = 4.5 V
IO = -6 mA; VCC = 3.0 V
IO = -12 mA; VCC = 4.5 V
1.8
2.5
2.8
4.3
2.4
3.6
1.8
2.5
2.8
4.3
2.2
3.5
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 100 μA; VCC = 1.2 V
IO = 100 μA; VCC = 2.0 V
IO = 100 μA; VCC = 2.7 V
IO = 100 μA; VCC = 3.0 V
IO = 100 μA; VCC = 4.5 V
IO = 6 mA; VCC = 3.0 V
-
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
-
-
-
V
0
0.2
0.2
0.2
0.2
0.2
0.50
0.65
1.0
160
V
0
0.2
V
0
0.2
V
0
0.25
0.35
-
0.2
V
0.40
0.55
1.0
V
IO = 12 mA; VCC = 4.5 V
VI = VCC or GND; VCC = 5.5 V
V
II
input leakage current
supply current
μA
μA
ICC
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
20.0
ΔICC
CI
additional supply current
input capacitance
per input; VI = VCC - 0.6 V;
VCC = 2.7 V to 3.6 V
-
-
-
500
-
-
-
850
-
μA
pF
3.5
[1] Typical values are measured at Tamb = 25 °C.
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
5 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
10. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Fig. 9.
Symbol Parameter
Conditions
-40 °C to +85 °C
Min Typ[1] Max
-40 °C to +125 °C
Unit
Min
Max
tpd
propagation delay CP to Qn; see Fig. 6
VCC = 1.2 V
[2]
-
-
-
-
-
-
75
26
19
12
14
12
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
39
29
-
49
36
-
VCC = 2.7 V
VCC = 3.3 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
[3]
[3]
23
19
29
24
tPHL
HIGH to LOW
propagation delay
MR to Qn; see Fig. 7
VCC = 1.2 V
-
-
-
-
-
-
75
26
19
12
14
12
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
39
29
-
49
36
-
VCC = 2.7 V
VCC = 3.3 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
CP; see Fig. 6
[3]
[3]
23
19
29
24
tW
pulse width
VCC = 2.0 V
34
25
20
13
9
6
5
4
-
-
-
-
41
30
24
16
-
-
-
-
ns
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
MR; Fig. 7
[3]
[3]
VCC = 2.0 V
34
25
20
13
10
8
-
-
-
-
41
30
24
16
-
-
-
-
ns
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
MR to CP; see Fig. 7
VCC = 1.2 V
[3]
[3]
6
5
trec
recovery time
-
30
10
8
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
VCC = 2.0 V
19
14
11
8
24
18
14
10
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
Dn to CP; see Fig. 8
VCC = 1.2 V
[3]
[3]
6
5
tsu
set-up time
-
15
5
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
VCC = 2.0 V
22
16
13
9
26
19
15
10
VCC = 2.7 V
4
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
[3]
[3]
3
2
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
6 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
Symbol Parameter
Conditions
-40 °C to +85 °C
Min Typ[1] Max
-40 °C to +125 °C
Unit
Min
Max
th
hold time
Dn to CP; see Fig. 8
VCC = 1.2 V
-
-10
-3
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
VCC = 2.0 V
5
5
5
5
5
5
5
5
VCC = 2.7 V
-2
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
see Fig. 6
[3]
[3]
-2
-1
fmax
maximum
frequency
VCC = 2.0 V
14
19
-
40
58
-
-
-
-
-
-
12
16
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
pF
VCC = 2.7 V
VCC = 3.3 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
78
[3]
[3]
[4]
24
36
-
70
20
30
-
100
40
CPD
power dissipation VCC = 3.3 V; CL = 50 pF;
capacitance fi = 1 MHz; VI = GND to VCC
[1] All typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL
.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi x N + Σ(CL x VCC 2 x fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
N = number of inputs switching
Σ(CL x VCC 2 x fo) = sum of the outputs.
10.1. Waveforms and test circuit
1/f
max
V
I
CP input
V
M
GND
t
W
t
t
PHL
PLH
V
OH
V
Qn output
M
001aac426
V
OL
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. Propagation delay clock (CP) to output (Qn), clock pulse width and maximum clock frequency
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
7 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
V
I
V
MR input
M
GND
t
t
rec
W
V
I
CP input
V
M
GND
t
PHL
V
OH
V
Qn output
M
V
OL
001aac427
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7. Pulse width master reset (MR), propagation delay master reset (MR) to output (Qn) and the master reset
(MR) to clock (CP) recovery time
V
I
V
CP input
M
GND
t
t
su
su
t
t
h
h
V
I
V
Dn input
M
GND
V
OH
V
Qn output
M
V
OL
001aac428
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig. 8. Data set-up and hold times inputs (Dn) to clock (CP)
Table 8. Measurement points
Supply voltage
VCC
Input
Output
VM
VM
1.2 V
0.5 x VCC
0.5 x VCC
1.5 V
0.5 x VCC
0.5 x VCC
1.5 V
2.0 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
1.5 V
0.5 x VCC
0.5 x VCC
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
8 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
V
CC
V
V
O
I
PULSE
GENERATOR
DUT
C
50 pF
R
L
1 kΩ
L
R
T
001aaa663
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig. 9. Test circuit for measuring switching times
Table 9. Test data
Supply voltage
VCC
Input
VI
Load
Test
tr , tf
CL
RL
1.2 V
VCC
VCC
2.7 V
2.7 V
VCC
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
50 pF
50 pF
50 pF
50 pF, 15 pF
50 pF
1 kΩ
1 kΩ
1 kΩ
1 kΩ
1 kΩ
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
2.0 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
9 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
11. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
v
c
y
H
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Fig. 10. Package outline SOT108-1 (SO14)
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
10 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
7
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.72
0.38
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT402-1
MO-153
Fig. 11. Package outline SOT402-1 (TSSOP14)
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
11 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
B
A
E
D
A
A
1
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
v
w
C
C
A B
y
y
C
1
e
b
2
6
L
1
7
8
E
h
e
14
k
13
9
D
h
X
k
0
2
4 mm
w
scale
Dimensions (mm are the original dimensions)
(1) (1)
(1)
Unit
A
A
b
c
D
D
h
E
E
e
e
k
L
v
y
y
1
1
h
1
max
nom
min
1
0.05 0.30
0.02 0.25 0.2 3.0 1.50 2.5 1.00 0.5
0.00 0.18 2.9 1.35 2.4 0.85
3.1 1.65 2.6 1.15
0.5
0.4 0.1 0.05 0.05 0.1
0.2 0.3
mm
2
Note
sot762-1_po
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
References
Outline
version
European
projection
Issue date
IEC
JEDEC
JEITA
15-04-10
15-05-05
SOT762-1
MO-241
Fig. 12. Package outline SOT762-1 (DHVQFN14)
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
12 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
12. Abbreviations
Table 10. Abbreviations
Acronym
CDM
CMOS
DUT
Description
Charged Device Model
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID
74LV164 v.6
Modifications:
Release date
20210915
Data sheet status
Change notice
Supersedes
Product data sheet
-
74LV164 v.5
•
•
Type number 74LV164DB (SOT337-1/SSPO14) removed.
Section 1 and Section 2 updated.
74LV164 v.5
20200915
Product data sheet
-
74LV164 v.4
Modifications:
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Section 2 updated.
Table 4: Derating values for Ptot total power dissipation have been updated.
74LV164 v.4
20151209
Type number 74LV164N (SOT27-1) removed.
20050204 Product data sheet
Product data sheet
-
74LV164 v.3
Modifications:
•
74LV164 v.3
-
74LV164 v.2
Modifications:
•
The format of this data sheet has been redesigned to comply with the current presentation
and information standard of Philips Semiconductors
•
Added: type number 74LV164BQ (DHVQFN14 package).
74LV164 v.2
74LV164 v.1
19980507
19970328
Product specification
Product specification
-
74LV164 v.1
-
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
13 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
14. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
14 / 15
Nexperia
74LV164
8-bit serial-in/parallel-out shift register
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning.........................................................................2
5.2. Pin description.............................................................3
6. Functional description................................................. 3
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................4
9. Static characteristics....................................................5
10. Dynamic characteristics............................................ 6
10.1. Waveforms and test circuit........................................ 7
11. Package outline........................................................ 10
12. Abbreviations............................................................13
13. Revision history........................................................13
14. Legal information......................................................14
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 15 September 2021
©
74LV164
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 15 September 2021
15 / 15
相关型号:
74LV164PWDH-T
IC LV/LV-A/LVX/H SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO14, Shift Register
NXP
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