74LV4051D [NEXPERIA]

8-channel analog multiplexer/demultiplexerProduction;
74LV4051D
型号: 74LV4051D
厂家: Nexperia    Nexperia
描述:

8-channel analog multiplexer/demultiplexerProduction

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74LV4051  
8-channel analog multiplexer/demultiplexer  
Rev. 8 — 16 July 2021  
Product data sheet  
1. General description  
The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with three digital select inputs  
(S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and  
a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin and function  
compatible with 74HC4051 and 74HCT4051. With E LOW, one of the eight switches is selected  
(low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance  
OFF-state, independent of S0 to S2.  
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). The VCC  
to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and Z) can swing between  
VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6.0 V. For operation  
as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).  
2. Features and benefits  
Optimized for low-voltage applications: 1.0 V to 6.0 V  
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  
Low ON resistance:  
145 Ω (typical) at VCC - VEE = 2.0 V  
80 Ω (typical) at VCC - VEE = 3.0 V  
60 Ω (typical) at VCC - VEE = 4.5 V  
Logic level translation:  
To enable 3 V logic to communicate with ±3 V analog signals  
Typical ‘break before make’ built in  
ESD protection:  
HBM JESD22-A114E exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LV4051D  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
SO16  
plastic small outline package; 16 leads;  
body width 3.9 mm  
SOT109-1  
74LV4051PW  
74LV4051BQ  
TSSOP16  
plastic thin shrink small outline package; 16 leads;  
body width 4.4 mm  
SOT403-1  
SOT763-1  
DHVQFN16 plastic dual in-line compatible thermal enhanced  
very thin quad flat package; no leads; 16 terminals;  
body 2.5 × 3.5 × 0.85 mm  
 
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
4. Functional diagram  
V
CC  
16  
13 Y0  
14 Y1  
15 Y2  
12 Y3  
S0 11  
S1 10  
LOGIC  
LEVEL  
CONVERSION  
1
5
2
4
3
Y4  
Y5  
Y6  
Y7  
Z
1-OF-8  
DECODER  
S2 9  
E
6
8
7
GND  
V
001aad543  
EE  
Fig. 1. Functional diagram  
11  
10  
9
0
2
0
7
8 X  
6
G8  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
13  
14  
15  
12  
1
S0  
11  
MUX/DMUX  
13  
14  
15  
12  
1
0
S1  
10  
1
2
3
4
5
6
S2  
9
3
5
5
2
2
E
6
4
3
4
7
Z
001aad541  
001aad542  
Fig. 2. Logic symbol  
Fig. 3. IEC logic symbol  
©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
2 / 20  
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
Y
V
V
EE  
CC  
V
CC  
V
CC  
V
V
EE  
CC  
V
EE  
Z
from  
logic  
001aad544  
Fig. 4. Schematic diagram (one switch)  
5. Pinning information  
5.1. Pinning  
74LV4051  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Y4  
Y6  
Z
V
CC  
Y2  
Y1  
Y0  
Y3  
S0  
S1  
S2  
74LV4051  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Y4  
Y6  
Z
V
CC  
Y2  
Y1  
Y0  
Y3  
S0  
S1  
S2  
Y7  
Y5  
E
Y7  
Y5  
E
V
EE  
V
EE  
GND  
GND  
aaa-029146  
001aak407  
Fig. 5. Pin configuration SOT109-1 (SO16)  
Fig. 6. Pin configuration SOT403-1 (TSSOP16)  
74LV4051  
terminal 1  
index area  
2
3
4
5
6
7
15  
14  
13  
12  
11  
10  
Y6  
Y2  
Y1  
Y0  
Y3  
S0  
S1  
Z
Y7  
Y5  
E
(1)  
CC  
V
V
EE  
001aak408  
Transparent top view  
(1) This is not a supply pin. There is no electrical or mechanical requirement to solder the pad. In case soldered,  
the solder land should remain floating or connected to VCC  
.
Fig. 7. Pin configuration SOT763-1 (DHVQFN16)  
©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
3 / 20  
 
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
5.2. Pin description  
Table 2. Pin description  
Symbol  
Pin  
Description  
E
6
enable input (active LOW)  
supply voltage  
VEE  
7
GND  
8
ground supply voltage  
select input  
S0, S1, S2  
11, 10, 9  
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7  
13, 14, 15, 12, 1, 5, 2, 4  
independent input or output  
common output or input  
supply voltage  
Z
3
VCC  
16  
6. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level; X = don’t care.  
Input  
Channel ON  
E
L
L
L
L
L
L
L
L
H
S2  
L
S1  
L
S0  
L
Y0 to Z  
Y1 to Z  
Y2 to Z  
Y3 to Z  
Y4 to Z  
Y5 to Z  
Y6 to Z  
Y7 to Z  
switches off  
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
X
L
H
L
H
H
X
H
X
7. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND = 0 V.  
Symbol Parameter  
Conditions  
Min  
Max  
+7.0  
±20  
±20  
±25  
Unit  
V
VCC  
IIK  
supply voltage  
[1]  
[2]  
[2]  
[2]  
-0.5  
input clamping current  
switch clamping current  
switch current  
VI < -0.5 V or VI > VCC + 0.5 V  
-
-
-
mA  
mA  
mA  
ISK  
ISW  
VSW < -0.5 V or VSW > VCC + 0.5 V  
VSW > -0.5 V or VSW < VCC + 0.5 V;  
source or sink current  
Tstg  
Ptot  
storage temperature  
total power dissipation  
-65  
-
+150  
500  
°C  
Tamb = -40 °C to +125 °C  
[3]  
mW  
[1] To avoid drawing VCC current out of terminal Z, when switch current flows into terminals Yn, the voltage drop across the bidirectional  
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn, and in this case  
there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE  
[2] The minimum input voltage rating may be exceeded if the input current rating is observed.  
[3] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.  
.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.  
For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C.  
©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
4 / 20  
 
 
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
8. Recommended operating conditions  
Table 5. Recommended operating conditions  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
6
Unit  
V
VCC  
VI  
supply voltage  
see Fig. 8  
[1]  
1
0
3.3  
input voltage  
-
-
-
-
-
-
VCC  
VCC  
V
VSW  
Tamb  
Δt/ΔV  
switch voltage  
0
V
ambient temperature  
input transition rise and fall rate  
in free air  
-40  
-
+125 °C  
VCC = 1.0 V to 2.0 V  
VCC = 2.0 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
500  
200  
100  
ns/V  
-
ns/V  
ns/V  
-
[1] The static characteristics are guaranteed from VCC = 1.2 V to 6.0 V, but LV devices are guaranteed to function down to VCC = 1.0 V  
(with input levels GND or VCC).  
001aak344  
8.0  
V
- GND  
CC  
(V)  
6.0  
4.0  
2.0  
0
operating area  
0
2.0  
4.0  
6.0  
CC  
8.0  
- V (V)  
V
EE  
Fig. 8. Guaranteed operating area as a function of the supply voltages  
9. Static characteristics  
Table 6. Static characteristics  
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ[1]  
Max  
Min  
Max  
VIH  
HIGH-level input voltage  
VCC = 1.2 V  
0.9  
-
-
-
-
-
-
-
-
-
-
-
-
0.9  
-
-
V
V
V
V
V
V
V
V
V
V
VCC = 2.0 V  
1.4  
1.4  
VCC = 2.7 V to 3.6 V  
VCC = 4.5 V  
2.0  
-
2.0  
-
3.15  
-
3.15  
-
VCC = 6.0 V  
4.20  
-
4.20  
-
VIL  
LOW-level input voltage  
VCC = 1.2 V  
-
-
-
-
-
0.3  
0.6  
0.8  
1.35  
1.80  
-
-
-
-
-
0.3  
0.6  
0.8  
1.35  
1.80  
VCC = 2.0 V  
VCC = 2.7 V to 3.6 V  
VCC = 4.5 V  
VCC = 6.0 V  
©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
5 / 20  
 
 
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ[1]  
Max  
Min  
Max  
II  
input leakage current  
VI = VCC or GND  
VCC = 3.6 V  
-
-
-
-
1.0  
2.0  
-
-
1.0  
2.0  
μA  
μA  
VCC = 6.0 V  
IS(OFF) OFF-state leakage current VI = VIH or VIL; see Fig. 9  
VCC = 3.6 V  
VCC = 6.0 V  
-
-
-
-
1.0  
2.0  
-
-
1.0  
2.0  
μA  
μA  
IS(ON)  
ON-state leakage current  
supply current  
VI = VIH or VIL; see Fig. 10  
VCC = 3.6 V  
-
-
-
-
1.0  
2.0  
-
-
1.0  
2.0  
μA  
μA  
VCC = 6.0 V  
ICC  
VI = VCC or GND; IO = 0 A  
VCC = 3.6 V  
-
-
-
-
-
-
20  
40  
-
-
-
40  
80  
μA  
μA  
μA  
VCC = 6.0 V  
ΔICC  
additional supply current  
per input; VI = VCC - 0.6 V;  
VCC = 2.7 V to 3.6 V  
500  
850  
CI  
input capacitance  
switch capacitance  
-
-
-
3.5  
5
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
Csw  
independent pins Yn  
common pin Z  
25  
[1] Typical values are measured at Tamb = 25 °C.  
9.1. Test circuits  
V
CC  
V
CC  
S0 to S2  
V
or V  
S0 to S2  
IH  
IL  
V
or V  
IH  
IL  
Z
E
Yn  
Z
Yn  
I
S
E
I
I
S
S
GND = V  
EE  
GND = V  
EE  
V
GND  
CC  
V
V
I
V
V
O
O
I
001aak409  
001aak410  
VI = VCC or VEE and VO = VEE or VCC  
.
VI = VCC or VEE and VO = open circuit.  
Fig. 9. Test circuit for measuring OFF-state leakage  
current  
Fig. 10. Test circuit for measuring ON-state leakage  
current  
©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
6 / 20  
 
 
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
9.2. ON resistance  
Table 7. ON resistance  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit and graph see Fig. 11  
and Fig. 12.  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ [1]  
Max  
Min  
Max  
RON(peak) ON resistance VI = 0 V to VCC - VEE  
(peak)  
VCC = 1.2 V; ISW = 100 μA  
[2]  
[2]  
[2]  
[2]  
-
-
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
Ω
VCC = 2.0 V; ISW = 1000 μA  
VCC = 2.7 V; ISW = 1000 μA  
145  
90  
80  
325  
200  
180  
375  
235  
210  
VCC = 3.0 V to 3.6 V;  
ISW = 1000 μA  
VCC = 4.5 V; ISW = 1000 μA  
VCC = 6.0 V; ISW = 1000 μA  
-
-
60  
55  
135  
125  
-
-
160  
145  
Ω
Ω
ΔRON  
ON resistance VI = 0 V to VCC - VEE  
mismatch  
between  
channels  
VCC = 1.2 V; ISW = 100 μA  
VCC = 2.0 V; ISW = 1000 μA  
VCC = 2.7 V; ISW = 1000 μA  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
Ω
5
4
4
VCC = 3.0 V to 3.6 V;  
ISW = 1000 μA  
VCC = 4.5 V; ISW = 1000 μA  
VCC = 6.0 V; ISW = 1000 μA  
-
-
3
2
-
-
-
-
-
-
Ω
Ω
RON(rail) ON resistance VI = GND  
(rail)  
VCC = 1.2 V; ISW = 100 μA  
-
-
-
-
225  
110  
70  
-
-
-
-
-
-
Ω
Ω
Ω
Ω
VCC = 2.0 V; ISW = 1000 μA  
VCC = 2.7 V; ISW = 1000 μA  
235  
145  
130  
270  
165  
150  
VCC = 3.0 V to 3.6 V;  
ISW = 1000 μA  
60  
VCC = 4.5 V; ISW = 1000 μA  
VCC = 6.0 V; ISW = 1000 μA  
-
-
45  
40  
100  
85  
-
-
115  
100  
Ω
Ω
RON(rail) ON resistance VI = VCC - VEE  
(rail)  
VCC = 1.2 V; ISW = 100 μA  
VCC = 2.0 V; ISW = 1000 μA  
VCC = 2.7 V; ISW = 1000 μA  
-
-
-
-
250  
120  
75  
-
-
-
-
-
-
Ω
Ω
Ω
Ω
320  
195  
175  
370  
225  
205  
VCC = 3.0 V to 3.6 V;  
ISW = 1000 μA  
70  
VCC = 4.5 V; ISW = 1000 μA  
VCC = 6.0 V; ISW = 1000 μA  
-
-
50  
45  
130  
120  
-
-
150  
135  
Ω
Ω
[1] All typical values are measured at nominal VCC and at Tamb = 25 °C.  
[2] When supply voltages (VCC - VEE) near 1.2 V the analog switch ON resistance becomes extremely non-linear.  
When using a supply of 1.2 V, it is recommended to use these devices only for transmitting digital signals.  
©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
7 / 20  
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
9.3. On resistance test circuit and graph  
001aak412  
180  
R
ON  
V
= 2.0 V  
CC  
(Ω)  
120  
60  
0
V
V
V
SW  
CC  
V
= 3.0 V  
CC  
S0 to S2  
V
or V  
IL  
IH  
V
= 4.5 V  
CC  
Z
E
Yn  
GND = V  
EE  
GND  
I
V
I
SW  
0
1.2  
2.4  
3.6  
4.8  
V (V)  
I
001aak411  
RON = VSW / ISW  
.
VI = 0 V to VCC - VEE  
Fig. 12. Typical RON as a function of input voltage  
Fig. 11. Test circuit for measuring RON  
10. Dynamic characteristics  
Table 8. Dynamic characteristics  
Voltages are referenced to GND (GND = VEE = 0 V). For test circuit see Fig. 15.  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ [1]  
Max  
Min  
Max  
tpd  
propagation  
delay  
Yn to Z, Z to Yn; see Fig. 13  
VCC = 1.2 V  
[2]  
-
-
-
-
-
-
25  
9
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 2.0 V  
17  
13  
10  
9
20  
15  
12  
10  
8
VCC = 2.7 V  
6
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V  
5
4
VCC = 6.0 V  
3
8
©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
8 / 20  
 
 
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ [1]  
Max  
Min  
Max  
ten  
enable time  
E to Yn, Z; see Fig. 14  
VCC = 1.2 V  
[2]  
[2]  
[2]  
[2]  
[3]  
-
-
-
-
-
-
-
145  
49  
36  
23  
28  
25  
19  
-
-
-
-
-
-
-
-
-
112  
83  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 2.0 V  
94  
69  
-
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V; CL = 15 pF  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V  
55  
47  
38  
66  
56  
43  
VCC = 6.0 V  
Sn to Yn; see Fig. 14  
VCC = 1.2 V  
-
-
-
-
-
-
-
140  
48  
35  
22  
27  
24  
18  
-
-
-
-
-
-
-
-
-
107  
79  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 2.0 V  
90  
66  
-
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V; CL = 15 pF  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V  
53  
45  
34  
63  
54  
41  
VCC = 6.0 V  
tdis  
disable time  
E to Yn, Z; see Fig. 14  
VCC = 1.2 V  
-
-
-
-
-
-
-
145  
51  
38  
25  
30  
29  
21  
-
-
-
-
-
-
-
-
-
110  
82  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 2.0 V  
93  
69  
-
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V; CL = 15 pF  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V  
56  
48  
37  
66  
56  
44  
VCC = 6.0 V  
Sn to Yn; see Fig. 14  
VCC = 1.2 V  
-
-
-
-
-
-
-
-
115  
41  
31  
20  
24  
22  
17  
25  
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
pF  
VCC = 2.0 V  
73  
54  
-
90  
67  
-
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V; CL = 15 pF  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V  
44  
37  
29  
-
54  
46  
36  
-
VCC = 6.0 V  
CPD  
power dissipation CL = 50 pF; fi = 1 MHz;  
capacitance VI = GND to VCC  
[1] All typical values are measured at nominal VCC and at Tamb = 25 °C.  
[2] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
.
.
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC 2 × fi × N + Σ((CL + CSW) × VCC 2 × fo) where:  
fi = input frequency in MHz, fo = output frequency in MHz  
CL = output load capacitance in pF  
CSW = maximum switch capacitance in pF;  
VCC = supply voltage in Volts  
N = number of inputs switching  
Σ(CL × VCC 2 × fo) = sum of the outputs.  
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74LV4051  
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Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
9 / 20  
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
10.1. Waveforms and test circuit  
V
CC  
Yn or Z  
input  
V
M
V
V
EE  
t
t
PLH  
PHL  
V
O
Z or Yn  
output  
V
M
EE  
001aak418  
Measurement points are given in Table 9.  
VEE and VO are typical voltage output levels that occur with the output load.  
Fig. 13. Propagation delay input (Yn or Z) to output (Z or Yn)  
V
CC  
Sn, E input  
V
M
GND  
t
t
PLZ  
PZL  
V
O
V
Y
Yn or Z output  
LOW-to-OFF  
OFF-to-LOW  
V
X
V
V
EE  
t
t
PHZ  
PZH  
V
O
V
Y
Yn or Z output  
HIGH-to-OFF  
OFF-to-HIGH  
V
X
EE  
switch ON  
switch OFF  
switch ON  
001aak419  
Measurement points are given in Table 9.  
VEE and VO are typical voltage output levels that occur with the output load.  
Fig. 14. Enable and disable times  
Table 9. Measurement points  
Supply voltage  
VCC  
Input  
VM  
Output  
VM  
VX  
VY  
< 2.7 V  
0.5VCC  
1.5 V  
0.5VCC  
0.5VCC  
1.5 V  
VEE + 0.1VCC  
VEE + 0.3 V  
VO - 0.1VCC  
VO - 0.3 V  
VO - 0.1VCC  
2.7 V to 3.6 V  
> 3.6 V  
0.5VCC  
VEE + 0.1VCC  
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Product data sheet  
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10 / 20  
 
 
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
V
EE  
001aak353  
Test data is given in Table 10.  
Definitions for test circuit:  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
VEXT = External voltage for measuring switching times.  
Fig. 15. Test circuit for measuring switching times  
Table 10. Test data  
Supply voltage  
VCC  
Input  
VI  
Load  
CL  
VEXT  
tr, tf  
RL  
tPHL, tPLH  
open  
tPZH, tPHZ  
VEE  
tPZL, tPLZ  
2VCC  
< 2.7 V  
VCC  
2.7 V  
VCC  
≤ 6 ns  
≤ 6 ns  
≤ 6 ns  
50 pF  
1 kΩ  
2.7 V to 3.6 V  
> 3.6 V  
15 pF, 50 pF 1 kΩ  
50 pF 1 kΩ  
open  
VEE  
2VCC  
open  
VEE  
2VCC  
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Product data sheet  
Rev. 8 — 16 July 2021  
11 / 20  
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
10.2. Additional dynamic parameters  
Table 11. Additional dynamic characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V);  
VI = GND or VCC (unless otherwise specified); tr = tf ≤ 6.0 ns; Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
THD  
total harmonic  
distortion  
fi = 1 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 20  
VCC = 3.0 V; VI = 2.75 V (p-p)  
VCC = 6.0 V; VI = 5.5 V (p-p)  
fi = 10 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 20  
VCC = 3.0 V; VI = 2.75 V (p-p)  
VCC = 6.0 V; VI = 5.5 V (p-p)  
CL = 50 pF; RL = 50 Ω; see Fig. 16  
VCC = 3.0 V  
-
-
0.8  
0.4  
-
-
%
%
-
-
2.4  
1.2  
-
-
%
%
f(-3dB)  
-3 dB frequency  
response  
[1]  
[2]  
[2]  
-
-
180  
200  
-
-
MHz  
MHz  
VCC = 6.0 V  
αiso  
isolation  
(OFF-state)  
fi = 1 MHz; CL = 50 pF; RL = 600 Ω; see Fig. 18  
VCC = 3.0 V  
-
-
-50  
-50  
-
-
dB  
dB  
VCC = 6.0 V  
Vct  
crosstalk voltage  
crosstalk  
between digital inputs and switch; fi = 1 MHz;  
CL = 50 pF; RL = 600 Ω; see Fig. 21  
VCC = 3.0 V  
VCC = 6.0 V  
-
-
0.11  
0.12  
-
-
V
V
Xtalk  
between switches; fi = 1 MHz; CL = 50 pF;  
RL = 600 Ω; see Fig. 22  
VCC = 3.0 V  
VCC = 6.0 V  
-
-
-60  
-60  
-
-
dB  
dB  
[1] Adjust fi voltage to obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 50 Ω).  
[2] Adjust fi voltage to obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 600 Ω).  
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Product data sheet  
Rev. 8 — 16 July 2021  
12 / 20  
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
10.3. Test circuits  
001aak361  
5
(dB)  
0
V
CC  
V
CC  
S0 to S2  
V
or V  
2R  
L
IH  
IL  
Z
E
Yn  
0.1 µF  
GND = V  
EE  
GND  
- 5  
2R  
L
C
L
dB  
2
3
4
5
6
10  
10  
10  
10  
10  
10  
f
i
f (kHz)  
VCC = 3.0 V; GND = 0 V; VEE = -3.0 V; RL = 50 Ω;  
RSOURCE = 1 kΩ.  
001aak420  
Fig. 16. Test circuit for measuring frequency response Fig. 17. Typical frequency response  
001aak360  
0
(dB)  
- 50  
V
CC  
V
CC  
S0 to S2  
V
IH  
or V  
2R  
L
IL  
Z
E
Yn  
0.1 µF  
- 100  
GND = V  
EE  
2
3
4
5
6
10  
10  
10  
10  
10  
10  
V
CC  
2R  
L
C
L
dB  
f (kHz)  
f
i
VCC = 3.0 V; GND = 0 V; VEE = -3.0 V; RL = 50 Ω;  
RSOURCE = 1 kΩ.  
001aak421  
Fig. 19. Typical isolation (OFF-state) as function of  
frequency  
Fig. 18. Test circuit for measuring isolation (OFF-state)  
V
CC  
V
CC  
S0 to S2  
V
or V  
2R  
L
IH  
IL  
Z
E
Yn  
10 µF  
GND = V  
EE  
GND  
2R  
L
C
L
D
f
i
001aak422  
Fig. 20. Test circuit for measuring total harmonic distortion  
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74LV4051  
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Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
13 / 20  
 
 
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
V
V
CC  
CC  
V
CC  
2R  
L
S0 to S2  
2R  
L
Z
E
Yn  
G
GND = V  
EE  
2R  
L
2R  
L
C
L
V
O
V
or V  
V
IH  
IL  
001aak423  
a. Test circuit  
logic  
input (Sn, E)  
off  
on  
off  
V
V
ct  
O
001aaj908  
b. Input and output pulse definitions  
VI may be connected to Sn or E.  
Fig. 21. Test circuit for measuring crosstalk voltage between digital inputs and switch  
V
V
V
CC  
CC  
CC  
2R  
2R  
L
L
L
S0 to S2  
Y0  
Yn  
V
or V  
IL  
IH  
R
L
Z
E
0.1 µF  
GND = V  
EE  
2R  
L
V
O
C
L
2R  
GND  
dB  
V
I
001aak434  
a. Switch closed condition  
V
V
V
V
CC  
CC  
CC  
CC  
2R  
L
2R  
2R  
L
L
L
S0 to S2  
Y0  
Yn  
V
or V  
IL  
IH  
Z
E
GND = V  
EE  
GND  
R
L
V
I
2R  
2R  
L
C
L
V
O
dB  
001aak435  
b. Switch open condition  
Fig. 22. Test circuit for measuring crosstalk between switches  
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Product data sheet  
Rev. 8 — 16 July 2021  
14 / 20  
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
11. Package outline  
SO16: plastic small outline package; 16 leads; body width 3.9 mm  
SOT109-1  
D
E
A
X
v
c
y
H
M
A
E
Z
16  
9
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
8
e
w
M
detail X  
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
10.0  
9.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.05  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.1  
0.25  
0.01  
8o  
0o  
0.0100  
0.0075  
0.010 0.057  
0.004 0.049  
0.019  
0.014  
0.39  
0.38  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.020  
0.028  
0.012  
inches  
0.069  
0.01 0.004  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT109-1  
076E07  
MS-012  
Fig. 23. Package outline SOT109-1 (SO16)  
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Product data sheet  
Rev. 8 — 16 July 2021  
15 / 20  
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm  
SOT403-1  
D
E
A
X
c
y
H
v
M
A
E
Z
9
16  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
8
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.40  
0.06  
mm  
1.1  
0.65  
1
0.2  
0.13  
0.1  
0.25  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT403-1  
MO-153  
Fig. 24. Package outline SOT403-1 (TSSOP16)  
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Product data sheet  
Rev. 8 — 16 July 2021  
16 / 20  
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
16 terminals; body 2.5 x 3.5 x 0.85 mm  
SOT763-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16  
15  
10  
D
h
X
0
2.5  
scale  
5 mm  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
1
b
c
E
h
e
e
y
D
D
E
L
v
w
y
1
1
h
max.  
0.05 0.30  
0.00 0.18  
3.6  
3.4  
2.15  
1.85  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
2.5  
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT763-1  
- - -  
MO-241  
- - -  
Fig. 25. Package outline SOT763-1 (DHVQFN16)  
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74LV4051  
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Product data sheet  
Rev. 8 — 16 July 2021  
17 / 20  
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
12. Abbreviations  
Table 12. Abbreviations  
Acronym  
Description  
CMOS  
DUT  
ESD  
HBM  
MM  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Machine Model  
TTL  
Transistor-Transistor Logic  
13. Revision history  
Table 13. Revision history  
Document ID  
74LV4051 v.8  
Modifications:  
Release date  
20210716  
Data sheet status  
Change notice Supersedes  
- 74LV4051 v.7  
Product data sheet  
Type number 74LV4051DB (SOT338-1/SSOP16) removed.  
Section 7: Derating values for Ptot total power dissipation updated.  
74LV4051 v.7  
Modifications:  
20181009  
Product data sheet  
-
74LV4051 v.6  
The format of this data sheet has been redesigned to comply with the identity guidelines  
of Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
74LV4051 v.6  
Modifications:  
20160317  
Type number 74LV4051N (SOT38-4) removed.  
20140917 Product data sheet  
Fig. 7: Figure note added for DHVQFN16 package  
20090810 Product data sheet  
Product data sheet  
-
74LV4051 v.5  
74LV4051 v.4  
74LV4051 v.3  
74LV4051 v.5  
Modifications:  
-
74LV4051 v.4  
Modifications:  
-
The format of this data sheet has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Added type number 74LV4051BQ (DHVQFN16 package)  
74LV4051 v.3  
74LV4051 v.2  
19960623  
19970715  
Product specification  
Product specification  
-
-
74LV4051 v.2  
74LV4051 v.1  
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74LV4051  
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Product data sheet  
Rev. 8 — 16 July 2021  
18 / 20  
 
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
14. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
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©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
19 / 20  
 
Nexperia  
74LV4051  
8-channel analog multiplexer/demultiplexer  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................1  
4. Functional diagram.......................................................2  
5. Pinning information......................................................3  
5.1. Pinning.........................................................................3  
5.2. Pin description.............................................................4  
6. Functional description................................................. 4  
7. Limiting values............................................................. 4  
8. Recommended operating conditions..........................5  
9. Static characteristics....................................................5  
9.1. Test circuits..................................................................6  
9.2. ON resistance..............................................................7  
9.3. On resistance test circuit and graph............................8  
10. Dynamic characteristics............................................ 8  
10.1. Waveforms and test circuit...................................... 10  
10.2. Additional dynamic parameters............................... 12  
10.3. Test circuits..............................................................13  
11. Package outline........................................................ 15  
12. Abbreviations............................................................18  
13. Revision history........................................................18  
14. Legal information......................................................19  
© Nexperia B.V. 2021. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 16 July 2021  
©
74LV4051  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2021. All rights reserved  
Product data sheet  
Rev. 8 — 16 July 2021  
20 / 20  

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