74LV4052D [NEXPERIA]
Dual 4-channel analog multiplexer/demultiplexerProduction;型号: | 74LV4052D |
厂家: | Nexperia |
描述: | Dual 4-channel analog multiplexer/demultiplexerProduction 光电二极管 |
文件: | 总18页 (文件大小:303K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
Rev. 6 — 24 September 2021
Product data sheet
1. General description
The 74LV4052 is a dual single-pole quad-throw analog switch suitable for use in 4:1 multiplexer/
demultiplexer applications. Each switch features four independent inputs/outputs (nY0, nY1,
nY2 and nY3) and a common input/output (nZ). A digital enable input (E) and two digital select
inputs (S0, S1) are common to both switches. When E is HIGH, the switches are turned off. Digital
inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to
voltages in excess VCC
.
2. Features and benefits
•
Wide supply voltage range from 1.0 to 6.0 V
•
CMOS low power dissipation
•
•
•
•
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Optimized for low-voltage applications: 1.0 V to 6.0 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Low ON resistance:
•
•
•
145 Ω (typical) at VCC - VEE = 2.0 V
90 Ω (typical) at VCC - VEE = 3.0 V
60 Ω (typical) at VCC - VEE = 4.5 V
•
Logic level translation:
To enable 3 V logic to communicate with ± 3 V analog signals
•
•
•
Typical ‘break before make’ built in
Complies with JEDEC standards:
•
•
•
•
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
•
•
ESD protection:
•
•
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74LV4052D
-40 °C to +125 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LV4052PW
-40 °C to +125 °C
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
4. Functional diagram
V
CC
16
13
1Z
12
1Y0
14
1Y1
15
1Y2
10
S0
11
1Y3
LOGIC
LEVEL
CONVERSION
9
1-OF-4
DECODER
S1
1
2Y0
6
E
5
2Y1
2
2Y2
4
2Y3
3
2Z
8
7
V
EE
GND
aaa-008169
Fig. 1. Functional diagram
10
9
0
0
3
4 ×
1
13
G4
6
1Z
1Y0
12
14
15
11
1
MDX
10
9
S0
S1
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
0
1
2
3
1
5
3
2
4
5
12
14
15
2
13
6
E
4
2Z
3
11
001aah824
001aah825
Fig. 2. Logic symbol
Fig. 3. IEC logic symbol
©
74LV4052
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 24 September 2021
2 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
nYn
V
V
EE
CC
V
CC
V
CC
V
V
EE
CC
V
EE
nZ
from
logic
mnb043
Fig. 4. Schematic diagram (one switch)
5. Pinning information
5.1. Pinning
74LV4052
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2Y0
2Y2
2Z
V
CC
1Y2
1Y1
1Z
2Y3
2Y1
E
1Y0
1Y3
S0
V
EE
GND
S1
aaa-008171
Fig. 5. Pin configuration SOT109-1 (SO16) and SOT403-1 (TSSOP16)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
2Y0, 2Y1, 2Y2, 2Y3
1, 5, 2, 4
independent input or output
enable input (active LOW)
negative supply voltage
ground (0 V)
E
6
VEE
7
GND
8
S0, S1
10, 9
select logic input
1Y0, 1Y1, 1Y2, 1Y3
12, 14, 15, 11
13, 3
independent input or output
common input or output
positive supply voltage
1Z, 2Z
VCC
16
©
74LV4052
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 24 September 2021
3 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Input
Channel on
E
L
L
L
L
H
S1
L
S0
L
nY0 and nZ
nY1 and nZ
nY2 and nZ
nY3 and nZ
none
L
H
L
H
H
X
H
X
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+7.0
±20
±20
±25
Unit
V
supply voltage
[1]
[2]
[2]
[2]
-0.5
input clamping current
VI < -0.5 V or VI > VCC + 0.5 V
-
-
-
mA
mA
mA
ISK
switch clamping current VSW < -0.5 V or VSW > VCC + 0.5 V
ISW
switch current
VSW > -0.5 V or VSW < VCC + 0.5 V;
source or sink current
Tstg
Ptot
storage temperature
total power dissipation
-65
-
+150
500
°C
Tamb = -40 °C to +125 °C
[3]
mW
[1] To avoid drawing VCC current out of terminal nZ, when switch current flows into terminals nYn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC current flows out of terminals nYn. In this case, there
is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed VCC or VEE
[2] The minimum input voltage rating may be exceeded if the input current rating is observed.
[3] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
VCC
Parameter
Conditions
Min
Typ
Max
6
Unit
V
supply voltage
input voltage
see Fig. 6
[1]
1
0
3.3
VI
-
-
-
-
-
-
VCC
VCC
V
VSW
switch voltage
ambient temperature
0
V
Tamb
Δt/ΔV
in free air
-40
-
+125 °C
input transition rise and fall rate VCC = 1.0 V to 2.0 V
VCC = 2.0 V to 2.7 V
500
200
100
ns/V
-
ns/V
ns/V
VCC = 2.7 V to 6.0 V
-
[1] The static characteristics are guaranteed from VCC = 1.2 V to 6.0 V. However, LV devices are guaranteed to function down to
VCC = 1.0 V (with input levels GND or VCC).
©
74LV4052
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 24 September 2021
4 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
001aak344
8.0
V
- GND
CC
(V)
6.0
4.0
2.0
0
operating area
0
2.0
4.0
6.0
CC
8.0
- V (V)
V
EE
Fig. 6. Guaranteed operating area as a function of the supply voltages
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
VIH
VIL
II
HIGH-level
input voltage
VCC = 1.2 V
0.9
-
-
-
-
-
-
-
-
-
-
-
-
0.9
-
-
V
V
V
V
V
V
V
V
V
V
VCC = 2.0 V
1.4
1.4
VCC = 2.7 V to 3.6 V
VCC = 4.5 V
2.0
-
2.0
-
3.15
-
3.15
-
VCC = 6.0 V
4.20
-
4.20
-
LOW-level input VCC = 1.2 V
voltage
-
-
-
-
-
0.3
0.6
0.8
1.35
1.80
-
-
-
-
-
0.3
0.6
0.8
1.35
1.80
VCC = 2.0 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V
VCC = 6.0 V
input leakage
current
VI = VCC or GND
VCC = 3.6 V
-
-
-
-
1.0
2.0
-
-
1.0
2.0
μA
μA
VCC = 6.0 V
IS(OFF) OFF-state
leakage current
VI = VIH or VIL; see Fig. 7
VCC = 3.6 V
-
-
-
-
1.0
2.0
-
-
1.0
2.0
μA
μA
VCC = 6.0 V
IS(ON)
ON-state
leakage current
VI = VIH or VIL; see Fig. 8
VCC = 3.6 V
-
-
-
-
1.0
2.0
-
-
1.0
2.0
μA
μA
VCC = 6.0 V
ICC
supply current VI = VCC or GND; IO = 0 A
VCC = 3.6 V
VCC = 6.0 V
-
-
-
-
-
-
20
40
-
-
-
40
80
μA
μA
μA
ΔICC
additional
per input; VI = VCC - 0.6 V;
500
850
supply current VCC = 2.7 V to 3.6 V
©
74LV4052
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 24 September 2021
5 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
CI
input
-
3.5
-
-
-
pF
capacitance
Csw
switch
capacitance
independent pins nYn
common pins nZ
-
-
5
-
-
-
-
-
-
pF
pF
12
[1] Typical values are measured at Tamb = 25 °C.
9.1. Test circuits
V
V
CC
CC
S0 to S1
S0 to S1
V
IH
or V
V
IH
or V
IL
IL
nYn
nYn
1
2
nYn
nYn
1
2
switch
switch
nZ
E
nZ
E
I
I
S
S
I
S
GND = V
GND = V
EE
EE
V
CC
GND
V
I
V
O
V
V
I
O
aaa-008172
aaa-008173
VI = VCC or VEE and VO = VEE or VCC
.
VI = VCC or VEE and VO = open circuit.
Fig. 7. Test circuit for measuring OFF-state leakage
current
Fig. 8. Test circuit for measuring ON-state leakage
current
9.2. ON resistance
Table 7. ON resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit and graph see Fig. 9
and Fig. 10.
Symbol Parameter
Conditions
-40 °C to +85 °C
Min Typ[1] Max
-40 °C to +125 °C Unit
Min
Max
RON(peak) ON resistance
(peak)
VI = 0 V to VCC - VEE
VCC = 1.2 V; ISW = 100 μA
VCC = 2.0 V; ISW = 1000 μA
VCC = 2.7 V; ISW = 1000 μA
[2]
-
-
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
Ω
145
90
80
325
200
180
375
235
210
VCC = 3.0 V to 3.6 V;
ISW = 1000 μA
VCC = 4.5 V; ISW = 1000 μA
VCC = 6.0 V; ISW = 1000 μA
VI = 0 V to VCC - VEE
-
-
60
55
135
125
-
-
160
145
Ω
Ω
ΔRON
ON resistance
mismatch between
channels
VCC = 1.2 V; ISW = 100 μA
VCC = 2.0 V; ISW = 1000 μA
VCC = 2.7 V; ISW = 1000 μA
[2]
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
Ω
5
4
4
VCC = 3.0 V to 3.6 V;
ISW = 1000 μA
VCC = 4.5 V; ISW = 1000 μA
VCC = 6.0 V; ISW = 1000 μA
-
-
3
2
-
-
-
-
-
-
Ω
Ω
©
74LV4052
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 24 September 2021
6 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
RON(rail) ON resistance (rail) VI = GND
VCC = 1.2 V; ISW = 100 μA
[2]
-
-
-
-
225
110
70
-
-
-
-
-
-
Ω
Ω
Ω
Ω
VCC = 2.0 V; ISW = 1000 μA
VCC = 2.7 V; ISW = 1000 μA
235
145
130
270
165
150
VCC = 3.0 V to 3.6 V;
ISW = 1000 μA
60
VCC = 4.5 V; ISW = 1000 μA
VCC = 6.0 V; ISW = 1000 μA
-
-
45
40
100
85
-
-
115
100
Ω
Ω
RON(rail) ON resistance (rail) VI = VCC - VEE
VCC = 1.2 V; ISW = 100 μA
VCC = 2.0 V; ISW = 1000 μA
VCC = 2.7 V; ISW = 1000 μA
[2]
-
-
-
-
250
120
75
-
-
-
-
-
-
Ω
Ω
Ω
Ω
320
195
175
370
225
205
VCC = 3.0 V to 3.6 V;
ISW = 1000 μA
70
VCC = 4.5 V; ISW = 1000 μA
VCC = 6.0 V; ISW = 1000 μA
-
-
50
45
130
120
-
-
150
135
Ω
Ω
[1] Typical values are measured at Tamb = 25 °C.
[2] When supply voltages (VCC - VEE) near 1.2 V the analog switch ON resistance becomes extremely non-linear. When using a supply of
1.2 V, only use these devices for transmitting digital signals.
9.3. On resistance test circuit and graph
001aak412
180
R
ON
(Ω)
V
= 2.0 V
CC
V
V
SW
V
120
CC
S0 to S1
V
= 3.0 V
CC
V
IH
or V
IL
nYn
nYn
1
2
switch
nZ
E
V
= 4.5 V
CC
60
GND = V
EE
V
I
GND
I
SW
0
0
1.2
2.4
3.6
4.8
V (V)
I
aaa-008174
RON = VSW / ISW
.
Vi = 0 V to VCC - VEE
Fig. 9. Test circuit for measuring RON
Fig. 10. Typical RON as a function of input voltage
©
74LV4052
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 24 September 2021
7 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
10. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit, see Fig. 13.
Symbol Parameter Conditions -40 °C to +85 °C
Min Typ[1] Max
-40 °C to +125 °C Unit
Min
Max
tpd
propagation delay nYn to nZ, nZ to nYn; see Fig. 11
[2]
VCC = 1.2 V
-
-
-
-
-
-
25
9
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
17
13
10
9
20
15
12
10
8
VCC = 2.7 V
6
VCC = 3.0 V to 3.6 V
VCC = 4.5 V
[3]
[2]
5
4
VCC = 6.0 V
3
7
ten
enable time
E, Sn to nYn, nZ; see Fig. 12
VCC = 1.2 V
-
-
-
-
-
-
-
190
65
48
30
36
32
25
-
121
89
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
146
108
-
VCC = 2.7 V
VCC = 3.0 V to 3.6 V; CL = 15 pF [3]
VCC = 3.0 V to 3.6 V
VCC = 4.5 V
[3]
71
60
46
86
73
56
VCC = 6.0 V
tdis
disable time
E, Sn to nYn, nZ; see Fig. 12
VCC = 1.2 V
[2]
-
-
-
-
-
-
-
-
125
43
33
22
26
23
18
57
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
pF
VCC = 2.0 V
80
59
-
95
71
-
VCC = 2.7 V
VCC = 3.0 V to 3.6 V; CL = 15 pF [3]
VCC = 3.0 V to 3.6 V
VCC = 4.5 V
[3]
48
41
32
-
57
49
38
-
VCC = 6.0 V
CPD
power dissipation CL = 50 pF; fi = 1 MHz;
capacitance VI = GND to VCC
[4]
[1] All typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL
ten is the same as tPZL and tPZH
tdis is the same as tPLZ and tPHZ
.
.
.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V).
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi x N + Σ((CL + Csw) x VCC 2 x fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
Csw = maximum switch capacitance in pF;
VCC = supply voltage in Volts
N = number of inputs switching
Σ(CL x VCC 2 x fo) = sum of the outputs.
©
74LV4052
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 24 September 2021
8 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
10.1. Waveforms and test circuit
V
CC
nYn or nZ
input
V
M
V
V
EE
t
t
PLH
PHL
V
O
nZ or nYn
output
V
M
EE
001aak351
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 11. nYn, nZ to nZ, nYn propagation delays
V
CC
Sn, E input
V
M
V
V
V
SS
t
t
PLZ
PZL
V
O
90 %
nYn or nZ output
LOW-to-OFF
OFF-to-LOW
10 %
EE
t
t
PHZ
PZH
V
O
90 %
nYn or nZ output
HIGH-to-OFF
OFF-to-HIGH
10 %
switch ON
001aak352
EE
switch ON
switch OFF
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 12. Enable and disable times
Table 9. Measurement points
Supply voltage
Input
VM
Output
VM
VCC
< 2.7 V
0.5VCC
1.5 V
0.5VCC
0.5VCC
1.5 V
2.7 V to 3.6 V
> 3.6 V
0.5VCC
©
74LV4052
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 6 — 24 September 2021
9 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
V
EE
001aak353
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 13. Test circuit for measuring switching times
Table 10. Test data
Supply voltage Input
Load
CL
VEXT
VCC
VI
tr, tf
RL
tPHL, tPLH
open
tPZH, tPHZ
VEE
tPZL, tPLZ
2VCC
< 2.7 V
VCC
2.7 V
VCC
≤ 6 ns
≤ 6 ns
≤ 6 ns
50 pF
1 kΩ
2.7 V to 3.6 V
> 3.6 V
15 pF, 50 pF 1 kΩ
50 pF 1 kΩ
open
VEE
2VCC
open
VEE
2VCC
10.2. Additional dynamic parameters
Table 11. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf ≤ 6.0 ns; Tamb = 25 °C.
Symbol Parameter
Conditions
Min
Typ
Max Unit
THD
total harmonic distortion fi = 1 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 14
VCC = 3.0 V; VI = 2.75 V (p-p)
-
-
0.8
0.4
-
-
%
%
VCC = 6.0 V; VI = 5.5 V (p-p)
fi = 10 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 14
VCC = 3.0 V; VI = 2.75 V (p-p)
-
-
2.4
1.2
-
-
%
%
VCC = 6.0 V; VI = 5.5 V (p-p)
f(-3dB)
-3 dB frequency
response
CL = 50 pF; RL = 50 Ω; see Fig. 15 and Fig. 16
[1]
VCC = 3.0 V
VCC = 6.0 V
-
-
180
200
-
-
MHz
MHz
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74LV4052
Dual 4-channel analog multiplexer/demultiplexer
Symbol Parameter
Conditions
Min
Typ
Max Unit
αiso
isolation (OFF-state)
fi = 1 MHz; CL = 50 pF; RL = 600 Ω; see Fig. 17 and
Fig. 18
[2]
VCC = 3.0 V
VCC = 6.0 V
-
-
-50
-50
-
-
dB
dB
Vct
crosstalk voltage
crosstalk
between digital inputs and switch; fi = 1 MHz;
CL = 50 pF; RL = 600 Ω; see Fig. 19
VCC = 3.0 V
VCC = 6.0 V
-
-
0.11
0.12
-
-
V
V
Xtalk
between switches; fi = 1 MHz; CL = 50 pF; RL = 600 Ω; [2]
see Fig. 20
VCC = 3.0 V
VCC = 6.0 V
-
-
-60
-60
-
-
dB
dB
[1] To obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 50 Ω), adjust fi voltage.
[2] To obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 600 Ω), adjust fi voltage.
10.2.1. Test circuits
V
CC
V
CC
2R
L
L
S0 to S1
V
IH
or V
IL
nYn
nYn
1
2
switch
nZ
E
10 µF
GND = V
EE
2R
C
L
D
GND
f
i
aaa-008177
Fig. 14. Test circuit for measuring total harmonic distortion
V
V
CC
CC
2R
L
S0 to S1
V
IH
or V
IL
nYn
nYn
1
2
switch
nZ
E
0.1 µF
GND = V
EE
2R
L
C
L
dB
GND
f
i
aaa-008175
Fig. 15. Test circuit for measuring frequency response
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Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
001aak361
5
(dB)
0
- 5
2
3
4
5
6
10
10
10
10
10
10
f (kHz)
VCC = 3.0 V; GND = 0 V; VEE = - 3.0 V; RL = 50 Ω; RSOURCE = 1 kΩ.
Fig. 16. Typical frequency response
V
CC
V
CC
2R
L
L
S0 to S1
V
IH
or V
IL
nYn
nYn
1
2
switch
nZ
E
0.1 µF
GND = V
EE
2R
C
L
dB
V
CC
f
i
aaa-008176
Fig. 17. Test circuit for measuring isolation (OFF-state)
001aak360
0
(dB)
- 50
- 100
2
3
4
5
6
10
10
10
10
10
10
f (kHz)
VCC = 3.0 V; GND = 0 V; VEE = - 3.0 V; RL = 50 Ω; RSOURCE = 1 kΩ.
Fig. 18. Typical isolation (OFF-state) as function of frequency
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Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
V
CC
V
V
CC
CC
2R
L
2R
L
S0 to S1
nYn
nYn
1
2
switch
nZ
E
GND = V
EE
2R
L
C
L
V
O
V
G
2R
L
V
or V
IL
IH
aaa-008178
a. Test circuit
logic
input (Sn, E)
off
on
off
V
V
O
ct
001aaj908
b. Input and output pulse definitions
VI may be connected to Sn or E.
Fig. 19. Test circuit for measuring crosstalk voltage between digital inputs and switch
V
CC
V
CC
V
CC
2R
2R
L
L
L
S0 to S1
V
IH
or V
IL
nYn
nYn
R
L
nZ
E
0.1 µF
GND = V
EE
2R
L
V
O
C
L
2R
dB
GND
V
I
aaa-008179
a. Switch on channel.
V
V
CC
V
V
CC
CC
CC
2R
L
2R
L
2R
L
S0 to S1
V
IH
or V
IL
nYn
nYn
nZ
E
GND = V
EE
R
L
V
I
2R
L
GND
2R
L
C
L
V
dB
O
aaa-008180
b. Switch off channel.
Fig. 20. Test circuit for measuring crosstalk between switches
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Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
11. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 21. Package outline SOT109-1 (SO16)
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Product data sheet
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Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 22. Package outline SOT403-1 (TSSOP16)
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Product data sheet
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Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
12. Abbreviations
Table 12. Abbreviations
Acronym
CMOS
ESD
Description
Complementary Metal-Oxide Semiconductor
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 13. Revision history
Document ID
74LV4052 v.6
Modifications:
Release date
20210924
Data sheet status
Change notice
Supersedes
Product data sheet
-
74LV4052 v.5
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Section 1 and Section 2 updated.
Section 7: Derating values for Ptot total power dissipation updated.
Type number 74LV4052DB (SOT338-1/SSOP16) removed.
74LV4052 v.5
Modifications:
20160317
Type number 74LV4052N (SOT38-4) removed.
20130701 Product data sheet
Product data sheet
-
74LV4052 v.4
•
74LV4052 v.4
Modifications:
-
74LV4052 v.3
•
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
74LV4052 v.3
74LV4052 v.2
19980623
19970715
Product specification
Product specification
-
-
74LV4052 v.2
-
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16 / 18
Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
14. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
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Nexperia
74LV4052
Dual 4-channel analog multiplexer/demultiplexer
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description.............................................................3
6. Functional description................................................. 4
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................4
9. Static characteristics....................................................5
9.1. Test circuits..................................................................6
9.2. ON resistance..............................................................6
9.3. On resistance test circuit and graph............................7
10. Dynamic characteristics............................................ 8
10.1. Waveforms and test circuit........................................ 9
10.2. Additional dynamic parameters............................... 10
10.2.1. Test circuits...........................................................11
11. Package outline........................................................ 14
12. Abbreviations............................................................16
13. Revision history........................................................16
14. Legal information......................................................17
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 24 September 2021
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