74LVCH16245ADGG-Q100 [NEXPERIA]

16-bit bus transceiver with direction pin; 5 V tolerant; 3-state;
74LVCH16245ADGG-Q100
型号: 74LVCH16245ADGG-Q100
厂家: Nexperia    Nexperia
描述:

16-bit bus transceiver with direction pin; 5 V tolerant; 3-state

光电二极管 逻辑集成电路
文件: 总14页 (文件大小:248K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
Rev. 2 — 15 February 2019  
Product data sheet  
1. General description  
The 74LVC16245A-Q100; 74LVCH16245A-Q100 are 16-bit transceivers featuring non-inverting  
3-state bus compatible outputs in both send and receive directions. The device features two output  
enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direction control.  
nOE controls the outputs so that the buses are effectively isolated. This device can be used as two  
8-bit transceivers or one 16-bit transceiver.  
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to  
the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.  
The 74LVCH16245A-Q100 bus hold on data inputs eliminates the need for external pull-up  
resistors to hold unused inputs.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
5 V tolerant inputs/outputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low power consumption  
MULTIBYTE flow-through standard pin-out architecture  
Low inductance multiple power and ground pins for minimum noise and ground bounce  
Direct interface with TTL levels  
High-impedance when VCC = 0 V  
All data inputs have bus hold (74LVCH16245A-Q100 only)  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)  
CDM ANSI/ESDA/Jedec JS-002 exceeds 1000 V  
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
3. Ordering information  
Table 1. Ordering information  
Type number  
Temperature range Package  
Name  
Description  
Version  
74LVC16245ADGG-Q100  
74LVCH16245ADGG-Q100  
74LVC16245ADGV-Q100  
74LVCH16245ADGV-Q100  
-40 °C to +125 °C  
-40 °C to +125 °C  
TSSOP48  
plastic thin shrink small outline package; SOT362-1  
48 leads; body width 6.1 mm  
TSSOP48 [1] plastic thin shrink small outline package; SOT480-1  
48 leads; body width 4.4 mm;  
lead pitch 0.4 mm  
[1] Also known as TVSOP48.  
4. Functional diagram  
2DIR  
1DIR  
2OE  
2B0  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
1OE  
1B0  
2A0  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
1A0  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
2B7  
001aaa789  
Fig. 1. Logic symbol  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
2 / 14  
 
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
1OE  
G3  
1DIR  
3EN1[BA]  
3EN2[AB]  
G6  
2OE  
6EN4[BA]  
6EN5[AB]  
2DIR  
1A0  
1B0  
1
2
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
2B0  
2A0  
4
5
2A1  
2A2  
2A3  
2A4  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2A5  
2A6  
2A7  
001aaa790  
Fig. 2. IEC logic symbol  
V
CC  
data input  
to internal circuit  
mna705  
Fig. 3. Bus hold circuit  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
3 / 14  
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
5. Pinning information  
5.1. Pinning  
74LVC16245A-Q100  
74LVCH16245A-Q100  
1
2
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B0  
1B1  
GND  
1B2  
1B3  
1OE  
1A0  
1A1  
GND  
1A2  
1A3  
3
4
5
6
7
V
V
CC  
CC  
8
1B4  
1B5  
GND  
1B6  
1B7  
2B0  
2B1  
GND  
2B2  
2B3  
1A4  
1A5  
GND  
1A6  
1A7  
2A0  
2A1  
GND  
2A2  
2A3  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
V
V
CC  
CC  
2B4  
2B5  
2A4  
2A5  
GND  
2A6  
2A7  
2OE  
GND  
2B6  
2B7  
2DIR  
aaa-005103  
Fig. 4. Pin configuration SOT362-1 (TSSOP48) and SOT480-1 (TSSOP48)  
5.2. Pin description  
Table 2. Pin description  
Symbol  
Pin  
Description  
1DIR, 2DIR  
1B0 to 1B7  
2B0 to 2B7  
GND  
1, 24  
direction control input  
data input/output  
data input/output  
ground (0 V)  
2, 3, 5, 6, 8, 9, 11, 12  
13, 14, 16, 17, 19, 20, 22, 23  
4, 10, 15, 21, 28, 34, 39, 45  
7, 18, 31, 42  
VCC  
supply voltage  
1OE, 2OE  
1A0 to 1A7  
2A0 to 2A7  
48, 25  
output enable input (active LOW)  
data input/output  
data input/output  
47, 46, 44, 43, 41, 40, 38, 37  
36, 35, 33, 32, 30, 29, 27, 26  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
4 / 14  
 
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
6. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
Inputs  
Outputs  
nAn  
nOE  
L
nDIR  
nBn  
L
nAn = nBn  
inputs  
Z
inputs  
nBn = nAn  
Z
L
H
X
H
7. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
-0.5  
-50  
-0.5  
-
Max  
+6.5  
-
Unit  
V
VCC  
IIK  
supply voltage  
input clamping current  
input voltage  
VI < 0 V  
mA  
V
VI  
[1]  
+6.5  
±50  
IOK  
VO  
output clamping current  
output voltage  
VO > VCC or VO < 0 V  
output HIGH or LOW  
output 3-state  
mA  
V
[2]  
[2]  
-0.5  
-0.5  
-
VCC + 0.5  
+6.5  
±50  
V
IO  
output current  
VO = 0 V to VCC  
mA  
mA  
mA  
°C  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
100  
ground current  
-100  
-65  
-
-
storage temperature  
total power dissipation  
+150  
500  
Tamb = -40 °C to +125 °C  
[3]  
mW  
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.  
[2] The output voltage ratings may be exceeded if the output current ratings are observed.  
[3] Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.  
8. Recommended operating conditions  
Table 5. Recommended operating conditions  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
3.6  
Unit  
V
VCC  
supply voltage  
1.65  
1.2  
0
-
-
-
-
-
-
-
-
functional  
3.6  
V
VI  
input voltage  
5.5  
V
VO  
output voltage  
output HIGH or LOW  
output 3-state  
0
VCC  
5.5  
V
0
V
Tamb  
ambient temperature  
in free air  
-40  
0
+125  
20  
°C  
ns/V  
ns/V  
Δt/ΔV  
input transition rise and fall rate  
VCC = 1.2 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
0
10  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
5 / 14  
 
 
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
9. Static characteristics  
Table 6. Static characteristics  
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter Conditions -40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ [1]  
Max  
Min  
Max  
VIH  
HIGH-level input VCC = 1.2 V  
voltage  
1.08  
-
-
-
-
-
-
-
-
-
1.08  
-
V
V
V
V
V
V
V
V
VCC = 1.65 V to 1.95 V  
0.65VCC  
-
0.65VCC  
-
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
1.7  
-
-
1.7  
-
-
2.0  
2.0  
VIL  
LOW-level input VCC = 1.2 V  
-
-
-
-
0.12  
0.35VCC  
0.7  
-
-
-
-
0.12  
0.35VCC  
0.7  
voltage  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
0.8  
0.8  
VOH  
HIGH-level output VI = VIH or VIL  
voltage  
IO = -100 μA;  
VCC - 0.2  
-
-
VCC - 0.3  
-
V
VCC = 1.65 V to 3.6 V  
IO = -4 mA; VCC = 1.65 V  
IO = -8 mA; VCC = 2.3 V  
IO = -12 mA; VCC = 2.7 V  
IO = -18 mA; VCC = 3.0 V  
IO = -24 mA; VCC = 3.0 V  
1.2  
1.8  
2.2  
2.4  
2.2  
-
-
-
-
-
-
-
-
-
-
1.05  
1.65  
2.05  
2.25  
2.0  
-
-
-
-
-
V
V
V
V
V
VOL  
LOW-level output VI = VIH or VIL  
voltage  
IO = 100 μA;  
-
-
0.2  
-
0.3  
V
VCC = 1.65 V to 3.6 V  
IO = 4 mA; VCC = 1.65 V  
IO = 8 mA; VCC = 2.3 V  
IO = 12 mA; VCC = 2.7 V  
IO = 24 mA; VCC = 3.0 V  
-
-
-
-
-
-
0.45  
0.6  
-
-
-
-
-
0.65  
0.8  
V
-
V
-
-
0.4  
0.6  
V
0.55  
±5  
0.8  
V
II  
input leakage  
current  
VI = 5.5 V or GND;  
VCC = 3.6 V  
[2]  
±0.1  
±20  
μA  
IOZ  
OFF-state output VI = VIH or VIL;  
current VO = 5.5 V or GND;  
VCC = 3.6 V  
[2] [3]  
-
±0.1  
±5  
-
±20  
μA  
IOFF  
ICC  
power-off leakage VI or VO = 5.5 V; VCC = 0.0 V  
current  
-
-
-
-
-
±0.1  
0.1  
5
±10  
20  
500  
-
-
-
-
-
-
±20  
80  
μA  
μA  
supply current  
VI = VCC or GND; IO = 0 A;  
VCC = 3.6 V  
ΔICC  
CI  
additional supply per input pin; VI = VCC - 0.6 V;  
current IO = 0 A; VCC = 2.7 V to 3.6 V  
5000 μA  
input capacitance VCC = 0 V to 3.6 V;  
VI = GND to VCC  
5.0  
10  
-
-
pF  
pF  
CI/O  
IBHL  
input/output  
capacitance  
VCC = 0 V to 3.6 V;  
VI = GND to VCC  
-
bus hold LOW  
current  
VCC = 1.65; VI = 0.58 V  
VCC = 2.3; VI = 0.7 V  
VCC = 3.0; VI = 0.8 V  
[4] [5]  
10  
30  
75  
-
-
-
-
-
-
10  
25  
60  
-
-
-
μA  
μA  
μA  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
6 / 14  
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ [1]  
Max  
Min  
-10  
Max  
IBHH  
bus hold HIGH  
current  
VCC = 1.65; VI = 1.07 V  
VCC = 2.3; VI = 1.7 V  
VCC = 3.0; VI = 2.0 V  
VCC = 1.95 V  
[4] [5]  
[4] [6]  
[4] [6]  
-10  
-30  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
μA  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
-25  
-75  
-60  
IBHLO  
bus hold LOW  
overdrive current  
200  
300  
500  
-200  
-300  
-500  
200  
300  
500  
-200  
-300  
-500  
VCC = 2.7 V  
VCC = 3.6 V  
IBHHO  
bus hold HIGH  
overdrive current  
VCC = 1.95 V  
VCC = 2.7 V  
VCC = 3.6 V  
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C.  
[2] The bus hold circuit is switched off when VI > VCC allowing 5.5 V on the input terminal.  
[3] For I/O ports the parameter IOZ includes the input leakage current.  
[4] Valid for data inputs of bus hold parts only (74LVCH16245A-Q100). Note that control inputs do not have a bus hold circuit.  
[5] The specified sustaining current at the data input holds the input below the specified VI level.  
[6] The specified overdrive current at the data input forces the data input to the opposite input state.  
10. Dynamic characteristics  
Table 7. Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 7.  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
Typ [1]  
-40 °C to +125 °C Unit  
Min  
Max  
Min  
Max  
tpd  
propagation  
delay  
nAn to nBn; nBn to nAn;  
see Fig. 5  
[2]  
VCC = 1.2 V  
-
13.0  
5.2  
2.8  
2.7  
2.4  
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V  
1.5  
1.0  
1.0  
1.0  
12.2  
6.0  
4.7  
4.5  
1.5  
1.0  
1.0  
1.0  
13.8  
6.7  
6.0  
6.0  
VCC = 3.0 V to 3.6 V  
nOE to nAn, nBn; see Fig. 6  
VCC = 1.2 V  
ten  
enable time  
[2]  
-
15.0  
5.9  
3.3  
3.5  
2.7  
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V  
1.5  
1.0  
1.5  
1.0  
15.0  
7.9  
6.7  
5.5  
1.5  
1.0  
1.5  
1.0  
16.9  
8.8  
8.5  
7.0  
VCC = 3.0 V to 3.6 V  
nOE to nAn, nBn; see Fig. 6  
VCC = 1.2 V  
tdis  
disable time  
[2]  
-
11.0  
4.9  
2.7  
3.4  
3.3  
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V  
1.0  
0.5  
1.5  
1.5  
13.1  
7.1  
6.6  
5.6  
1.0  
0.5  
1.5  
1.5  
14.7  
7.9  
8.5  
7.0  
VCC = 3.0 V to 3.6 V  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
7 / 14  
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
Typ [1]  
-40 °C to +125 °C Unit  
Min  
Max  
Min  
Max  
CPD  
power  
dissipation  
capacitance  
per input; VI = GND to VCC  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
[3]  
-
-
-
11.5  
15.2  
18.5  
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
VCC = 3.0 V to 3.6 V  
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.  
[2] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
.
.
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz; fo = output frequency in MHz  
CL = output load capacitance in pF  
VCC = supply voltage in Volts  
N = number of inputs switching  
Σ(CL × VCC2 × fo) = sum of the outputs.  
10.1. Waveforms and test circuit  
V
I
nAn, nBn  
input  
V
M
GND  
t
t
PHL  
PLH  
V
OH  
nBn, nAn  
output  
V
M
mna477  
V
OL  
Measurement points are given in Table 8.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 5. The input (nAn, nBn) to output (nBn, nAn) propagation delays  
V
I
nOE input  
V
M
GND  
t
t
PLZ  
PZL  
V
CC  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PHZ  
PZH  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
enabled  
outputs  
enabled  
outputs  
disabled  
mna362  
Measurement points are given in Table 8.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 6. 3-state enable and disable times  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
8 / 14  
 
 
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
Table 8. Measurement points  
Supply voltage  
VCC  
Input  
Output  
VM  
VI  
VM  
VX  
VY  
1.2 V  
0.5 × VCC  
0.5 × VCC  
0.5 × VCC  
1.5 V  
VCC  
VCC  
VCC  
2.7 V  
2.7 V  
0.5 × VCC  
0.5 × VCC  
0.5 × VCC  
1.5 V  
VOL + 0.15 V  
VOL + 0.15 V  
VOL + 0.15 V  
VOL + 0.3 V  
VOL + 0.3 V  
VOH - 0.15 V  
VOH - 0.15 V  
VOH - 0.15 V  
VOH - 0.3 V  
VOH - 0.3 V  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
2.7 V  
3.0 V to 3.6 V  
1.5 V  
1.5 V  
t
W
V
I
90 %  
negative  
pulse  
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
001aae331  
Test data is given in Table 9.  
Definitions for test circuit:  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
VEXT = External voltage for measuring switching times.  
Fig. 7. Test circuit for measuring switching times  
Table 9. Test data  
Supply voltage  
Input  
VI  
Load  
CL  
VEXT  
tr, tf  
RL  
tPLH, tPHL  
open  
tPLZ, tPZL  
tPHZ, tPZH  
GND  
1.2 V  
VCC  
VCC  
VCC  
2.7 V  
2.7 V  
≤ 2 ns  
≤ 2 ns  
≤ 2 ns  
≤ 2.5 ns  
≤ 2.5 ns  
30 pF  
30 pF  
30 pF  
50 pF  
50 pF  
1 kΩ  
1 kΩ  
500 Ω  
500 Ω  
500 Ω  
2 × VCC  
2 × VCC  
2 × VCC  
2 × VCC  
2 × VCC  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
2.7 V  
open  
GND  
open  
GND  
open  
GND  
3.0 V to 3.6 V  
open  
GND  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
9 / 14  
 
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
11. Package outline  
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm  
SOT362-1  
D
E
A
X
c
v
A
H
E
y
Z
48  
25  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
24  
detail X  
w
b
p
e
0
5 mm  
2.5  
scale  
Dimensions (mm are the original dimensions)  
Unit  
max  
(1)  
(2)  
A
A
A
A
b
c
D
E
e
H
L
1
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
°
8
0
0.15 1.05  
0.05 0.85  
0.28 0.2 12.6 6.2  
0.17 0.1 12.4 6.0  
8.3  
7.9  
0.8 0.50  
0.4 0.35  
0.8  
0.4  
mm nom 1.2  
min  
0.25  
0.5  
0.25 0.08 0.1  
°
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
sot362-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
03-02-19  
13-08-05  
SOT362-1  
MO-153  
Fig. 8. Package outline SOT362-1 (TSSOP48)  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
10 / 14  
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
TSSOP48: plastic thin shrink small outline package; 48 leads;  
body width 4.4 mm; lead pitch 0.4 mm  
SOT480-1  
E
A
D
X
c
y
H
E
v
M
A
Z
25  
48  
Q
(A )  
3
A
A
2
A
1
pin 1 index  
θ
L
p
L
detail X  
1
24  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.85  
0.23  
0.13  
0.20  
0.09  
9.8  
9.6  
4.5  
4.3  
6.6  
6.2  
0.7  
0.5  
0.4  
0.3  
0.4  
0.1  
mm  
1.1  
0.4  
0.25  
1
0.2  
0.07  
0.08  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT480-1  
MO-153  
Fig. 9. Package outline SOT480-1 (TSSOP48)  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
11 / 14  
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
12. Abbreviations  
Table 10. Abbreviations  
Acronym  
Description  
CDM  
CMOS  
DUT  
ESD  
HBM  
MIL  
Charged Device Model  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Military  
MM  
Machine Model  
TTL  
Transistor-Transistor Logic  
13. Revision history  
Table 11. Revision history  
Document ID  
Release date  
Data sheet status Change notice Supersedes  
74LVC_LVCH16245A_Q100 v.2 20190215  
Product data sheet -  
74LVC_LVCH16245A_Q100 v.1  
Modifications:  
The format of this data sheet has been redesigned to comply with the identity  
guidelines of Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Type numbers 74LVC16245AEV-Q100 and 74LVCH16245AEV-Q100 (SOT702-1)  
removed.  
Type numbers 74LVC16245ADGV-Q100 and 74LVCH16245ADGV-Q100  
(SOT480-1) added.  
Package outline drawing SOT362-1 (TSSOP48) updated.  
74LVC_LVCH16245A_Q100 v.1 20121120  
Product data sheet -  
-
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
12 / 14  
 
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
equipment, nor in applications where failure or malfunction of an Nexperia  
product can reasonably be expected to result in personal injury, death or  
severe property or environmental damage. Nexperia and its suppliers accept  
no liability for inclusion and/or use of Nexperia products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
14. Legal information  
Data sheet status  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Document status Product  
Definition  
[1][2]  
status [3]  
Applications — Applications that are described herein for any of these  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Disclaimers  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
for the content in this document if provided by an information source outside  
of Nexperia.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Suitability for use in automotive applications — This Nexperia product  
has been qualified for use in automotive applications. Unless otherwise  
agreed in writing, the product is not designed, authorized or warranted to  
be suitable for use in life support, life-critical or safety-critical systems or  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
13 / 14  
 
Nexperia  
74LVC16245A-Q100;  
74LVCH16245A-Q100  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................2  
4. Functional diagram.......................................................2  
5. Pinning information......................................................4  
5.1. Pinning.........................................................................4  
5.2. Pin description.............................................................4  
6. Functional description................................................. 5  
7. Limiting values............................................................. 5  
8. Recommended operating conditions..........................5  
9. Static characteristics....................................................6  
10. Dynamic characteristics............................................ 7  
10.1. Waveforms and test circuit........................................ 8  
11. Package outline........................................................ 10  
12. Abbreviations............................................................12  
13. Revision history........................................................12  
14. Legal information......................................................13  
© Nexperia B.V. 2019. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 15 February 2019  
©
74LVC_LVCH16245A_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 2 — 15 February 2019  
14 / 14  

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