74LVT125BQ [NEXPERIA]

3.3 V quad buffer; 3-stateProduction;


型号：	74LVT125BQ
厂家：	Nexperia
描述：	3.3 V quad buffer; 3-stateProduction
文件：	总13页 (文件大小：238K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Rev. 8 — 18 August 2021

Product data sheet

1. General description

The 74LVT125; 74LVTH125 is a quad buffer/line driver with 3-state outputs controlled by the output

enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state.

Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This

device is fully specified for partial power down applications using I_OFF. The I_OFFcircuitry disables

the output, preventing the potentially damaging backflow current through the device when it is

powered down.

2. Features and benefits

•

Quad bus interface

3-state buffers

•

Wide supply voltage range from 2.7 to 3.6 V

BiCMOS high speed and output drive

Output capability: +64 mA and -32 mA

Direct interface with TTL levels

Overvoltage tolerant inputs to 5.5 V

Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

Live insertion and extraction permitted

No bus current loading when output is tied to 5 V bus

Power-up 3-state

I_OFFcircuitry provides partial Power-down mode operation

Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

ESD protection:

•

HBM EIA/JESD22-A114-A exceeds 2000V

MM EIA/JESD22-A115-A exceeds 200V

•

Specified from -40 °C to 85 °C

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74LVT125D

-40 °C to +85 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74LVTH125D

74LVT125PW

74LVTH125PW

74LVT125BQ

74LVTH125BQ

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

SOT762-1

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

4. Functional diagram

1OE

EN1

2OE

3OE

4OE

nOE

mna228

mna229

mna227

Fig. 1. Logic symbol

Fig. 2. IEC logic symbol

Fig. 3. Logic diagram (one buffer)

5. Pinning information

5.1. Pinning

74LVT125

74LVTH125

terminal 1

index area

74LVT125

74LVTH125

4OE

2OE

1OE

4OE

3OE

(1)

GND

2OE

001aac477

3OE

Transparent top view

(1) This is not a ground pin. There is no electrical or

mechanical requirement to solder the pad. In case

soldered, the solder land should remain floating or

connected to GND.

GND

001aac476

Fig. 4. Pin configuration SOT108-1 (SO14) and

SOT402-1 (TSSOP14)

Fig. 5. Pin configuration SOT762-1 (DHVQFN14)

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

2 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

5.2. Pin description

Table 2. Pin description

Symbol

Description

1OE

1 output enable input (active LOW)

1 data input

1 data output

2OE

2 output enable input (active LOW)

2 data input

2 data output

GND

ground (0 V)

3 data output

3 data input

3OE

3 output enable input (active LOW)

4 data output

4 data input

4OE

V_CC

4 output enable input (active LOW)

supply voltage

6. Functional description

Table 3. Function table

H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.

Control

Input

Output

nOE

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

3 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

7. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Max

+4.6

+7.0

-50

Unit

V_CC

V_I

supply voltage

-0.5

input voltage

[1]

-0.5

V_O

I_IK

output voltage

output in OFF-state or HIGH-state

V_I< 0 V

-0.5

input clamping current

output clamping current

output current

°C

I_OK

I_O

V_O< 0 V

-50

output in LOW-state

output in HIGH-state

128

-64

T_stg

T_j

storage temperature

junction temperature

-65

+150

150

[2]

[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction

temperatures which are detrimental to reliability.

8. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter

Conditions

Min

2.7

Typ

Max

3.6

5.5

Unit

V_CC

V_I

supply voltage

input voltage

V_IH

V_IL

I_OH

I_OL

HIGH-level input voltage

LOW-level input voltage

HIGH-level output current

LOW-level output current

2.0

0.8

-32

ns/V

°C

none

current duty cycle ≤ 50 %;f ≥ 1 kHz

Δt/ΔV

T_amb

input transition rise and fall rate

ambient temperature

in free air

-40

+85

9. Static characteristics

Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Typ [1]

Max

Unit

T_amb= -40 °C to +85 °C

V_IK

input clamping voltage

HIGH-level output voltage

I_IK= -18 mA; V_CC= 2.7 V

-0.9

-1.2

V_OH

I_OH= -100 μA; V_CC= 2.7 V to 3.6 V

I_OH= -8 mA; V_CC= 2.7 V

V_CC- 0.2 V_CC- 0.1

2.4

2.0

2.5

2.2

I_OH= -32 mA; V_CC= 3.0 V

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

4 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Symbol Parameter

Conditions

Min

Typ [1]

Max

Unit

V_OL

LOW-level output voltage

V_CC= 2.7 V

I_OL= 100 μA

I_OL= 24 mA

V_CC= 3.0 V

0.1

0.3

0.2

0.5

I_OL= 16 mA

0.25

0.3

0.4

0.5

I_OL= 32 mA

I_OL= 64 mA

0.4

0.55

I_I

input leakage current

all input pins

V_CC= 0 V or 3.6 V; V_I= 5.5 V

control pins

±1

μA

V_CC= 3.6 V; V_I= V_CCor GND

data pins

±0.1

[2]

[3]

V_CC= 3.6 V; V_I= V_CC

V_CC= 3.6 V; V_I= 0 V

V_CC= 0 V; V_Ior V_O= 0 V to 4.5 V

V_CC= 3 V; V_I= 0.8 V

V_CC= 3 V; V_I= 2.0 V

V_CC= 3.6 V; V_I= 0 V to 3.6 V

0.1

-1

-5

μA

I_OFF

I_BHL

I_BHH

I_BHLO

power-off leakage current

bus hold LOW current

bus hold HIGH current

±100

150

-150

-75

bus hold LOW overdrive

current

500

I_BHHO

I_LO

bus hold HIGH overdrive

current

V_CC= 3.6 V; V_I= 0 V to 3.6 V

-500

125

μA

output leakage current

output in HIGH-state when V_O> V_CC

V_O= 5.5 V; V_CC= 3.0 V

;

±1

I_O(pu/pd)power-up/power-down output V_CC≤ 1.2 V; V_O= 0.5 V to V_CC

;

[4]

±100

current

V_I= GND or V_CC; nOE = don’t care

I_OZ

OFF-state output current

V_CC= 3.6 V; V_I= V_IHor V_IL

output HIGH: V_O= 3.0 V

output LOW: V_O= 0.5 V

μA

-1

-5

I_CC

supply current

V_CC= 3.6 V; V_I= GND or V_CC

;

I_O= 0 A

outputs HIGH

outputs LOW

outputs disabled

0.13

0.19

[5]

[6]

0.13

0.1

0.19

0.2

ΔI_CC

additional supply current

per input pin; V_CC= 3 V to 3.6 V;

one input at V_CC- 0.6 V and

other inputs at V_CCor GND

C_I

input capacitance

output capacitance

V_I= 0 V or 3.0 V

C_O

outputs disabled; V_O= 0 V or 3.0 V

[1] Typical values are measured at V_CC= 3.3 V and T_amb= 25 °C.

[2] Unused pins at V_CCor GND.

[3] This is the bus hold overdrive current required to force the input to the opposite logic state.

[4] This parameter is valid for any V_CCbetween 0 V and 1.2 V with a transition time of up to 10 ms.

From V_CC= 1.2 V to V_CC= 3.0 V to 3.6 V a transition time of 100 μs is permitted. This parameter is valid for T_amb= 25 °C only.

[5] I_CCis measured with outputs pulled to V_CCor GND.

[6] This is the increase in supply current for each input at the specified voltage level other than V_CCor GND.

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

5 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

10. Dynamic characteristics

Table 7. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 8.

Symbol Parameter

Conditions

Min

Typ [1]

Max Unit

T_amb= -40 °C to +85 °C

t_PLH

t_PHL

t_PZH

t_PZL

t_PHZ

t_PLZ

LOW to HIGH propagation delay

nAn to nY; see Fig. 6

V_CC= 2.7 V

4.5

4.0

V_CC= 3.0 V to 3.6 V

nAn to nY; see Fig. 6

V_CC= 2.7 V

1.0

2.7

HIGH to LOW propagation delay

4.9

3.9

V_CC= 3.0 V to 3.6 V

nOE to nY; see Fig. 7

V_CC= 2.7 V

1.0

2.9

OFF-state to HIGH propagation delay

OFF-state to LOW propagation delay

HIGH to OFF-state propagation delay

LOW to OFF-state propagation delay

6.0

4.7

V_CC= 3.0 V to 3.6 V

nOE to nY; see Fig. 7

V_CC= 2.7 V

1.0

3.4

6.5

4.7

V_CC= 3.0 V to 3.6 V

nOE to nY; see Fig. 7

V_CC= 2.7 V

1.1

3.4

5.7

5.1

V_CC= 3.0 V to 3.6 V

nOE to nY; see Fig. 7

V_CC= 2.7 V

1.8

3.7

4.0

4.5

V_CC= 3.0 V to 3.6 V

1.3

2.6

[1] Typical values are at V_CC= 3.3 V and T_amb= 25 °C.

10.1. Waveforms and test circuit

nA input

GND

PLH

PHL

nY output

mnb072

V_M= 1.5 V.

V_OLand V_OHare typical voltage output levels that occur with the output load.

Fig. 6. Propagation delay input (nA) to output (nY)

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

6 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

nOE input

nY output

GND

3.0 V

PZL

PLZ

+ 0.3 V

PHZ

PZH

- 0.3 V

0 V

001aac475

V_M= 1.5 V.

V_OLand V_OHare typical voltage output levels that occur with the output load.

Fig. 7. Enable and disable times of 3-state outputs

90 %

negative

pulse

10 %

0 V

90 %

positive

pulse

10 %

0 V

EXT

PULSE

GENERATOR

DUT

001aae235

Test data is given in Table 8.

Definitions test circuit:

R_L= Load resistance.

C_L= Load capacitance including jig and probe capacitance.

R_T= Termination resistance should be equal to output impedance Z_oof the pulse generator.

V_EXT= Test voltage for switching times.

Fig. 8. Test circuit for measuring switching times

Table 8. Test data

Input

V_I

Load

C_L

V_EXT

f_i

t_W

t_r, t_f

R_L

t_PHZ, t_PZH

GND

t_PLZ, t_PZL

t_PLH, t_PHL

2.7 V

≤ 10 MHz

500 ns

≤ 2.5 ns

50 pF

500 Ω

6 V

open

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

7 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

11. Package outline

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

(A )

pin 1 index

detail X

2.5

scale

5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

UNIT

max.

0.25

0.10

1.45

1.25

0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8

6.2

5.8

1.0

0.4

0.7

0.6

0.7

0.3

1.75

1.27

0.05

1.05

0.25

0.1

0.25

0.01

8^o

0^o

0.010 0.057

0.004 0.049

0.019 0.0100 0.35

0.014 0.0075 0.34

0.16

0.15

0.244

0.228

0.039 0.028

0.016 0.024

0.028

0.012

inches

0.041

0.01 0.01 0.004

0.069

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT108-1

076E06

MS-012

Fig. 9. Package outline SOT108-1 (SO14)

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

8 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

(A )

pin 1 index

detail X

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

(2)

(1)

UNIT

max.

8^o

0^o

0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3

6.6

6.2

0.75

0.50

0.4

0.3

0.72

0.38

1.1

0.65

0.2

0.13

0.1

0.25

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-18

SOT402-1

MO-153

Fig. 10. Package outline SOT402-1 (TSSOP14)

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

9 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

14 terminals; body 2.5 x 3 x 0.85 mm

SOT762-1

detail X

terminal 1

index area

terminal 1

index area

A B

4 mm

scale

Dimensions (mm are the original dimensions)

(1) (1)

(1)

Unit

max

nom

min

0.05 0.30

0.02 0.25 0.2 3.0 1.50 2.5 1.00 0.5

0.00 0.18 2.9 1.35 2.4 0.85

3.1 1.65 2.6 1.15

0.5

0.4 0.1 0.05 0.05 0.1

0.2 0.3

Note

sot762-1_po

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

References

Outline

version

European

projection

Issue date

IEC

JEDEC

JEITA

15-04-10

15-05-05

SOT762-1

MO-241

Fig. 11. Package outline SOT762-1 (DHVQFN14)

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

10 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

12. Abbreviations

Table 9. Abbreviations

Acronym

BiCMOS

CMOS

DUT

Description

Bipolar Complementary Metal Oxide Semiconductor

Complementary Metal Oxide Semiconductor

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

Machine Model

TTL

Transistor-Transistor Logic

13. Revision history

Table 10. Revision history

Document ID

Release date Data sheet status

20210818 Product data sheet

Change notice Supersedes

74LVT_LVTH125 v.8

Modifications:

74LVT_LVTH125 v.7

•

The format of this data sheet has been redesigned to comply with the identity

guidelines of Nexperia.

•

Legal texts have been adapted to the new company name where appropriate.

Type numbers 74LVT125DB and 74LVTH125DB (SOT337-1/SSOP14) removed.

Section 1 and Section 2 updated.

Fig. 7 aligned with test conditions (errata).

74LVT_LVTH125 v.7

Modifications:

20160531

Product data sheet

74LVT125 v.6

•

The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

Legal texts have been adapted to the new company name where appropriate.

74LVT_LVTH125 v.6

Modifications:

20060306

Product data sheet

74LVT125 v.5

•

Section 3: Added type numbers 74LVTH125D, 74LVTH125DB, 74LVTH125PW and

74LVTH125BQ.

74LVT125 v.5

74LVT125 v.4

74LVT125 v.3

74LVT125 v.2

74LVT125 v.1

20050210

20050207

20040624

19980219

Product data sheet

Product specification

74LVT125 v.4

74LVT125 v.3

74LVT125 v.2

74LVT125 v.1

74LVT_LVTH125

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Product data sheet

Rev. 8 — 18 August 2021

11 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

injury, death or severe property or environmental damage. Nexperia and its

suppliers accept no liability for inclusion and/or use of Nexperia products in

such equipment or applications and therefore such inclusion and/or use is at

the customer’s own risk.

14. Legal information

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Data sheet status

Document status Product

Definition

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. Nexperia makes no representation

or warranty that such applications will be suitable for the specified use

without further testing or modification.

[1][2]

status [3]

Objective [short]

data sheet

Development

This document contains data from

the objective specification for

product development.

Customers are responsible for the design and operation of their applications

and products using Nexperia products, and Nexperia accepts no liability for

any assistance with applications or customer product design. It is customer’s

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for the planned application and use of customer’s third party customer(s).

Customers should provide appropriate design and operating safeguards to

minimize the risks associated with their applications and products.

Preliminary [short]

data sheet

Qualification

Production

This document contains data from

the preliminary specification.

Product [short]

data sheet

This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

Nexperia does not accept any liability related to any default, damage, costs

or problem which is based on any weakness or default in the customer’s

applications or products, or the application or use by customer’s third party

customer(s). Customer is responsible for doing all necessary testing for the

customer’s applications and products using Nexperia products in order to

avoid a default of the applications and the products or of the application or

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liability in this respect.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case of

multiple devices. The latest product status information is available on

the internet at https://www.nexperia.com.

Definitions

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. Nexperia does not give any representations or

warranties as to the accuracy or completeness of information included herein

and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

intended for quick reference only and should not be relied upon to contain

detailed and full information. For detailed and full information see the relevant

full data sheet, which is available on request via the local Nexperia sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

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data sheet shall define the specification of the product as agreed between

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to be accurate and reliable. However, Nexperia does not give any

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In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards,

customer (a) shall use the product without Nexperia’s warranty of the

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product specifications.

Notwithstanding any damages that customer might incur for any reason

whatsoever, Nexperia’s aggregate and cumulative liability towards customer

for the products described herein shall be limited in accordance with the

Terms and conditions of commercial sale of Nexperia.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

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to information published in this document, including without limitation

specifications and product descriptions, at any time and without notice. This

document supersedes and replaces all information supplied prior to the

publication hereof.

Trademarks

Suitability for use — Nexperia products are not designed, authorized or

warranted to be suitable for use in life support, life-critical or safety-critical

systems or equipment, nor in applications where failure or malfunction

of an Nexperia product can reasonably be expected to result in personal

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

74LVT_LVTH125

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 18 August 2021

12 / 13

Nexperia

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Contents

1. General description......................................................1

2. Features and benefits.................................................. 1

3. Ordering information....................................................1

4. Functional diagram.......................................................2

5. Pinning information......................................................2

5.1. Pinning.........................................................................2

5.2. Pin description.............................................................3

6. Functional description................................................. 3

7. Limiting values............................................................. 4

8. Recommended operating conditions..........................4

9. Static characteristics....................................................4

10. Dynamic characteristics............................................ 6

10.1. Waveforms and test circuit........................................ 6

11. Package outline.......................................................... 8

12. Abbreviations............................................................11

13. Revision history........................................................11

14. Legal information......................................................12

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 18 August 2021

74LVT_LVTH125

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 18 August 2021

13 / 13

74LVT125BQ [NEXPERIA]

相关型号：

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74LVT125D-T

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74LVT125DB-T

74LVT125M

74LVT125M