74LVT16543ADGG [NEXPERIA]
3.3 V 16-bit registered transceiver; 3-stateProduction;型号: | 74LVT16543ADGG |
厂家: | Nexperia |
描述: | 3.3 V 16-bit registered transceiver; 3-stateProduction 信息通信管理 光电二极管 输出元件 逻辑集成电路 |
文件: | 总15页 (文件大小:238K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
Rev. 4 — 1 April 2021
Product data sheet
1. General description
The 74LVT16543A is a 16-bit registered transceiver with 3-state outputs. The device can be used
as two 8-bit transceivers or one 16-bit transceiver.
Data flow in each direction is controlled by intput enable (nEAB and nEBA), latch enable
(nLEAB and nLEBA), and output enable (nOEAB and nOEBA) inputs. For A to B data flow, the
device operates in the transparent mode when (nEAB) and (nLEAB) are LOW. A subsequent
LOW-to-HIGH transition of the nLEAB input latches the data and the outputs no longer change with
the inputs. A HIGH on either nEAB or nOEAB causes the outputs to assume a high-impedance
OFF-state.
Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs.
Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs
2. Features and benefits
•
•
16-bit universal bus interface
3-state buffers
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Wide supply voltage range from 2.7 to 3.6 V
Input and output interface capability to systems at 5 V supply
Overvoltage tolerant inputs to 5.5 V
Direct interface with TTL levels
BiCMOS high speed and output drive
Output capability: +64 mA/-32 mA
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
Live insertion/extraction permitted
Power-up 3-state
Power-up reset
No bus current loading when output is tied to 5 V bus
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
Complies with JEDEC standards
•
JESD8C (2.7 V to 3.6 V)
•
ESD protection:
•
•
HBM: JESD22-A114F exceeds 2000 V
MM: JESD22-A115-A exceeds 200 V
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVT16543ADGG -40 °C to +85 °C
TSSOP56
plastic thin shrink small outline package; 56 leads; SOT364-1
body width 6.1 mm
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
4. Functional diagram
1A0
5
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2B0
42
52
51
49
48
47
45
44
43
15
16
17
19
20
21
23
24
1A1
2B1
6
41
1A2
8
2B2
40
1A3
2B3
9
38
1A4
10
2B4
37
1A5
2B5
12
36
1A6
13
2B6
34
1A7
2B7
14
33
1OEAB
1
2OEAB
28
1OEBA
2OEBA
56
29
1EAB
3
2EAB
26
1EBA
2EBA
54
31
1LEAB
2
2LEAB
27
1LEBA
2LEBA
55
30
aaa-027924
Fig. 1. Logic symbol
56
54
55
1
1EN3 (BA)
G1
29
7EN9 (BA)
G7
31
30
28
26
27
1C5
7C11
2EN4 (AB)
G2
8EN10 (AB)
G8
3
2
2C6
8C12
5
52
15
42
3
5D
9
11D
10
6D
4
12D
6
8
16
17
19
20
21
23
24
51
49
48
47
45
44
43
41
40
38
37
36
34
9
10
12
13
14
33
aaa-027925
Fig. 2. IEC logic symbol
©
74LVT16543A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
2 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
nOEBA
nEBA
nLEBA
nOEAB
nEAB
nLEAB
LE
Q
nA1
D
nB1
LE
D
Q
8 IDENTICAL
CHANNELS
to 7 other channels
aaa-027926
Fig. 3. Logic diagram
©
74LVT16543A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
3 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
5. Pinning information
5.1. Pinning
74LVT16543A
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEAB
1LEAB
1EAB
GND
1OEBA
1LEBA
1EBA
GND
2
3
4
5
1A0
1B0
6
1A1
1B1
7
V
V
CC
CC
8
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
GND
2A3
2A4
2A5
1B2
1B3
1B4
GND
1B5
1B6
1B7
2B0
2B1
2B2
GND
2B3
2B4
2B5
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
V
CC
CC
2A6
2A7
2B6
2B7
GND
GND
2EAB
2LEAB
2OEAB
2EBA
2LEBA
2OEBA
aaa-029134
Fig. 4. Pin configuration SOT364-1 (TSSOP56)
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74LVT16543A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
4 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7
1B0, 1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7
2B0, 2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7
1OEAB, 1OEBA, 2OEAB, 2OEBA
5, 6, 8, 9, 10, 12, 13, 14
data inputs/outputs
15, 16, 17, 19, 20, 21, 23, 24
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33
1, 56, 28, 29
data inputs/outputs
data inputs/outputs
data inputs/outputs
A to B / B to A output enable inputs
(active LOW)
1EAB, 1EBA, 2EAB, 2EBA
3, 54, 26, 31
2, 55, 27, 30
A to B / B to A enable inputs
(active LOW)
1LEAB, 1LEBA, 2LEAB, 2LEBA
A to B / B to A latch enable inputs
(active LOW)
GND
VCC
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
ground (0 V)
supply voltage
6. Functional description
Table 3. Function selection
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH transition of nLEAB, nLEBA, nEAB and nEBA;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH transition of nLEAB, nLEBA, nEAB and nEBA;
↑ = LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or nEBA;
X = don’t care; NC = no change; Z = high-impedance OFF-state.
Inputs
Outputs
Status
nOEAB or nOEBA nEAB or nEBA
nLEAB or nLEBA nAn or nBn
nBn or nAn
H
X
L
L
L
L
L
L
L
X
H
↑
X
X
L
L
↑
X
X
h
l
Z
Disabled
Z
Disabled
Z
Disabled + Latch
Disabled + Latch
Latch + Display
Latch + Display
Transparent
Transparent
Hold
↑
Z
L
L
L
L
L
h
l
H
L
↑
L
L
H
H
L
X
H
L
NC
©
74LVT16543A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
5 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-0.5
-0.5
-50
-50
-
Max
+4.6
+7.0
+7.0
-
Unit
V
VCC
VI
supply voltage
input voltage
[1]
[1]
V
VO
IIK
output voltage
output in OFF or HIGH state
VI < 0
V
input clamping current
output clamping current
output current
mA
mA
mA
mA
°C
°C
IOK
IO
VO < 0
-
output in LOW state
output in HIGH state
128
-
-64
-65
-
Tstg
Tj
storage temperature
junction temperature
+150
+150
[2]
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
Conditions
Min
2.7
0
Max
3.6
5.5
+85
10
Unit
V
VCC
VI
supply voltage
input voltage
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
in free air
-40
-
°C
outputs enabled
ns/V
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ [1]
-0.85
-
Max
-1.2
-
Unit
V
VIK
VIH
VIL
input clamping voltage
VCC = 2.7 V; IIK = -18 mA
-
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
2.0
V
-
-
0.8
-
V
VOH
VCC = 2.7 V to 3.6 V; IOH = -100 μA
VCC = 2.7 V; IOH = -8 mA
VCC = 3.0 V; IOH = -32 mA
VCC = 2.7 V; IOL = 100 μA
VCC = 2.7 V; IOL = 24 mA
VCC = 3.0 V; IOL = 16 mA
VCC = 3.0 V; IOL = 32 mA
VCC = 3.0 V; IOL = 64 mA
VCC - 0.2
VCC
2.54
2.36
0.07
0.3
V
2.4
-
V
2.0
-
V
VOL
LOW-level output voltage
HIGH-level output current
-
-
-
-
-
-
0.2
0.5
0.4
0.5
0.55
-32
V
V
0.2
V
0.3
V
0.35
-
V
IOH
mA
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74LVT16543A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
6 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
Symbol Parameter
Conditions
Min
Typ [1]
Max
32
Unit
mA
mA
V
IOL
LOW-level output current
-
-
-
-
-
current duty cycle ≤ 50 %; fi ≥ 1 kHz
64
VOL(pu)
II
power-up LOW-level
output voltage
VCC = 3.6 V; IO = 1 mA;
VI = VCC or GND
[2]
[3]
0.13
0.55
input leakage current
control pins
VCC = 0 V or 3.6 V; VI = 5.5 V
VCC = 3.6 V; VI = VCC or GND
I/O data pins
-
-
0.1
0.1
10
±1
μA
μA
VCC = 3.6 V; VI = 5.5 V
VCC = 3.6 V; VI = VCC
VCC = 3.6 V; VI = 0 V
-
-
0.5
0.5
1
20
10
-5
μA
μA
μA
-
IOFF
IBHL
IBHH
IBHLO
power-off leakage current
bus hold LOW current
bus hold HIGH current
VCC = 0 V; VI or VO = 0 V to 4.5 V
VCC = 3.0 V; VI = 0.8 V
VCC = 3.0 V; VI = 2.0 V
VCC = 3.6 V; VI = 0 V to 3.6 V
-
1
±100 μA
75
-75
500
130
-140
-
-
-
-
μA
μA
μA
bus hold LOW
overdrive current
[4]
[4]
IBHHO
ICEX
bus hold HIGH
overdrive current
VCC = 3.6 V; VI = 0 V to 3.6 V
-
-
-
-
-500
125
μA
μA
output high leakage current
output in HIGH-state when VO > VCC
VO = 5.5 V; VCC = 3.0 V
;
45
35
IO(pu/pd) power-up/power-down
output current
VCC ≤ 1.2 V; VO = 0.5 V to VCC
;
[5]
±100 μA
VI = GND or VCC; nOE = don’t care
ICC
supply current
VCC = 3.6 V; VI = VCC or GND; IO = 0 A
outputs HIGH
-
-
-
-
0.07
4.5
0.12
6
mA
mA
mA
mA
outputs LOW
outputs disabled
[6]
[7]
0.07
0.1
0.12
0.2
ΔICC
additional supply current
per input pin; VCC = 3.0 V to 3.6 V;
one input = VCC - 0.6 V;
other inputs at VCC or GND
CI
input capacitance
at control pins; VI = 0 V or 3.0 V
-
-
3
9
-
-
pF
pF
CI/O
input/output capacitance
at input/output data pins,
outputs disabled; VI/O = 0 V or 3.0 V
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
[2] For valid test results, data must not be loaded into the latches after applying power.
[3] Unused pins at VCC or GND.
[4] This is the bus hold overdrive current required to force the input to the opposite logic state.
[5] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms.
From VCC = 1.2 V to VCC = 3.0 V to 3.6 V a transition time of 100 µs is permitted. This parameter is valid for Tamb = +25 °C only.
[6] ICC with the outputs disabled is measured with outputs pulled to VCC or GND.
[7] This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
©
74LVT16543A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
7 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 9.
Symbol Parameter
Conditions
Min
Typ [1]
Max
Unit
tpd
propagation delay
nAn to nBn or nBn to nAn; see Fig. 5
VCC = 2.7 V
[2]
[2]
-
-
4.4
3.7
ns
ns
VCC = 3.3 V ± 0.3 V
1.0
2.2
tpd
propagation delay
nLEBA to nAn, nLEAB to nBn; see Fig. 6
VCC = 2.7 V
-
-
6.2
4.8
ns
ns
VCC = 3.3 V ± 0.3 V
1.5
2.7
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
tPLZ
tsu(H)
tsu(L)
th(H)
OFF-state to HIGH
propagation delay
nOEBA to nAn, nOEAB to nBn; see Fig. 7
VCC = 2.7 V
-
-
6.1
4.6
ns
ns
VCC = 3.3 V ± 0.3 V
1.5
2.8
OFF-state to LOW
propagation delay
nOEBA to nAn, nOEAB to nBn; see Fig. 7
VCC = 2.7 V
-
-
6.6
5.0
ns
ns
VCC = 3.3 V ± 0.3 V
1.5
2.6
HIGH to OFF-state
propagation delay
nOEBA to nAn, nOEAB to nBn; see Fig. 7
VCC = 2.7 V
-
-
5.7
5.2
ns
ns
VCC = 3.3 V ± 0.3 V
2.0
3.1
LOW to OFF-state
propagation delay
nOEBA to nAn, nOEAB to nBn; see Fig. 7
VCC = 2.7 V
-
-
4.7
4.6
ns
ns
VCC = 3.3 V ± 0.3 V
2.0
3.2
OFF-state to HIGH
propagation delay
nEBA to nAn, nEAB to nBn; see Fig. 7
VCC = 2.7 V
-
-
6.1
4.8
ns
ns
VCC = 3.3 V ± 0.3 V
1.5
2.9
OFF-state to LOW
propagation delay
nEBA to nAn, nEAB to nBn; see Fig. 7
VCC = 2.7 V
-
-
6.6
5.1
ns
ns
VCC = 3.3 V ± 0.3 V
1.5
2.6
HIGH to OFF-state
propagation delay
nEBA to nAn, nEAB to nBn; see Fig. 7
VCC = 2.7 V
-
-
5.7
5.1
ns
ns
VCC = 3.3 V ± 0.3 V
2.0
3.1
LOW to OFF-state
propagation delay
nEBA to nAn, nEAB to nBn; see Fig. 7
VCC = 2.7 V
-
-
4.5
4.3
ns
ns
VCC = 3.3 V ± 0.3 V
2.0
3.2
set-up time HIGH
set-up time LOW
hold time HIGH
nAn to nLEAB, nBn to nLEBA; see Fig. 8
VCC = 2.7 V
0.5
0.8
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
0.4
nAn to nLEAB, nBn to nLEBA; see Fig. 8
VCC = 2.7 V
1.5
1.0
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
0.1
nAn to nLEAB, nBn to nLEBA; see Fig. 8
VCC = 2.7 V
0.5
1.0
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
0.2
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74LVT16543A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
8 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
Symbol Parameter
Conditions
Min
Typ [1]
Max
Unit
th(L)
tsu(H)
tsu(L)
th(H)
th(L)
tWL
hold time LOW
nAn to nLEAB, nBn to nLEBA; see Fig. 8
VCC = 2.7 V
1.3
1.2
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
0.4
set-up time HIGH
set-up time LOW
hold time HIGH
hold time LOW
pulse width LOW
nAn to nEAB, nBn to nEBA; see Fig. 8
VCC = 2.7 V
0.4
0.7
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
0.1
nAn to nEAB, nBn to nEBA; see Fig. 8
VCC = 2.7 V
1.5
1.3
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
0.1
nAn to nEAB, nBn to nEBA; see Fig. 8
VCC = 2.7 V
0.8
1.2
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
0.2
nAn to nEAB, nBn to nEBA; see Fig. 8
VCC = 2.7 V
1.4
1.3
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
0.4
nLEAB and nLEBA; see Fig. 6
VCC = 2.7 V
1.8
1.8
-
-
-
ns
ns
VCC = 3.3 V ± 0.3 V
1.0
[1] Typical values are measured at Tamb = 25 °C and VCC = 3.3 V
[2] tpd is the same as tPLH and tPHL
10.1. Waveforms and test circuit
V
I
nAn, nBn input
GND
V
V
M
M
t
t
PLH
PHL
V
OH
nBn, nAn output
V
V
M
M
V
OL
aaa-027928
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 5. Input (nAn, nBn) to output (nBn, nAn) propagation delays
©
74LVT16543A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
9 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
V
I
nLEAB, nLEBA
input
V
V
V
M
M
M
GND
t
W
t
t
PLH
PHL
V
OH
nAn, nBn output
V
V
M
M
V
OL
aaa-027929
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 6. Input (nLEAB, nLEBA) to output (nBn, nAn) propagation delays and pulse width LOW
V
I
nOEAB, nOEBA
nEAB, nEBA input
V
V
M
M
GND
3.0 V
t
t
PZL
PLZ
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
aaa-029135
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7. 3-state output enable and disable times
V
I
nAn, nBn input
GND
V
V
V
V
M
M
M
M
t
t
h
h
t
t
su
su
V
I
nLEBA, nLEAB
nEBA, nEAB input
V
M
V
M
GND
aaa-027931
See Table 8 for measurement points.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig. 8. Data set-up and hold times for the inputs nAn and nBn to nLEBA, nLEAB, nEBA and nEAB inputs
Table 8. Measurement points
Input
VI
Output
VM
VM
Vx
Vy
2.7 V
1.5 V
1.5 V
VOL + 0.3 V
VOH - 0.3 V
©
74LVT16543A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
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10 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
001aae331
Test data is given in Table 9.
Definitions test circuit:
RL = Load resistance;
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to output impedance Zo of the pulse generator;
VEXT = External voltage for measuring switching times.
Fig. 9. Test circuit for measuring switching times
Table 9. Test data
Input
VI
Load
RL
VEXT
fi
tW
tr, tf
CL
tPHZ, tPZH
GND
tPLZ, tPZL
tPLH, tPHL
2.7 V
≤ 10 MHz
500 ns
≤ 2.5 ns
500 Ω
50 pF
6 V
open
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74LVT16543A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
11 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
11. Package outline
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
E
D
A
X
c
H
v
M
A
y
E
Z
56
29
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
detail X
1
28
w
M
b
e
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions).
A
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
8o
0o
0.15
0.05
1.05
0.85
0.28
0.17
0.2
0.1
14.1
13.9
6.2
6.0
8.3
7.9
0.8
0.4
0.50
0.35
0.5
0.1
mm
1.2
0.5
1
0.25
0.08
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT364-1
MO-153
Fig. 10. Package outline SOT364-1 (TSSOP56)
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74LVT16543A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
12 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
12. Abbreviations
Table 10. Abbreviations
Acronym
Description
BiCMOS
DUT
Bipolar Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
MM
Machine Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID
Release date Data sheet status
Change notice Supersedes
- 74LVT16543A v.3
74LVT16543A v.4
Modifications:
20210401
Product data sheet
•
•
Section 1 and Section 2 updated.
Type number 74LVT16543ADL (SOT371-1 / SSOP56) removed.
74LVT16543A v.3
Modifications:
20181001
Product data sheet 74LVT16543A v.2
-
•
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
74LVT16543A v.2
74LVT16543A v.1
19980219
-
Product specification
Product specification
-
74LVT16543A v.1
-
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74LVT16543A
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
13 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
14. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
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with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
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sold subject to the general terms and conditions of commercial sale, as
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concluded only the terms and conditions of the respective agreement shall
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Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
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or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
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Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
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accepts no liability for inclusion and/or use of non-automotive qualified
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In no event shall Nexperia be liable for any indirect, incidental, punitive,
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or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
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Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
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Product data sheet
Rev. 4 — 1 April 2021
14 / 15
Nexperia
74LVT16543A
3.3 V 16-bit registered transceiver; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................4
5.1. Pinning.........................................................................4
5.2. Pin description.............................................................5
6. Functional description................................................. 5
7. Limiting values............................................................. 6
8. Recommended operating conditions..........................6
9. Static characteristics....................................................6
10. Dynamic characteristics............................................ 8
10.1. Waveforms and test circuit........................................ 9
11. Package outline........................................................ 12
12. Abbreviations............................................................13
13. Revision history........................................................13
14. Legal information......................................................14
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 1 April 2021
©
74LVT16543A
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 4 — 1 April 2021
15 / 15
相关型号:
74LVT16543ADGG-T
LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, 6.10 MM, PLASTIC, MO-153EE, SOT364-1, TSSOP2-56
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74LVT16543DGGRG4
LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, GREEN, TSSOP-56
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