74LVT573PW [NEXPERIA]

3.3 V octal D-type transparent latch; 3-stateProduction;


型号：	74LVT573PW
厂家：	Nexperia
描述：	3.3 V octal D-type transparent latch; 3-stateProduction
文件：	总15页 (文件大小：259K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

74LVT573

3.3 V octal D-type transparent latch; 3-state

Rev. 9 — 30 July 2021

Product data sheet

1. General description

The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch

enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches.

In this condition the latches are transparent, a latch output will change each time its corresponding

D-input changes. When LE is LOW the latches store the information that was present at the inputs

a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to

assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the

latches. Bus hold data inputs eliminate the need for external pull-up resistors to define unused

inputs

2. Features and benefits

•

Wide supply voltage range from 2.7 to 3.6 V

•

Inputs and outputs arranged for easy interfacing to microprocessors

3-state outputs for bus interfacing

Common output enable control

Overvoltage tolerant inputs to 5.5 V

BiCMOS high speed and output drive

Direct interface with TTL levels

Input and output interface capability to systems at 5 V supply

Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

Live insertion and extraction permitted

No bus current loading when output is tied to 5 V bus

Power-up reset

Power-up 3-state

I_OFFcircuitry provides partial Power-down mode operation

Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

ESD protection:

•

HBM JESD22-A114E exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

•

Specified from -40 °C to +85 °C

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74LVT573D

-40 °C to +85 °C

SO20

plastic small outline package; 20 leads;

body width 7.5 mm

SOT163-1

SOT360-1

SOT764-1

74LVT573PW

74LVT573BQ

TSSOP20

plastic thin shrink small outline package; 20 leads;

body width 4.4 mm

DHVQFN20 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 20 terminals;

body 2.5 × 4.5 × 0.85 mm

4. Functional diagram

EN1

mna807

mna808

Fig. 1. Logic symbol

Fig. 2. IEC logic symbol

LATCH

LE LE

mna810

Fig. 3. Logic diagram

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

2 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

5. Pinning information

5.1. Pinning

74LVT573

terminal 1

index area

74LVT573

(1)

GND

001aah712

Transparent top view

(1) This is not a ground pin. There is no electrical or

mechanical requirement to solder the pad. In case

soldered, the solder land should remain floating or

connected to GND.

GND

001aah713

Fig. 4. Pin configuration SOT163-1 (SO20) and

SOT360-1 (TSSOP20)

Fig. 5. Pin configuration SOT764-1 (DHVQFN20)

5.2. Pin description

Table 2. Pin description

Symbol

Description

output enable input (active LOW)

data input

D0, D1, D2, D3, D4, D5, D6, D7

2, 3, 4, 5, 6, 7, 8, 9

GND

ground (0 V)

latch enable (active HIGH)

Q0, Q1, Q2, Q3, Q4 ,Q5, Q6, Q7

V_CC

19, 18, 17, 16, 15, 14, 13, 12

data output

supply voltage

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

3 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

6. Functional description

Table 3. Function table

H = HIGH voltage level; h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition;

L = LOW voltage level; l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition;

↓ = HIGH-to-LOW latch enable transition;

Z = high-impedance OFF-state; NC = no change; X = don’t care.

Operating mode

Control OE

Control LE

Input Dn

Internal register Output Qn

Load and read register

enable

Latch and read register

↓

Hold

Disable outputs

7. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Max

+4.6

+7.0

-50

Unit

V_CC

V_I

supply voltage

-0.5

input voltage

[1]

-0.5

V_O

I_IK

output voltage

output in OFF-state or HIGH-state

V_I< 0 V

-0.5

input clamping current

output clamping current

output current

°C

I_OK

I_O

V_O< 0 V

-50

output in LOW-state

output in HIGH-state

128

-64

-65

T_stg

T_j

storage temperature

junction temperature

total power dissipation

+150

150

500

[2]

°C

P_tot

T_amb= -40 °C to +85 °C

[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction

temperatures which are detrimental to reliability.

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

4 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

8. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol Parameter

Conditions

Min

Typ

Max Unit

V_CC

V_I

supply voltage

2.7

3.6

5.5

input voltage

V_IH

V_IL

I_OH

I_OL

HIGH-level input voltage

LOW-level input voltage

HIGH-level output current

LOW-level output current

2.0

0.8

-32

°C

ns/V

current duty cycle ≤ 50 %; f_i≥ 1 kHz

in free air

T_amb

ambient temperature

-40

+85

Δt/ΔV

input transition rise and fall rate

outputs enabled

9. Static characteristics

Table 6. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

T_amb= -40 °C to +85 °C

Unit

Min

Typ [1]

Max

V_IK

input clamping voltage

V_CC= 2.7 V; I_IK= -18 mA

V_CC= 2.7 V to 3.6 V; I_OH= -100 μA

V_CC= 2.7 V; I_OH= -8 mA

V_CC= 3.0 V; I_OH= -32 mA

V_CC= 2.7 V; I_OL= 100 μA

V_CC= 2.7 V; I_OL= 24 mA

V_CC= 3.0 V I_OL= 16 mA

V_CC= 3.0 V I_OL= 32 mA

V_CC= 3.0 V I_OL= 64 mA

-1.2

-0.9

V_OH

HIGH-level output voltage

V_CC- 0.2 V_CC- 0.1

2.4

2.5

2.2

2.0

V_OL

LOW-level output voltage

0.1

0.2

0.5

0.4

0.5

0.55

0.3

0.25

0.3

0.4

V_OL(pu)power-up LOW-level output

voltage

V_CC= 3.6 V; I_O= 1 mA;

V_I= GND or V_CC

[2]

0.13

I_I

input leakage current

all input pins;

V_CC= 0 V or 3.6 V; V_I= 5.5 V

control pins;

±1

μA

V_CC= 3.6 V; V_CCor GND

data pins

±0.1

V_CC= 3.6 V; V_I= V_CC

V_CC= 3.6 V; V_I= 0 V

V_CC= 0 V; V_Ior V_O= 0 V to 4.5 V

Dn input; V_CC= 3 V; V_I= 0.8 V

Dn input; V_CC= 3 V; V_I= 2.0 V

[3]

-5

0.1

-1

μA

I_OFF

power-off leakage current

bus hold LOW current

bus hold HIGH current

±100

I_BHL

[4]

150

-150

I_BHH

I_BHHO

-75

500

bus hold HIGH overdrive current Dn input; V_CC= 3.6 V;

V_I= 0 V to 3.6 V

I_BHLO

bus hold LOW overdrive current

Dn input; V_CC= 3.6 V;

V_I= 0 V to 3.6 V

-500

μA

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

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74LVT573

3.3 V octal D-type transparent latch; 3-state

Symbol Parameter

Conditions

T_amb= -40 °C to +85 °C

Unit

Min

Typ [1]

Max

I_LO

output leakage current

Qn output HIGH when V_O= 5.5 V

and V_CC= 3.0 V

125

μA

I_O(pu/pd)power-up/power-down output

current

V_CC≤ 1.2 V; V_O= 0.5 V to V_CC

;

[5]

±100

V_I= GND or V_CC; OE = don’t care

V_CC= 3.6 V; V_I= V_IHor V_IL

output HIGH: V_O= 3.0 V

I_OZ

OFF-state output current

μA

output LOW: V_O= 0.5 V

-5

-1

I_CC

supply current

V_CC= 3.6 V; V_I= GND or V_CC

;

I_O= 0 A

outputs HIGH

outputs LOW

outputs disabled

0.13

0.19

[6]

[7]

0.13

0.1

0.19

0.2

ΔI_CC

additional supply current

per input pin; V_CC= 3 V to 3.6 V;

one input at V_CC- 0.6 V and other

inputs at V_CCor GND

C_I

input capacitance

output capacitance

V_I= 0 V or 3.0 V

C_O

outputs disabled; V_O= 0 V or 3.0 V

[1] Typical values are measured at V_CC= 3.3 V and T_amb= 25 °C.

[2] For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.

[3] Unused pins at V_CCor GND.

[4] This is the bus hold overdrive current required to force the input to the opposite logic state.

[5] This parameter is valid for any V_CCbetween 0 V and 1.2 V with a transition time of up to 10 ms.

From V_CC= 1.2 V to V_CC= 3.3 V ± 0.3 V a transition time of 100 μs is permitted. This parameter is valid for T_amb= 25 °C only.

[6] I_CCis measured with outputs pulled to V_CCor GND.

[7] This is the increase in supply current for each input at the specified voltage level other than V_CCor GND.

74LVT573

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Product data sheet

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6 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

10. Dynamic characteristics

Table 7. Dynamic characteristics

Voltages are referenced to ground (GND = 0 V); for test circuit see Fig. 11.

Symbol Parameter

Conditions

T_amb= -40 °C to +85 °C Unit

Min

Typ [1] Max

t_PLH

LOW to HIGH propagation

delay

LE to Qn; see Fig. 6

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

1.6

3.5

5.6

6.3

Dn to Qn; see Fig. 7

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

1.0

2.5

4.2

4.7

t_PHL

HIGH to LOW propagation

delay

LE to Qn; see Fig. 6

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

2.5

4.3

6.5

7.2

Dn to Qn; see Fig. 7

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

1.0

2.7

4.3

5.2

t_PZH

t_PZL

t_PHZ

t_PLZ

t_su

OFF-state to HIGH

propagation delay

OE to Qn; see Fig. 8

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

1.0

2.8

5.1

6.2

OFF-state to LOW

propagation delay

OE to Qn; see Fig. 9

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

1.3

3.3

5.5

6.6

HIGH to OFF-state

propagation delay

OE to Qn; see Fig. 8

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

2.0

3.7

5.7

6.7

LOW to OFF-state

propagation delay

OE to Qn; see Fig. 9

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

1.5

3.0

4.6

5.1

set-up time

hold time

Dn to LE; see Fig. 10

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

[2]

[3]

[4]

0.7

0.6

t_h

Dn to LE; see Fig. 10

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

1.6

1.8

t_W

pulse width

LE input HIGH; see Fig. 6

V_CC= 3.0 V to 3.6 V

V_CC= 2.7 V

3.3

[1] Typical values are at V_CC= 3.3 V and T_amb= 25 °C.

[2] t_suis the same as t_su(L)and t_su(H)

[3] t_his the same as t_h(L)and t_h(H)

[4] t_Wis the same as t_WLand t_WH

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

7 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

10.1. Waveforms and test circuit

LE input

0 V

Dn input

0 V

PLH

PHL

PLH

PHL

Qn output

001aai743

001aai742

Measurement points are given in Table 8.

V_OLand V_OHare typical voltage output levels that

occur with the output load.

V_OLand V_OHare typical voltage output levels that

occur with the output load.

Fig. 6. Propagation delays latch enable input (LE) to

output (Qn), and latch enable (LE) pulse width

Fig. 7. Propagation delay data input (Dn) to output (Qn)

OE input

0 V

OE input

0 V

PZH

PHZ

PZL

PLZ

3.0 V

Qn output

0 V

Qn output

001aai745

001aai746

Measurement points are given in Table 8.

V_OHis a typical voltage output level that occurs with

the output load.

V_OLis a typical voltage output level that occurs with

the output load.

Fig. 8. Output enable time to HIGH-state and output

disable time from HIGH-state

Fig. 9. Output enable time to LOW-state and output

disable time from LOW-state

Dn input

0 V

h(H)

h(L)

su(H)

su(L)

LE input

0 V

001aai744

Measurement points are given in Table 8.

The shaded areas indicate when the input is permitted to change for predictable output performance.

Fig. 10. Data setup and hold times for data (Dn) and latch enable (LE) inputs

Table 8. Measurement points

Input

V_M

Output

V_M

V_X

V_Y

1.5 V

V_OL+ 0.3 V

V_OH- 0.3 V

74LVT573

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Product data sheet

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Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

90 %

negative

pulse

10 %

0 V

90 %

positive

pulse

10 %

0 V

EXT

PULSE

GENERATOR

DUT

001aae235

Test data is given in Table 9.

Definitions test circuit:

R_L= Load resistance.

C_L= Load capacitance including jig and probe capacitance.

R_T= Termination resistance should be equal to output impedance Z_oof the pulse generator.

V_EXT= Test voltage for switching times.

Fig. 11. Test circuit for measuring switching times

Table 9. Test data

Input

V_I

Load

C_L

V_EXT

f_i

t_W

t_r, t_f

R_L

t_PHZ, t_PZH

GND

t_PLZ, t_PZL

t_PLH, t_PHL

2.7 V

≤ 10 MHz

500 ns

≤ 2.5 ns

50 pF

500 Ω

6 V

open

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

9 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

11. Package outline

SO20: plastic small outline package; 20 leads; body width 7.5 mm

SOT163-1

(A )

pin 1 index

detail X

10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

max.

(1)

UNIT

0.3

0.1

2.45

2.25

0.49

0.36

0.32

0.23

13.0

12.6

7.6

7.4

10.65

10.00

1.1

0.4

1.1

1.0

0.9

0.4

2.65

0.1

0.25

0.01

1.27

0.05

1.4

0.25 0.25

0.1

8^o

0^o

0.012 0.096

0.004 0.089

0.019 0.013 0.51

0.014 0.009 0.49

0.30

0.29

0.419

0.394

0.043 0.043

0.016 0.039

0.035

0.016

inches

0.055

0.01 0.01 0.004

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT163-1

075E04

MS-013

Fig. 12. Package outline SOT163-1 (SO20)

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

10 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm

SOT360-1

(A )

pin 1 index

detail X

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

(2)

(1)

UNIT

max.

8^o

0^o

0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

6.6

6.4

4.5

4.3

6.6

6.2

0.75

0.50

0.4

0.3

0.5

0.2

1.1

0.65

0.2

0.13

0.1

0.25

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT360-1

MO-153

Fig. 13. Package outline SOT360-1 (TSSOP20)

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

11 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

20 terminals; body 2.5 x 4.5 x 0.85 mm

SOT764-1

detail X

terminal 1

index area

terminal 1

index area

A B

2.5

5 mm

scale

Dimensions (mm are the original dimensions)

(1) (1)

(1)

Unit

max 1.00 0.05 0.30

4.6 3.15 2.6 1.15

0.5

nom

min

0.90 0.02 0.25 0.2 4.5 3.00 2.5 1.00 0.5 3.5 0.4 0.1 0.05 0.05 0.1

0.80 0.00 0.18 4.4 2.85 2.4 0.85 0.3

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

sot764-1_po

Issue date

References

Outline

version

European

projection

IEC

- - -

JEDEC

JEITA

- - -

03-01-27

14-12-12

SOT764-1

MO-241

Fig. 14. Package outline SOT764-1 (DHVQFN20)

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

12 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

12. Abbreviations

Table 10. Abbreviations

Acronym

BiCMOS

DUT

Description

Bipolar Complementary Metal Oxide Semiconductor

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

Machine Model

TTL

Transistor-Transistor Logic

13. Revision history

Table 11. Revision history

Document ID

Release date Data sheet status

20210730 Product data sheet

Change notice Supersedes

74LVT573 v.9

Modifications:

74LVT573 v.8

•

The format of this data sheet has been redesigned to comply with the identity

guidelines of Nexperia.

•

Legal texts have been adapted to the new company name where appropriate.

Type number 74LVT573DB (SOT339-1/SSOP20) removed.

Section 1 and Section 2 updated.

Section 7: Derating values for P_tottotal power dissipation removed.

Fig. 14: Package outline drawing SOT764-1 (DHVQFN20) updated.

74LVT573 v.8

Modifications:

20111122

Product data sheet

74LVT573 v.7

•

Legal pages updated.

74LVT573 v.7

74LVT573 v.6

74LVT573 v.5

74LVT573 v.4

74LVT573 v.3

74LVT573 v.2

20110912

20110727

20110629

20080915

20011217

19980219

Product data sheet

Product specification

74LVT573 v.6

74LVT573 v.5

74LVT573 v.4

74LVT573 v.3

74LVT573 v.2

74LVT573

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Product data sheet

Rev. 9 — 30 July 2021

13 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

injury, death or severe property or environmental damage. Nexperia and its

suppliers accept no liability for inclusion and/or use of Nexperia products in

such equipment or applications and therefore such inclusion and/or use is at

the customer’s own risk.

14. Legal information

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Data sheet status

Document status Product

Definition

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. Nexperia makes no representation

or warranty that such applications will be suitable for the specified use

without further testing or modification.

[1][2]

status [3]

Objective [short]

data sheet

Development

This document contains data from

the objective specification for

product development.

Customers are responsible for the design and operation of their applications

and products using Nexperia products, and Nexperia accepts no liability for

any assistance with applications or customer product design. It is customer’s

sole responsibility to determine whether the Nexperia product is suitable

and fit for the customer’s applications and products planned, as well as

for the planned application and use of customer’s third party customer(s).

Customers should provide appropriate design and operating safeguards to

minimize the risks associated with their applications and products.

Preliminary [short]

data sheet

Qualification

Production

This document contains data from

the preliminary specification.

Product [short]

data sheet

This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

Nexperia does not accept any liability related to any default, damage, costs

or problem which is based on any weakness or default in the customer’s

applications or products, or the application or use by customer’s third party

customer(s). Customer is responsible for doing all necessary testing for the

customer’s applications and products using Nexperia products in order to

avoid a default of the applications and the products or of the application or

use by customer’s third party customer(s). Nexperia does not accept any

liability in this respect.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case of

multiple devices. The latest product status information is available on

the internet at https://www.nexperia.com.

Definitions

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. Nexperia does not give any representations or

warranties as to the accuracy or completeness of information included herein

and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

intended for quick reference only and should not be relied upon to contain

detailed and full information. For detailed and full information see the relevant

full data sheet, which is available on request via the local Nexperia sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

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sold subject to the general terms and conditions of commercial sale, as

published at http://www.nexperia.com/profile/terms, unless otherwise agreed

in a valid written individual agreement. In case an individual agreement is

concluded only the terms and conditions of the respective agreement shall

apply. Nexperia hereby expressly objects to applying the customer’s general

terms and conditions with regard to the purchase of Nexperia products by

customer.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

Nexperia and its customer, unless Nexperia and customer have explicitly

agreed otherwise in writing. In no event however, shall an agreement be

valid in which the Nexperia product is deemed to offer functions and qualities

beyond those described in the Product data sheet.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

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or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Disclaimers

Limited warranty and liability — Information in this document is believed

to be accurate and reliable. However, Nexperia does not give any

representations or warranties, expressed or implied, as to the accuracy

or completeness of such information and shall have no liability for the

consequences of use of such information. Nexperia takes no responsibility

for the content in this document if provided by an information source outside

of Nexperia.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific Nexperia product is automotive qualified, the

product is not suitable for automotive use. It is neither qualified nor tested in

accordance with automotive testing or application requirements. Nexperia

accepts no liability for inclusion and/or use of non-automotive qualified

products in automotive equipment or applications.

In no event shall Nexperia be liable for any indirect, incidental, punitive,

special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal

or replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards,

customer (a) shall use the product without Nexperia’s warranty of the

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

Nexperia’s specifications such use shall be solely at customer’s own risk,

and (c) customer fully indemnifies Nexperia for any liability, damages or failed

product claims resulting from customer design and use of the product for

automotive applications beyond Nexperia’s standard warranty and Nexperia’s

product specifications.

Notwithstanding any damages that customer might incur for any reason

whatsoever, Nexperia’s aggregate and cumulative liability towards customer

for the products described herein shall be limited in accordance with the

Terms and conditions of commercial sale of Nexperia.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Right to make changes — Nexperia reserves the right to make changes

to information published in this document, including without limitation

specifications and product descriptions, at any time and without notice. This

document supersedes and replaces all information supplied prior to the

publication hereof.

Trademarks

Suitability for use — Nexperia products are not designed, authorized or

warranted to be suitable for use in life support, life-critical or safety-critical

systems or equipment, nor in applications where failure or malfunction

of an Nexperia product can reasonably be expected to result in personal

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

74LVT573

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 9 — 30 July 2021

14 / 15

Nexperia

74LVT573

3.3 V octal D-type transparent latch; 3-state

Contents

1. General description......................................................1

2. Features and benefits.................................................. 1

3. Ordering information....................................................2

4. Functional diagram.......................................................2

5. Pinning information......................................................3

5.1. Pinning.........................................................................3

5.2. Pin description.............................................................3

6. Functional description................................................. 4

7. Limiting values............................................................. 4

8. Recommended operating conditions..........................5

9. Static characteristics....................................................5

10. Dynamic characteristics............................................ 7

10.1. Waveforms and test circuit........................................ 8

11. Package outline........................................................ 10

12. Abbreviations............................................................13

13. Revision history........................................................13

14. Legal information......................................................14

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 30 July 2021

74LVT573

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 9 — 30 July 2021

15 / 15

74LVT573PW [NEXPERIA]

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