HEF4007UBT [NEXPERIA]
Dual complementary pair and inverterProduction;
| 型号： | HEF4007UBT |
| 厂家： | 
Nexperia |
| 描述： | Dual complementary pair and inverterProduction 光电二极管 逻辑集成电路 |
| 文件： | 总15页 (文件大小：194K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HEF4007UB
Dual complementary pair and inverter
Rev. 4 — 31 August 2017
Product data sheet
1 General description
The HEF4007UB is a dual complementary pair and an inverter with access to each
device. It has three n-channel and three p-channel enhancement mode MOS transistors.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to
VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2 Features and benefits
• Fully static operation
• 5 V, 10 V, and 15 V parametric ratings
• Standardized symmetrical output characteristics
• Specified from -40 °C to +85 °C
• Complies with JEDEC standard JESD 13-B
• Inputs and outputs are protected against electrostatic effects
3 Ordering information
Table 1.ꢀOrdering information
Type number Package
Temperature
range
Name
Description
Version
HEF4007UBT -40 °C to +85 °C
SO14
plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
4 Functional diagram
13
2
1
11
SP3
DP1
SP2 DP2
V
DD
14
12
7
P
N
P
N
P
N
G1
6
DN/P3
V
SS
DN1 G2
3
SN2 DN2 G3
10
SN3
aaa-027311
8
4
5
9
Figure 1.ꢀLogic diagram
Nexperia
HEF4007UB
Dual complementary pair and inverter
5 Pinning information
5.1 Pinning
HEF4007UB
1
2
3
4
5
6
7
14
13
12
11
10
9
DP2
SP2
G2
V
DD
DP1
DN/P3
SP3
G3
SN2
DN2
G1
SN3
DN1
8
V
SS
aaa-027312
Figure 2.ꢀPin configuration SO14
5.2 Pin description
Table 2.ꢀPin description
Symbol
DP1, DP2
SP2, SP3
G1, G2, G3
SN2, SN3
DN1, DN2
DN/P3
Pin
13, 1
2, 11
6, 3, 10
4, 9
8, 5
12
Description
drain connections from the 1st and 2nd p-channel transistors
source connections to 2nd and 3rd p-channel transistors
gate connections to n-channel and p-channel of the three transistor pairs
source connections to the 2nd and 3rd n-channel transistors
drain connection from the 1st and 2nd n-channel transistors
common connection to the 3rd p-channel and n-channel transistor drains
ground (0 V)
VSS
7
VDD
14
supply voltage
HEF4007UB
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
2 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
6 Limiting values
Table 3.ꢀLimiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
-0.5
-
Max
+18
Unit
V
VDD
IIK
supply voltage
input clamping current
input voltage
±10
mA
V
VI
-0.5
-
VDD + 0.5
±10
IOK
II/O
output clamping current
input/output current
supply current
mA
mA
mA
°C
-
±10
IDD
Tstg
Tamb
Ptot
-
50
storage temperature
ambient temperature
total power dissipation
-65
-40
+150
+85
°C
Tamb = -40 °C to + 85 °C
SO14
[1]
-
-
500
100
mW
mW
P
power dissipation
per output
[1] For SO14 packages: above Tamb = 70 °C, Ptot derates linearly with 8 mW/K.
7 Recommended operating conditions
Table 4.ꢀRecommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
15
Unit
V
VDD
VI
supply voltage
3
0
-
-
-
-
-
-
input voltage
VDD
+85
3.75
0.5
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
in free air
-40
-
°C
VDD = 5 V
VDD = 10 V
VDD = 15 V
μs/V
μs/V
μs/V
-
-
0.08
HEF4007UB
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
3 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
8 Static characteristics
Table 5.ꢀStatic characteristics
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.
Symbol Parameter
Conditions
VDD Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Unit
Min
Max
Min
Max
Min
Max
VIH
HIGH-level
input voltage
VΟ = 0.5 V or 4.5 V;
|IO| < 1 μA
5 V
4
-
4
-
4
-
V
V
V
V
V
V
VΟ = 1.0 V or 9.0 V;
|IO| < 1 μA
10 V
8
-
-
8
-
-
8
-
-
VΟ = 1.5 V or 13.5 V;
|IO| < 1 μA
15 V 12.5
12.5
12.5
VIL
LOW-level input VΟ = 0.5 V or 4.5 V;
voltage
5 V
-
1
-
-
-
1
-
-
-
1
|IO| < 1 μA
VΟ = 1.0 V or 9.0 V;
|IO| < 1 μA
10 V
15 V
5 V
-
-
2
2
2
VΟ = 1.5 V or 13.5 V;
|IO| < 1 μA
2.5
2.5
2.5
VOH
VOL
IOH
HIGH-level
output voltage
VI = VSS or VDD; |IO| < 1 μA
4.95
-
-
4.95
-
-
4.95
-
V
V
V
V
V
V
10 V 9.95
15 V 14.95
9.95
9.95
-
-
14.95
-
14.95
-
LOW-level
output voltage
VI = VSS or VDD; |IO| < 1 μA
5 V
-
0.05
0.05
0.05
-1.7
-0.52
-1.3
-3.6
-
-
0.05
0.05
0.05
-1.4
-0.44
-1.1
-3.0
-
-
0.05
0.05
0.05
10 V
15 V
5 V
-
-
-
-
-
-
HIGH-
level output
(source)current
VO = 2.5 V; VI = 0 V
VO = 4.6 V; VI = 0 V
VO = 9.5 V; VI = 0 V
VO = 13.5 V; VI = 0 V
VO = 0.4 V; VI = 5 V
VO = 0.5 V; VI = 10 V
VO = 1.5 V; VI = 15 V
VI = 0 V to 15 V
-
-
-
-1.1 mA
-0.36 mA
-0.9 mA
-2.4 mA
5 V
-
-
-
-
-
-
10 V
15 V
5 V
-
-
-
IOL
LOW-level
output
(sink)current
0.52
1.3
3.6
-
0.44
1.1
3.0
-
0.36
0.9
2.4
-
-
-
-
mA
mA
mA
10 V
15 V
15 V
-
-
-
-
II
input leakage
current
±0.3
±0.3
±1.0 μA
IDD
supply current all valid input combinations;
VI = VSS or VDD; IO = 0 A
5 V
-
-
-
1.0
2.0
4.0
-
-
-
1.0
2.0
4.0
-
-
-
7.5 μA
10 V
15 V
15.0 μA
30.0 μA
HEF4007UB
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
4 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
9 Dynamic characteristics
Table 6.ꢀDynamic characteristics
Tamb = 25 °C; for waveforms see Figure 3; for test circuit see Figure 4; unless otherwise specified.
Symbol Parameter
Conditions
Extrapolation formula [1] VDD Min
Typ
40
20
15
40
20
15
60
30
20
Max Unit
tPHL
tPLH
tt
HIGH to LOW
propagation delay
Gn to Dn or DP 13 + 0.55 × CL
9 + 0.23 × CL
5 V
-
-
-
-
-
-
-
-
-
80
40
30
75
40
30
ns
ns
ns
ns
ns
ns
10 V
15 V
5 V
7 + 0.16 × CL
LOW to HIGH
propagation delay
Gn to Dn or DP 13 + 0.55 × CL
9 + 0.23 × CL
10 V
15 V
5 V
7 + 0.16 × CL
[2]
output transition time
10 + 1.0 × CL
120 ns
9 + 0.42 × CL
10 V
15 V
60
40
ns
ns
6 + 0.28 × CL
[1] The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).
[2] tt is the same as tTHL and tTLH
.
Table 7.ꢀ Dynamic power dissipation
VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.
Symbol Parameter
VDD Typical formula
Where
PD
dynamic power
dissipation
5 V PD = 4500 × fi + Σ(fo × CL) × VDD2 (μW)
10 V PD = 20000 × fi + Σ(fo × CL) × VDD2 (μW)
15 V PD = 50000 × fi + Σ(fo × CL) × VDD2 (μW)
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
Σ(fo × CL) = sum of the outputs;
VDD = supply voltage in V.
HEF4007UB
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
5 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
9.1 Waveforms and test circuit
t
t
f
r
V
I
90 %
input
V
M
10 %
0 V
t
t
PLH
PHL
V
OH
90 %
output
V
M
10 %
V
OL
t
t
THL
TLH
001aag197
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Figure 3.ꢀPropagation delay, output transition time
Table 8.ꢀMeasurement points
Supply voltage
VDD
Input
VM
Output
VM
5 V to 15 V
0.5VDD
0.5VDD
V
DD
V
V
O
I
G
DUT
C
L
R
T
001aag182
Test data is given in Table 9.
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Figure 4.ꢀTest circuit for measuring switching times
Table 9.ꢀTest data
Supply voltage
VDD
Input
VI
Load
CL
tr, tf
5 V to 15 V
VSS or VDD
≤ 20 ns
50 pF
HEF4007UB
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
6 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
9.2 Characteristics
aaa-027313
aaa-027314
5
1
10
10
V
O
V
(V)
I
V
(V)
I
D
(mA)
O
D
O
V
O
(mA)
2.5
0.5
5
5
I
D
I
D
0
0
0
0
0
2.5
5
0
5
10
V (V)
I
V (V)
I
a. VDD = 5 V; Tamb = 25 °C
b. VDD = 10 V; Tamb = 25 °C
aaa-027315
20
20
V
I
D
O
(V)
(mA)
V
O
10
10
I
D
0
0
0
10
20
V (V)
I
c. VDD = 15 V; Tamb = 25 °C
Figure 5.ꢀTypical drain current ID and output voltage VO as functions of input voltage
HEF4007UB
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
7 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
10 Application information
Some examples of applications for the HEF4007UB are:
• High input impedance amplifiers
• Linear amplifiers
• (Crystal) oscillators
• High-current sink and source drivers
• High impedance buffers
Note:
Rules for maintaining electrical isolation between transistors and monolithic substrate:
• The VDD supply pin (Pin 14) must be maintained at the most positive (or equally
positive) potential with respect to any other pin of the HEF4007UB.
• The VSS ground pin (Pin 7) must be maintained at the most positive (or equally
positive) potential with respect to any other pin of the HEF4007UB.
Violation of these rules will result in improper transistor operation and/or possible
permanent damage to the HEF4007UB.
Figure 6 and Figure 7 show voltage gain and supply current. Figure 8 shows the test
set-up and an example of an analog amplifier using one HEF4007UB.
001aag156
001aag157
75
20
I
DD
(mA)
gain
(V /V )
O
I
15
50
typ
typ
10
5
25
0
0
0
5
10
15
0
5
10
15
V
(V)
V
(V)
DD
DD
Figure 6.ꢀTypical voltage gain as a function of supply
voltage
Figure 7.ꢀTypical supply current as a function of supply
voltage
330 kΩ
1/3 HEF4007UB
aaa-027316
Figure 8.ꢀTest set-up
HEF4007UB
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
8 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
Figure 9 shows typical forward transconductance and Figure 10 shows the test set-up.
001aag164
10
g
fs
(mA/V)
(1)
(2)
7.5
5.0
2.5
0
R
bias
= 560 kΩ
(3)
V
DD
0.47 µF
100 µF
input
output
V
i
I
o
A
0
5
10
15
V
(V)
DD
V
SS
001aag163
(1) Average +2σ; where: ‘σ’ is the standard deviation.
(2) Average.
at VO is constant.
(3) Average -2σ; where: ‘σ’ is the standard deviation.
fi = 1 kHz
Figure 10.ꢀTest set-up
Figure 9.ꢀTypical forward transconductance as a
function of supply voltage at Tamb = 25 °C
Figure 11, Figure 12, Figure 13 and Figure 14 show some applications in which the
HEF4007UB is used.
V
DD
P
P
N
V
DD
13
8
13
8
6
4 MHz
input
6
4.7 kΩ
5
12
output
N
10 MΩ
100 pF
2.5 pF
N
N
4
9
V
V
SS
SS
aaa-027318
3
10
aaa-027317
Figure 11.ꢀ4 MHz crystal oscillator
Figure 12.ꢀHigh current sink driver
HEF4007UB
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
9 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
V
SS
2
3
10
6
P
P
disable
1
11
V
DD
V
DD
12
2
1
11
12
input
output
P
P
V
SS
P
N
N
N
9
8
13
8
output
6
input
disable
V
SS
7
SS
V
aaa-027319
3
10
aaa-027320
Figure 13.ꢀHigh current source driver
Figure 14.ꢀHigh impedance buffer
Table 10.ꢀFunction table [1]
For Figure 14. High impedance buffer
Input
Disable
Output
H
L
L
L
H
L
H
Z
X
[1] H = HIGH state (the more positive voltage);
L = LOW state (the less positive voltage);
X = state is immaterial
Z = HIGH-impedance OFF-state
HEF4007UB
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
10 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
11 Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
v
c
y
H
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Figure 15.ꢀPackage outline SOT108-1 (SO14)
HEF4007UB
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
11 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
12 Abbreviations
Table 11.ꢀAbbreviations
Acronym
DUT
Description
Device Under Test
MOS
Metal Oxide Semiconductor
13 Revision history
Table 12.ꢀRevision history
Document ID
HEF4007UB v.4
Modifications:
Release date Data sheet status
Change notice Supersedes
20170831
Product data sheet
-
HEF4007UB v.3
• The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
• Type number HEF4007UBP and HEF4007UBD removed.
HEF4007UB v.3
19951201
Product specification
-
-
HEF4007UB
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
12 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
14 Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Product [short] data sheet
Qualification
Production
This document contains data from the preliminary specification.
This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
14.2 Definitions
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
Draft — The document is a draft version only. The content is still under
such equipment or applications and therefore such inclusion and/or use is at
internal review and subject to formal approval, which may result in
the customer’s own risk.
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
Short data sheet — A short data sheet is an extract from a full data sheet
without further testing or modification. Customers are responsible for the
with the same product type number(s) and title. A short data sheet is
design and operation of their applications and products using Nexperia
intended for quick reference only and should not be relied upon to contain
products, and Nexperia accepts no liability for any assistance with
detailed and full information. For detailed and full information see the
applications or customer product design. It is customer’s sole responsibility
relevant full data sheet, which is available on request via the local Nexperia
to determine whether the Nexperia product is suitable and fit for the
sales office. In case of any inconsistency or conflict with the short data sheet,
customer’s applications and products planned, as well as for the planned
the full data sheet shall prevail.
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products. Nexperia does not accept
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
any liability related to any default, damage, costs or problem which is based
Nexperia and its customer, unless Nexperia and customer have explicitly
on any weakness or default in the customer’s applications or products, or
agreed otherwise in writing. In no event however, shall an agreement be
the application or use by customer’s third party customer(s). Customer is
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
14.3 Disclaimers
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
Limited warranty and liability — Information in this document is believed
damage to the device. Limiting values are stress ratings only and (proper)
to be accurate and reliable. However, Nexperia does not give any
operation of the device at these or any other conditions above those
representations or warranties, expressed or implied, as to the accuracy
given in the Recommended operating conditions section (if present) or the
or completeness of such information and shall have no liability for the
Characteristics sections of this document is not warranted. Constant or
consequences of use of such information. Nexperia takes no responsibility
repeated exposure to limiting values will permanently and irreversibly affect
for the content in this document if provided by an information source outside
the quality and reliability of the device.
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
or replacement of any products or rework charges) whether or not such
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
damages are based on tort (including negligence), warranty, breach of
in a valid written individual agreement. In case an individual agreement is
contract or any other legal theory. Notwithstanding any damages that
concluded only the terms and conditions of the respective agreement shall
customer might incur for any reason whatsoever, Nexperia's aggregate and
apply. Nexperia hereby expressly objects to applying the customer’s general
cumulative liability towards customer for the products described herein shall
terms and conditions with regard to the purchase of Nexperia products by
customer.
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
No offer to sell or license — Nothing in this document may be interpreted
Right to make changes — Nexperia reserves the right to make changes
or construed as an offer to sell products that is open for acceptance or
to information published in this document, including without limitation
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
HEF4007UB
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
13 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications. In the event that customer
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia
for any liability, damages or failed product claims resulting from customer
design and use of the product for automotive applications beyond Nexperia's
standard warranty and Nexperia's product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
14.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
HEF4007UB
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
14 / 15
Nexperia
HEF4007UB
Dual complementary pair and inverter
Contents
1
General description ............................................ 1
2
3
4
5
5.1
5.2
6
7
8
Features and benefits .........................................1
Ordering information .......................................... 1
Functional diagram .............................................1
Pinning information ............................................ 2
Pinning ...............................................................2
Pin description ...................................................2
Limiting values ....................................................3
Recommended operating conditions ................3
Static characteristics ..........................................4
Dynamic characteristics .....................................5
Waveforms and test circuit ................................6
Characteristics ................................................... 7
Application information ......................................8
Package outline .................................................11
Abbreviations .................................................... 12
Revision history ................................................ 12
Legal information ..............................................13
9
9.1
9.2
10
11
12
13
14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2017.
All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 31 August 2017
Document identifier: HEF4007UB
相关型号：
HEF4007UBTD
IC 4000/14000/40000 SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO14, PLASTIC, SO-14, Gate
NXP
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