HEF4013BT [NEXPERIA]

Dual D-type flip-flopProduction;
HEF4013BT
型号: HEF4013BT
厂家: Nexperia    Nexperia
描述:

Dual D-type flip-flopProduction

光电二极管 逻辑集成电路 触发器
文件: 总14页 (文件大小:242K)
中文:  中文翻译
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HEF4013B  
Dual D-type flip-flop  
Rev. 11 — 9 March 2023  
Product data sheet  
1. General description  
The HEF4013B is a dual D-type flip-flop with set and reset; positive-edge trigger. Inputs include  
clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in  
excess of VDD. Schmitt-trigger action on the clock input makes the circuit highly tolerant of slower  
clock rise and fall times.  
2. Features and benefits  
Wide supply voltage range from 3.0 V to 15.0 V  
CMOS low power dissipation  
High noise immunity  
Tolerant of slow clock rise and fall times  
Fully static operation  
5 V, 10 V, and 15 V parametric ratings  
Standardized symmetrical output characteristics  
Specified from -40 °C to +125 °C  
Complies with JEDEC standard JESD 13-B  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-B exceeds 200 V  
3. Applications  
Counters and dividers  
Registers  
Toggle flip-flops  
4. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range  
-40 °C to +125 °C  
Name  
Description  
Version  
HEF4013BT  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
HEF4013BTT  
-40 °C to +125 °C  
TSSOP14  
plastic thin shrink small outline package;  
14 leads; body width 4.4 mm  
SOT402-1  
 
 
 
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
5. Functional diagram  
6
5
1SD  
1D  
SD  
1
2
D
Q
Q
1Q  
1Q  
FF1  
3
1CP  
CP  
CD  
4
8
1CD  
2SD  
SD  
9
13  
12  
2D  
D
Q
Q
2Q  
2Q  
FF2  
11  
10  
2CP  
2CD  
CP  
CD  
001aag084  
Fig. 1. Functional diagram  
CP  
C
C
Q
C
C
C
C
C
C
D
Q
C
C
SD  
CD  
aaa-035288  
Fig. 2. Logic diagram (one flip-flop)  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
2 / 14  
 
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
6. Pinning information  
6.1. Pinning  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1Q  
1Q  
V
DD  
2Q  
1CP  
1CD  
1D  
2Q  
HEF4013B  
2CP  
2CD  
2D  
1SD  
8
V
2SD  
SS  
001aag085  
Fig. 3. Pin configuration for SOT108-1 (SO14) and SOT402-1 (TSSOP14)  
6.2. Pin description  
Table 2. Pin description  
Symbol  
1Q, 2Q  
1Q, 2Q  
1CP, 2CP  
1CD, 2CD  
1D, 2D  
1SD, 2SD  
VSS  
Pin  
1, 13  
2, 12  
3, 11  
4, 10  
5, 9  
6, 8  
7
Description  
true output  
complement output  
clock input (LOW to HIGH edge-triggered)  
asynchronous clear-direct input (active HIGH)  
data input  
asynchronous set-direct input (active HIGH)  
ground (0 V)  
VDD  
14  
supply voltage  
7. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH clock transition.  
Control  
Input  
nD  
X
Output  
nSD  
H
nCD  
L
nCP  
X
nQ  
H
L
nQ  
L
L
H
X
X
H
H
H
L
H
H
X
X
H
L
L
L
L
L
L
H
H
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
3 / 14  
 
 
 
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
8. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).  
Symbol  
VDD  
IIK  
Parameter  
Conditions  
Min  
Max  
+18  
Unit  
V
supply voltage  
-0.5  
input clamping current  
input voltage  
VI < -0.5 V or VI > VDD + 0.5 V  
VO < -0.5 V or VO > VDD + 0.5 V  
-
±10  
mA  
V
VI  
-0.5  
VDD + 0.5  
±10  
IOK  
output clamping current  
input/output current  
supply current  
-
mA  
mA  
mA  
°C  
II/O  
-
-
±10  
IDD  
50  
Tstg  
Tamb  
Ptot  
P
storage temperature  
ambient temperature  
total power dissipation  
power dissipation  
-65  
-40  
-
+150  
+125  
500  
°C  
Tamb = -40 °C to +125 °C  
per output  
[1]  
mW  
mW  
-
100  
[1] For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C.  
For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C.  
9. Recommended operating conditions  
Table 5. Recommended operating conditions  
Symbol  
VDD  
Parameter  
Conditions  
Min  
3
Max  
Unit  
supply voltage  
15  
V
VI  
input voltage  
0
VDD  
+125  
V
Tamb  
Δt/ΔV  
ambient temperature  
input transition rise and fall rate  
-40  
°C  
nCP, nCD, nD, nSD inputs  
VDD = 5 V  
-
-
-
3.75  
0.5  
μs/V  
μs/V  
μs/V  
VDD = 10 V  
VDD = 15 V  
0.08  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
4 / 14  
 
 
 
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
10. Static characteristics  
Table 6. Static characteristics  
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.  
Symbol Parameter  
Conditions  
VDD  
Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Tamb = +125 °C Unit  
Min  
3.5  
7.0  
11.0  
-
Max  
-
Min  
Max  
-
Min  
Max  
-
Min  
Max  
VIH  
HIGH-level  
input voltage  
|IO| < 1 μA  
5 V  
3.5  
3.5  
3.5  
-
-
V
V
V
V
V
V
V
V
V
V
V
V
10 V  
15 V  
5 V  
-
7.0  
-
7.0  
-
7.0  
-
11.0  
-
11.0  
-
11.0  
-
VIL  
LOW-level  
input voltage  
|IO| < 1 μA  
|IO| < 1 μA  
|IO| < 1 μA  
1.5  
3.0  
4.0  
-
-
1.5  
3.0  
4.0  
-
-
1.5  
3.0  
4.0  
-
-
1.5  
3.0  
4.0  
-
10 V  
15 V  
5 V  
-
-
-
-
-
-
-
-
VOH  
VOL  
IOH  
HIGH-level  
output voltage  
4.95  
9.95  
4.95  
4.95  
4.95  
10 V  
-
9.95  
-
9.95  
-
9.95  
-
15 V 14.95  
-
14.95  
-
14.95  
-
14.95  
-
LOW-level  
output voltage  
5 V  
-
0.05  
0.05  
0.05  
-1.7  
-0.64  
-1.6  
-4.2  
-
-
0.05  
0.05  
0.05  
-1.4  
-0.5  
-1.3  
-3.4  
-
-
0.05  
0.05  
0.05  
-1.1  
-0.36  
-0.9  
-2.4  
-
-
0.05  
0.05  
0.05  
10 V  
15 V  
5 V  
-
-
-
-
-
-
-
-
HIGH-level  
output current  
VO = 2.5 V  
VO = 4.6 V  
VO = 9.5 V  
VO = 13.5 V  
VO = 0.4 V  
VO = 0.5 V  
VO = 1.5 V  
-
-
-
-
-
-1.1 mA  
-0.36 mA  
-0.9 mA  
-2.4 mA  
5 V  
-
-
-
-
-
-
10 V  
15 V  
5 V  
-
-
-
-
-
IOL  
LOW-level  
output current  
0.64  
1.6  
4.2  
-
0.5  
1.3  
3.4  
-
0.36  
0.9  
2.4  
-
0.36  
0.9  
2.4  
-
-
-
-
mA  
mA  
mA  
10 V  
15 V  
15 V  
-
-
-
-
-
-
II  
input leakage  
current  
±0.1  
±0.1  
±1.0  
±1.0 μA  
IDD  
supply current all valid input 5 V  
combinations;  
-
-
-
-
1.0  
2.0  
4.0  
-
-
-
-
-
1.0  
2.0  
4.0  
7.5  
-
-
-
-
30  
60  
120  
-
-
-
-
-
30  
60  
μA  
μA  
10 V  
|IO| = 0 A  
15 V  
-
120 μA  
pF  
CI  
input  
-
capacitance  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
5 / 14  
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
11. Dynamic characteristics  
Table 7. Dynamic characteristics  
Tamb = 25 °C, unless otherwise specified. For test circuit see Fig. 6.  
Symbol Parameter  
Conditions  
VDD  
5 V  
Extrapolation formula  
[1] 83 + 0.55 × CL  
34 + 0.23 × CL  
Min  
-
Typ Max Unit  
tPHL  
HIGH to LOW  
nCP to nQ, nQ;  
see Fig. 4  
110 220 ns  
propagation delay  
10 V  
15 V  
5 V  
-
45  
30  
90 ns  
60 ns  
22 + 0.16 × CL  
-
nSD to nQ  
nCD to nQ  
[1] 73 + 0.55 × CL  
29 + 0.23 × CL  
-
100 200 ns  
10 V  
15 V  
5 V  
-
40  
30  
80 ns  
60 ns  
22 + 0.16 × CL  
-
[1] 73 + 0.55 × CL  
29 + 0.23 × CL  
-
100 200 ns  
10 V  
15 V  
5 V  
-
40  
30  
95  
40  
30  
75  
35  
25  
60  
30  
20  
60  
30  
20  
20  
10  
5
80 ns  
60 ns  
190 ns  
80 ns  
60 ns  
150 ns  
70 ns  
50 ns  
120 ns  
60 ns  
40 ns  
120 ns  
60 ns  
40 ns  
22 + 0.16 × CL  
-
tPLH  
LOW to HIGH  
nCP to nQ, nQ;  
see Fig. 4  
[1] 68 + 0.55 × CL  
29 + 0.23 × CL  
-
propagation delay  
10 V  
15 V  
5 V  
-
22 + 0.16 × CL  
-
nSD to nQ  
nCD to nQ  
see Fig. 4  
[1] 48 + 0.55 × CL  
24 + 0.23 × CL  
-
10 V  
15 V  
5 V  
-
17 + 0.16 × CL  
-
[1] 33 + 0.55 × CL  
19 + 0.23 × CL  
-
10 V  
15 V  
5 V  
-
12 + 0.16 × CL  
-
tt  
transition time  
set-up time  
hold time  
[1] 10 + 1.00 × CL  
9 + 0.42 × CL  
-
10 V  
15 V  
-
6 + 0.28 × CL  
-
tsu  
nD to nCP; see Fig. 4 5 V  
10 V  
15 V  
nD to nCP; see Fig. 4 5 V  
40  
25  
15  
20  
20  
15  
60  
30  
20  
50  
24  
20  
50  
24  
20  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
th  
0
10 V  
15 V  
5 V  
0
0
tW  
pulse width  
nCP input LOW;  
see Fig. 4  
30  
15  
10  
25  
12  
10  
25  
12  
10  
10 V  
15 V  
5 V  
nSD input HIGH;  
see Fig. 5  
10 V  
15 V  
5 V  
nCD input HIGH;  
see Fig. 5  
10 V  
15 V  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
6 / 14  
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
Symbol Parameter  
Conditions  
nSD input; see Fig. 5 5 V  
10 V  
15 V  
nCD input; see Fig. 5 5 V  
VDD  
Extrapolation formula  
Min  
+15  
15  
15  
40  
25  
25  
7
Typ Max Unit  
trec  
recovery time  
-5  
0
-
-
-
-
-
-
-
-
-
ns  
ns  
0
ns  
25  
10  
10  
14  
28  
40  
ns  
10 V  
15 V  
5 V  
ns  
ns  
fclk(max) maximum clock  
frequency  
see Fig. 4  
MHz  
MHz  
MHz  
10 V  
15 V  
14  
20  
[1] Typical values of the propagation delays and output transition times can be calculated with the extrapolation formulas (CL in pF).  
Table 8. Dynamic power dissipation  
VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.  
Symbol Parameter  
VDD Typical formula  
Where  
PD  
dynamic power dissipation 5 V PD = 850 × fi + Σ(fo × CL) × VDD 2 μW  
10 V PD = 3600 × fi + Σ(fo × CL) × VDD 2 μW  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
Σ(fo × CL) = sum of the outputs;  
VDD = supply voltage in V.  
15 V PD = 9000 × fi + Σ(fo × CL) × VDD 2 μW  
11.1. Waveforms and test circuit  
t
1/f  
W
clk(max)  
V
I
V
input nCP  
M
0 V  
t
t
su  
su  
t
t
r
f
t
t
h
h
V
I
V
input nD  
M
0 V  
t
t
PHL  
PLH  
t
t
t
t
V
OH  
V
Y
V
output nQ  
M
V
X
V
OL  
001aah016  
Set-up and hold times are shown as positive values but may be specified as negative values.  
The shaded areas indicate when the input is permitted to change for predictable output performance.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Measurement points are given in Table 9.  
Fig. 4. Set-up time, hold time, minimum clock pulse width, propagation delays and transition times  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
7 / 14  
 
 
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
V
I
input nCP  
0 V  
V
M
t
t
rec  
rec  
V
I
input nSD  
0 V  
V
M
t
W
V
I
V
input nCD  
0 V  
M
t
W
V
OH  
output nQ  
001aag088  
V
OL  
Recovery times are shown as positive values but may be specified as negative values.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Measurement points are given in Table 9.  
Fig. 5. nSD, nCD recovery time and pulse width  
Table 9. Measurement points  
Supply voltage  
VDD  
Input  
VM  
Output  
VM  
VX  
VY  
5 V to 15 V  
0.5VDD  
0.5VDD  
0.1VDD  
0.9VDD  
V
DD  
V
V
O
I
G
DUT  
C
L
R
T
001aag182  
Test and measurement data is given in Table 10;  
Definitions test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
Fig. 6. Test circuit for measuring switching times  
Table 10. Test data  
Supply voltage  
VDD  
Input  
Load  
CL  
VI  
tr, tf  
5 V to 15 V  
VSS or VDD  
≤ 20 ns  
50 pF  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
8 / 14  
 
 
 
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
12. Application information  
D
D
Q
Q
D
Q
Q
D
Q
Q
Q
FF  
1
FF  
2
FF  
n
CP  
CP  
CP  
clock  
001aag089  
Fig. 7. N-stage shift register  
D
Q
Q
D
Q
Q
D
Q
Q
FF  
1
FF  
2
FF  
n
clock  
CP  
CP  
CP  
Q
T-type flip-flop  
001aag090  
Fig. 8. Binary ripple up-counter; divide-by-2n  
D
Q
Q
D
Q
D
Q
Q
FF  
1
FF  
2
FF  
n
CP  
CP  
Q
CP  
Q
clock  
001aag091  
Fig. 9. Modified ring counter; divide-by-(n + 1)  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
9 / 14  
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
13. Package outline  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
7
e
detail X  
w
M
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
8.75  
8.55  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.75  
1.27  
0.05  
1.05  
0.25  
0.25  
0.1  
0.25  
0.01  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.35  
0.014 0.0075 0.34  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches  
0.041  
0.01 0.01 0.004  
0.069  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT108-1  
076E06  
MS-012  
Fig. 10. Package outline SOT108-1 (SO14)  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
10 / 14  
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
7
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.72  
0.38  
mm  
1.1  
0.65  
1
0.2  
0.13  
0.1  
0.25  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT402-1  
MO-153  
Fig. 11. Package outline SOT402-1 (TSSOP14)  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
11 / 14  
Nexperia  
HEF4013B  
Dual D-type flip-flop  
14. Abbreviations  
Table 11. Abbreviations  
Acronym  
CMOS  
DUT  
Description  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
MM  
Machine Model  
15. Revision history  
Table 12. Revision history  
Document ID  
HEF4013B v.11  
Modifications:  
Release date  
20230309  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
HEF4013B v.10  
Section 1 updated  
Fig. 2: Schmitt-trigger symbol removed (errata).  
HEF4013B v.10  
Modifications:  
20211123  
Product data sheet  
-
HEF4013B v.9  
The format of this data sheet has been redesigned to comply with the identity guidelines of  
Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Section 1 and Section 2 updated.  
Table 4: Derating values for Ptot total power dissipation updated.  
HEF4013B v.9  
Modifications:  
20151210  
Type number HEF4013BP (SOT27-1) removed.  
20111121 Product data sheet  
Legal pages updated.  
Changes in "General description", "Features and benefits" and "Applications".  
Product data sheet  
-
HEF4013B v.8  
HEF4013B v.8  
Modifications:  
-
HEF4013B v.7  
HEF4013B v.7  
20110913  
20091027  
20090619  
20080515  
19950101  
19950101  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product specification  
Product specification  
-
-
-
-
-
-
HEF4013B v.6  
HEF4013B v.5  
HEF4013B v.4  
HEF4013B_CNV v.3  
HEF4013B_CNV v.2  
-
HEF4013B v.6  
HEF4013B v.5  
HEF4013B v.4  
HEF4013B_CNV v.3  
HEF4013B_CNV v.2  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
12 / 14  
 
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
16. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
for the content in this document if provided by an information source outside  
of Nexperia.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified, the  
product is not suitable for automotive use. It is neither qualified nor tested in  
accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of non-automotive qualified  
products in automotive equipment or applications.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
Nexperia’s specifications such use shall be solely at customer’s own risk,  
and (c) customer fully indemnifies Nexperia for any liability, damages or failed  
product claims resulting from customer design and use of the product for  
automotive applications beyond Nexperia’s standard warranty and Nexperia’s  
product specifications.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Trademarks  
Suitability for use — Nexperia products are not designed, authorized or  
warranted to be suitable for use in life support, life-critical or safety-critical  
systems or equipment, nor in applications where failure or malfunction  
of an Nexperia product can reasonably be expected to result in personal  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
13 / 14  
 
Nexperia  
HEF4013B  
Dual D-type flip-flop  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Applications.................................................................. 1  
4. Ordering information....................................................1  
5. Functional diagram.......................................................2  
6. Pinning information......................................................3  
6.1. Pinning.........................................................................3  
6.2. Pin description.............................................................3  
7. Functional description................................................. 3  
8. Limiting values............................................................. 4  
9. Recommended operating conditions..........................4  
10. Static characteristics..................................................5  
11. Dynamic characteristics.............................................6  
11.1. Waveforms and test circuit........................................ 7  
12. Application information............................................. 9  
13. Package outline........................................................ 10  
14. Abbreviations............................................................12  
15. Revision history........................................................12  
16. Legal information......................................................13  
© Nexperia B.V. 2023. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 9 March 2023  
©
HEF4013B  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11 — 9 March 2023  
14 / 14  

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