PBSS5160DS [NEXPERIA]
60 V, 1 A PNP/PNP low VCEsat (BISS) transistorProduction;型号: | PBSS5160DS |
厂家: | Nexperia |
描述: | 60 V, 1 A PNP/PNP low VCEsat (BISS) transistorProduction |
文件: | 总15页 (文件大小:258K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
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Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
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Should be replaced with:
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PBSS5160DS
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
Rev. 03 — 9 October 2008
Product data sheet
1. Product profile
1.1 General description
PNP/PNP low VCEsat Breakthrough In Small Signal (BISS) transistor pair in a small
SOT457 (SC-74) Surface-Mounted Device (SMD) plastic package.
NPN complement: PBSS4160DS.
1.2 Features
I Low collector-emitter saturation voltage VCEsat
I High collector current capability IC and ICM
I High collector current gain (hFE) at high IC
I High efficiency due to less heat generation
I Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
I Dual low power switches (e.g. motors, fans)
I Automotive applications
1.4 Quick reference data
Table 1.
Symbol
VCEO
IC
Quick reference data
Parameter
Conditions
Min
Typ
Max
−60
−1
Unit
V
collector-emitter voltage
collector current
open base
-
-
-
-
-
-
[1]
[2]
A
ICM
peak collector current
single pulse;
tp ≤ 1 ms
−2
A
RCEsat
collector-emitter saturation IC = −1 A;
resistance IB = −100 mA
-
250
330
mΩ
[1] Device mounted on a ceramic PCB, Al2O3, standard footprint.
[2] Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
2. Pinning information
Table 2.
Pinning
Pin
1
Description
emitter TR1
base TR1
Simplified outline
Graphic symbol
6
5
4
6
5
4
2
3
collector TR2
emitter TR2
base TR2
TR2
TR1
4
1
2
3
5
1
2
3
6
collector TR1
sym018
3. Ordering information
Table 3.
Ordering information
Type number Package
Name
Description
Version
PBSS5160DS SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBSS5160DS
A5
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor
VCBO
VCEO
collector-base voltage open emitter
-
-
−80
−60
V
V
collector-emitter
voltage
open base
VEBO
IC
emitter-base voltage
collector current
open collector
-
-
-
-
-
-
-
−5
V
[1]
[2]
[3]
−0.77
−0.9
−1
A
A
A
ICM
IB
peak collector current
base current
single pulse; tp ≤ 1 ms
single pulse; tp ≤ 1 ms
−2
A
−300
−1
mA
A
IBM
peak base current
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
2 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
Table 5.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
290
370
450
Unit
mW
mW
mW
[1]
[2]
[3]
Ptot
total power dissipation
Tamb ≤ 25 °C
-
-
-
Per device
[1]
[2]
[3]
Ptot
total power dissipation
Tamb ≤ 25 °C
-
420
mW
mW
mW
°C
-
560
-
700
Tj
junction temperature
ambient temperature
storage temperature
-
150
Tamb
Tstg
−65
−65
+150
+150
°C
°C
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
006aaa493
800
(1)
P
tot
(mW)
600
(2)
(3)
400
200
0
0
40
80
120
160
(°C)
T
amb
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm2
(3) FR4 PCB, standard footprint
Fig 1. Power derating curves
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
3 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
6. Thermal characteristics
Table 6.
Symbol
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
[1]
[2]
[3]
Rth(j-a)
thermal resistance from
junction to ambient
in free air
-
-
-
-
-
-
-
-
431
338
278
105
K/W
K/W
K/W
K/W
Rth(j-sp)
thermal resistance from
junction to solder point
Per device
[1]
[2]
[3]
Rth(j-a)
thermal resistance from
junction to ambient
in free air
-
-
-
-
-
-
298
223
179
K/W
K/W
K/W
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
006aaa494
3
10
δ = 1
Z
th(j-a)
0.75
0.33
(K/W)
0.50
2
10
0.20
0.10
0.05
0.02
0.01
10
0
1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
4 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
006aaa495
3
10
Z
th(j-a)
δ = 1
(K/W)
0.75
0.33
0.50
0.20
0.10
0.05
2
10
10
0.02
0.01
0
1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 1 cm2
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
006aaa496
3
10
Z
th(j-a)
δ = 1
(K/W)
0.75
0.33
0.50
0.20
0.10
0.05
2
10
10
0.02
0.01
0
1
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Ceramic PCB, Al2O3, standard footprint
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
5 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
7. Characteristics
Table 7.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Per transistor
Conditions
Min
Typ
Max Unit
ICBO
collector-base cut-off
current
VCB = −60 V; IE = 0 A
-
-
-
-
−100 nA
VCB = −60 V; IE = 0 A;
Tj = 150 °C
−50
µA
ICES
IEBO
hFE
collector-emitter cut-off VCE = −60 V; VBE = 0 V
current
-
-
-
-
−100 nA
−100 nA
emitter-base cut-off
current
VEB = −5 V; IC = 0 A
DC current gain
VCE = −5 V; IC = −1 mA
VCE = −5 V; IC = −500 mA
VCE = −5 V; IC = −1 A
200
350
250
160
-
-
-
[1]
[1]
150
100
VCEsat
collector-emitter
saturation voltage
IC = −100 mA; IB = −1 mA
IC = −500 mA; IB = −50 mA
IC = −1 A; IB = −100 mA
-
-
-
-
−110 −165 mV
−120 −175 mV
−250 −330 mV
[1]
[1]
VBEsat
RCEsat
VBEon
base-emitter saturation IC = −1 A; IB = −50 mA
voltage
−0.95 −1.1
250 330
−0.82 −0.9
V
[1]
[1]
collector-emitter
saturation resistance
IC = −1 A; IB = −100 mA
IC = −1 A; VCE = −5 V
-
-
mΩ
V
base-emitter turn-on
voltage
td
tr
delay time
IC = −0.5 A; IBon = −25 mA;
-
11
-
-
-
-
-
-
-
ns
IBoff = 25 mA
rise time
-
30
ns
ton
ts
turn-on time
storage time
fall time
-
41
ns
-
205
55
ns
tf
-
ns
toff
fT
turn-off time
transition frequency
-
260
185
ns
VCE = −10 V; IC = −50 mA;
150
MHz
f = 100 MHz
Cc
collector capacitance
VCB = −10 V; IE = ie = 0 A;
-
9
15
pF
f = 1 MHz
[1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
6 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
006aaa474
006aaa478
600
−2.0
I
(mA) = −35.0
−31.5
B
I
(1)
C
(A)
h
−28.0
FE
−24.5
−21.0
−1.6
−17.5
−14.0
400
(2)
−10.5
−7.0
−1.2
−0.8
−0.4
0.0
−3.5
(3)
200
0
−10
−1
2
3
4
−1
−10
−10
−10
−10
(mA)
0
−1
−2
−3
−4
−5
(V)
I
V
C
CE
VCE = −5 V
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 5. DC current gain as a function of collector
current; typical values
Fig 6. Collector current as a function of
collector-emitter voltage; typical values
006aaa476
006aaa477
−1.0
−1.1
V
BEsat
(V)
V
(V)
BE
−0.9
−0.7
−0.5
−0.3
−0.1
−0.8
(1)
(2)
(1)
(2)
(3)
−0.6
−0.4
−0.2
(3)
−1
2
3
4
−1
2
3
4
−10
−1
−10
−10
−10
−10
(mA)
−10
−1
−10
−10
−10
−10
I (mA)
C
I
C
VCE = −5 V
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 7. Base-emitter voltage as a function of collector
current; typical values
Fig 8. Base-emitter saturation voltage as a function
of collector current; typical values
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
7 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
006aaa489
006aaa490
−1
−1
V
V
CEsat
CEsat
(V)
(V)
−1
−1
−10
−10
(1)
(2)
(1)
(2)
(3)
(3)
−2
−2
−10
−10
−1
2
3
4
−1
2
3
4
−10
−1
−10
−10
−10
−10
(mA)
−10
−1
−10
−10
−10
−10
I (mA)
C
I
C
IC/IB = 20
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig 9. Collector-emitter saturation voltage as a
function of collector current; typical values
Fig 10. Collector-emitter saturation voltage as a
function of collector current; typical values
006aaa491
006aaa492
3
3
10
10
R
CEsat
R
CEsat
(Ω)
(Ω)
2
2
10
10
10
10
(1)
(1)
(2)
(3)
(2)
(3)
1
1
−1
−1
10
10
−1
2
3
4
−1
2
3
4
−10
−1
−10
−10
−10
−10
(mA)
−10
−1
−10
−10
−10
−10
I (mA)
C
I
C
IC/IB = 20
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig 11. Collector-emitter saturation resistance as a
function of collector current; typical values
Fig 12. Collector-emitter saturation resistance as a
function of collector current; typical values
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
8 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
8. Test information
−
I
B
input pulse
90 %
(idealized waveform)
−
I
(100 %)
Bon
10 %
−
I
Boff
output pulse
−
(idealized waveform)
I
C
90 %
−
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
006aaa266
t
t
off
on
Fig 13. BISS transistor switching time definition
V
V
CC
BB
R
B
R
C
V
o
(probe)
(probe)
oscilloscope
oscilloscope
450 Ω
450 Ω
R2
V
I
DUT
R1
mgd624
IC = −0.5 A; IBon = −25 mA; IBoff = 25 mA; R1 = open; R2 = 100 Ω; RB = 300 Ω; RC = 20 Ω
Fig 14. Test circuit for switching times
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
9 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
9. Package outline
3.1
2.7
1.1
0.9
6
5
4
0.6
0.2
3.0 1.7
2.5 1.3
pin 1 index
1
2
3
0.26
0.10
0.40
0.25
0.95
1.9
Dimensions in mm
04-11-08
Fig 15. Package outline SOT457 (SC-74)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package Description
Packing quantity
3000
10000
-135
[2]
[3]
PBSS5160DS SOT457 4 mm pitch, 8 mm tape and reel; T1
4 mm pitch, 8 mm tape and reel; T2
-115
-125
-165
[1] For further information and the availability of packing methods, see Section 14.
[2] T1: normal taping
[3] T2: reverse taping
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
10 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
11. Soldering
3.45
1.95
0.55
(6×)
solder lands
solder resist
0.45
(6×)
0.95
0.95
3.3 2.825
solder paste
occupied area
0.7
Dimensions in mm
(6×)
0.8
(6×)
2.4
sot457_fr
Fig 16. Reflow soldering footprint SOT457 (SC-74)
5.3
1.5
(4×)
solder lands
solder resist
occupied area
1.475
1.475
0.45
(2×)
5.05
Dimensions in mm
preferred transport
direction during soldering
1.45
(6×)
2.85
sot457_fw
Fig 17. Wave soldering footprint SOT457 (SC-74)
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
11 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
12. Revision history
Table 9.
Revision history
Document ID
PBSS5160DS_3
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20081009
Product data sheet
-
PBSS5160DS_2
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Figure 9: amended
• Section 13 “Legal information”: updated
PBSS5160DS_2
PBSS5160DS_1
20050628
Product data sheet
-
-
PBSS5160DS_1
-
20040716
Objective data sheet
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
12 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
13. Legal information
13.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PBSS5160DS_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 9 October 2008
13 of 14
PBSS5160DS
NXP Semiconductors
60 V, 1 A PNP/PNP low VCEsat (BISS) transistor
15. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
1.4
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Packing information. . . . . . . . . . . . . . . . . . . . . 10
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
3
4
5
6
7
8
9
10
11
12
13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
13.1
13.2
13.3
13.4
14
15
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 9 October 2008
Document identifier: PBSS5160DS_3
相关型号:
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