PEMD48 [NEXPERIA]
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩProduction;型号: | PEMD48 |
厂家: | Nexperia |
描述: | 50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩProduction 开关 光电二极管 晶体管 |
文件: | 总13页 (文件大小:237K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor;
R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2 = 47 kΩ
29 December 2022
Product data sheet
1. General description
NPN/PNP double Resistor-Equipped Transistor (RET) in an ultra small and flat lead SOT666
Surface-Mounted Device (SMD) plastic package.
2. Features and benefits
•
100 mA output current capability
•
•
•
•
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
3. Applications
•
•
•
Low current peripheral driver
Controlling IC inputs
Replacement for general purpose transistors in digital applications
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCEO
IO
collector-emitter
voltage
open base
-
-
-
-
50
V
output current
100
mA
Transistor TR1 (NPN)
R1
bias resistor 1 (input)
bias resistor ratio
[1]
[1]
33
47
1
61
kΩ
kΩ
R2/R1
0.8
1.2
Transistor TR2 (PNP)
R1
bias resistor 1 (input)
bias resistor ratio
[1]
[1]
1.54
17
2.2
21
2.86
26
R2/R1
[1] See section "Test information" for resistor calculation and test conditions.
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
5. Pinning information
Table 2. Pinning information
Pin
1
Symbol
GND1
I1
Description
Simplified outline
Graphic symbol
O1 I2
GND2
TR2
GND (emitter) TR1
input (base) TR1
output (collector) TR2
GND (emitter) TR2
input (base) TR2
output (collector) TR1
2
6
5
4
3
O2
R1
R2
4
GND2
I2
TR1
R2
5
R1
6
O1
1
2
3
SOT666
GND1
I1 O2
006aaa143
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
Description
Version
PEMD48
SOT666
plastic, surface-mounted package; 6 leads; 0.5 mm pitch; SOT666
1.6 mm x 1.2 mm x 0.55 mm body
7. Marking
Table 4. Marking codes
Type number
Marking code
48
PEMD48
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
2 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCBO
VCEO
VEBO
collector-base voltage
open emitter
-
-
-
-
-
-
-
-
-
-
50
50
10
-5
V
collector-emitter voltage open base
V
emitter-base voltage
input voltage
open collector TR1 (NPN)
V
open collector TR2 (PNP)
positive (input voltage TR1)
negative (input voltage TR1)
positive (input voltage TR2)
negative (input voltage TR2)
V
VI
40
-10
5
V
V
V
-12
100
200
V
IO
output current
mA
mW
Ptot
total power dissipation
Tamb ≤ 25 °C
Tamb ≤ 25 °C
[1] [2]
[1] [2]
Per device
Ptot
Tj
total power dissipation
junction temperature
ambient temperature
storage temperature
-
300
150
150
150
mW
°C
-
Tamb
Tstg
-65
-65
°C
°C
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
[2] Reflow soldering is the only recommended soldering method.
006aac749
400
P
tot
(mW)
300
200
100
0
-75
-25
25
75
125
175
(°C)
T
amb
FR4 PCB, single-sided, 35 μm copper, tin-plated and standard footprint
Fig. 1. Per device: Power derating curve
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
3 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
Rth(j-a)
thermal resistance from in free air
junction to ambient
[1] [2]
[1] [2]
-
-
625
K/W
Per device
Rth(j-a)
thermal resistance from in free air
junction to ambient
-
-
417
K/W
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Reflow soldering is the only recommended soldering method.
006aac751
3
10
duty cycle = 1
Z
th(j-a)
(K/W)
0.75
0.33
0.5
0.2
2
10
0.1
0.02
0
0.05
0.01
10
1
-5
10
-4
-3
-2
10
-1
2
3
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint
Fig. 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
4 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor; for the PNP transistor with negative polarity
V(BR)CBO
V(BR)CEO
ICBO
collector-base
breakdown voltage
IC = 100 µA; IE = 0 A; Tamb = 25 °C
IC = 2 mA; IB = 0 A; Tamb = 25 °C
VCB = 50 V; IE = 0 A; Tamb = 25 °C
50
50
-
-
-
-
-
V
collector-emitter
breakdown voltage
-
V
collector-base cut-off
current
100
nA
ICEO
collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C
-
-
-
-
1
5
µA
µA
current
VCE = 30 V; IB = 0 A; Tamb = 25 °C;
Tj = 150 °C
Transistor TR1 (NPN)
IEBO
emitter-base cut-off
VEB = 5 V; IC = 0 A; Tamb = 25 °C
-
-
90
µA
current
hFE
DC current gain
VCE = 5 V; IC = 5 mA; Tamb = 25 °C
IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C
80
-
-
-
-
VCEsat
collector-emitter
100
mV
saturation voltage
VI(off)
VI(on)
R1
off-state input voltage VCE = 5 V; IC = 100 µA; Tamb = 25 °C
on-state input voltage VCE = 0.3 V; IC = 2 mA; Tamb = 25 °C
bias resistor 1 (input)
-
1.2
1.6
47
1
0.8
-
V
3
V
[1]
[1]
33
0.8
-
61
1.2
2.5
kΩ
R2/R1
Cc
bias resistor ratio
collector capacitance
VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz;
Tamb = 25 °C
-
pF
fT
transition frequency
VCE = 5 V; IC = 10 mA; f = 100 MHz;
Tamb = 25 °C
[2]
-
-
230
-
-
MHz
Transistor TR2 (PNP)
IEBO
emitter-base cut-off
VEB = -5 V; IC = 0 A; Tamb = 25 °C
-180
µA
current
hFE
DC current gain
VCE = -5 V; IC = -10 mA; Tamb = 25 °C
IC = -5 mA; IB = -0.25 mA; Tamb = 25 °C
100
-
-
-
-
VCEsat
collector-emitter
-100
mV
saturation voltage
VI(off)
VI(on)
R1
off-state input voltage VCE = -5 V; IC = -100 µA; Tamb = 25 °C
on-state input voltage VCE = -0.3 V; IC = -5 mA; Tamb = 25 °C
bias resistor 1 (input)
-
-0.6
-0.75
2.2
21
-0.5
-
V
-1.1
1.54
17
-
V
[1]
[1]
2.86
26
3
kΩ
R2/R1
Cc
bias resistor ratio
collector capacitance
VCB = -10 V; IE = 0 A; ie = 0 A;
f = 1 MHz; Tamb = 25 °C
-
pF
fT
transition frequency
VCE = -5 V; IC = -10 mA; f = 100 MHz;
Tamb = 25 °C
[2]
-
180
-
MHz
[1] See section "Test information" for resistor calculation and test conditions.
[2] Characteristics of built-in transistor
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
5 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
006aac752
006aac753
3
10
1
h
FE
(1)
(2)
(3)
V
CEsat
(V)
2
10
(1)
(2)
-1
(3)
10
10
-2
1
10
-1
10
2
-1
2
1
10
10
10
1
10
10
I
(mA)
I (mA)
C
C
VCE = 5 V
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Fig. 3. TR1 (NPN): DC current gain as a function of
collector current; typical values
Fig. 4. TR1 (NPN): Collector-emitter saturation voltage
as a function of collector current; typical values
006aac754
006aac755
10
10
V
I(on)
(V)
V
I(off)
(V)
(1)
(1)
(2)
(3)
(2)
(3)
1
1
-1
-1
10
10
-1
2
-1
10
1
10
10
10
1
10
I
(mA)
I (mA)
C
C
VCE = 0.3 V
VCE = 5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 5. TR1 (NPN): On-state input voltage as a function Fig. 6. TR1 (NPN): Off-state input voltage as a function
of collector current; typical values
of collector current; typical values
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
6 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
006aac756
006aac757
3
2.0
10
C
c
(pF)
1.6
f
T
(MHz)
1.2
0.8
0.4
0.0
2
10
10
-1
10
2
0
10
20
30
40
V
50
1
10
10
(V)
I (mA)
C
CB
f = 1 MHz
Tamb = 25 °C
f = 100 MHz
Tamb = 25 °C
VCE = 5 V
Fig. 7. TR1 (NPN): Collector capacitance as a function
of collector-base voltage; typical values
Fig. 8. TR1 (NPN): Transition frequency as a function
of collector current; typical values of built-in
transistor
006aac814
006aac815
3
10
-1
(1)
h
FE
(2)
(3)
V
CEsat
(V)
2
10
-1
-10
(1)
10
(2)
(3)
-2
1
-10
-1
-10
2
-1
2
-1
-10
-10
-10
-1
-10
-10
I
(mA)
I (mA)
C
C
VCE = -5 V
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Fig. 9. TR2 (PNP): DC current gain as a function of
collector current; typical values
Fig. 10. TR2 (PNP): Collector-emitter saturation voltage
as a function of collector current; typical values
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
7 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
006aac816
006aac817
-10
-1
(1)
(2)
V
I(on)
(V)
V
I(off)
(V)
(3)
(1)
(2)
-1
(3)
-1
-1
-10
-10
-1
2
-1
-10
-1
-10
-10
-10
-1
-10
I
(mA)
I (mA)
C
C
VCE = -0.3 V
VCE = -5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 11. TR2 (PNP): On-state input voltage as a function Fig. 12. TR2 (PNP): Off-state input voltage as a function
of collector current; typical values of collector current; typical values
006aac818
006aac763
3
9
10
C
c
(pF)
f
T
(MHz)
6
3
0
2
10
10
-1
-10
2
0
-10
-20
-30
-40
V
-50
(V)
-1
-10
-10
I (mA)
C
CB
f = 1 MHz; Tamb = 25 °C
f = 100 MHz
Tamb = 25 °C
VCE = -5 V
Fig. 13. TR2 (PNP): Collector capacitance as a function
of collector-base voltage; typical values
Fig. 14. TR2 (PNP): Transition frequency as a function
of collector current; typical values of built-in
transistor
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
8 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
11. Test information
Resistor calculation
•
Calculation of bias resistor 1 (R1)
•
Calculation of bias resistor ratio (R2/R1)
n.c.
I ; I
1
2
R1
I
3
R2
GND
aaa-035604
Fig. 15. TR1 (NPN): Resistor test circuit
n.c.
I ; I
1
2
R1
I
3
R2
GND
aaa-035714
Fig. 16. TR2 (PNP): Resistor test circuit
Resistor test conditions
Table 8. Resistor test conditions
PEMD48
R1 (kΩ)
R2 (kΩ)
Test conditions
I1
I2
I3
TR1 (NPN)
TR2 (PNP)
47
47
47
60 μA
-600 μA
110 μA
-700 μA
-80 μA
100 μA
2.2
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
9 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
12. Package outline
1.7
1.5
0.6
0.5
6
5
4
0.3
0.1
1.7 1.3
1.5 1.1
pin 1 index
1
2
3
0.18
0.08
0.27
0.17
0.5
1
Dimensions in mm
04-11-08
Fig. 17. Package outline SOT666
13. Soldering
2.75
2.45
2.1
1.6
solder lands
0.4
(6×)
0.3
(2×)
0.25
(2×)
placement area
0.538
0.55
1.075
1.7
2
(2×)
solder paste
occupied area
0.325 0.375
(4×) (4×)
Dimensions in mm
1.7
0.45
(4×)
0.6
(2×)
0.5
(4×)
0.65
(2×)
sot666_fr
Fig. 18. Reflow soldering footprint for SOT666
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
10 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
14. Revision history
Table 9. Revision history
Data sheet ID
PEMD48 v.7
Modifications:
Release date
Data sheet status
Change notice
Supersedes
20221229
Product data sheet
-
PEMD48_PUMD48 v.6
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Family data sheet reduced to single type data sheet.
Product(s) changed to non-automotive qualification.
Packing information is removed.
PEMD48_PUMD48 v.6 20120124
PEMD48_PUMD48 v.5 20100413
PEMD48_PUMD48 v.4 20040624
PEMD48_PUMD48 v.3 20040602
Product data sheet
Product data sheet
Product specification
Product specification
-
-
-
-
PEMD48_PUMD48 v.5
PEMD48_PUMD48 v.4
PEMD48_PUMD48 v.3
PUMD48 v.2 PEMD48
v.2
PUMD48 v.2
PUMD48 v.1
PEMD48 v.2
PEMD48 v.1
20010201
19990422
20011107
20010924
Product specification
Product specification
Product specification
-
-
-
-
PUMD48 v.1
-
PEMD48 v.1
-
Preliminary
specification
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
11 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
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15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
Data sheet status
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
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and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
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minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
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customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
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liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
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multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
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with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
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data sheet shall define the specification of the product as agreed between
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©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
12 / 13
Nexperia
PEMD48
50 V, 100 mA NPN/PNP resistor-equipped double transistor; R1 = 47 kΩ, R2 = 47 kΩ and R1 = 2.2 kΩ, R2
= 47 kΩ
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking..........................................................................2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics............................................................5
11. Test information..........................................................9
12. Package outline........................................................ 10
13. Soldering................................................................... 10
14. Revision history........................................................11
15. Legal information......................................................12
© Nexperia B.V. 2022. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 29 December 2022
©
PEMD48
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
29 December 2022
13 / 13
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