PSMN3R3-40MLH [NEXPERIA]

N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technologyProduction;
PSMN3R3-40MLH
型号: PSMN3R3-40MLH
厂家: Nexperia    Nexperia
描述:

N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technologyProduction

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PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33  
using NextPower-S3 technology  
11 November 2019  
Product data sheet  
1. General description  
118 A, logic level N-channel enhancement mode MOSFET in 175 °C LFPAK33 package using  
advanced TrenchMOS Superjunction technology. This product has been designed and qualified for  
high efficiency applications at high switching frequencies.  
2. Features and benefits  
Avalanche rated, 100% tested  
NextPower-S3 technology delivers 'superfast switching with soft body-diode recovery'  
Low Qrr, QG and QGD for high system efficiency, especially at high switching frequencies  
Low spiking and ringing for low EMI designs  
High reliability clip bonded and solder die attach Mini Power SO8 package; no glue, no wire  
bonds, qualified to 175 °C  
Exposed leads can be wave soldered, visual solder joint inspection and high quality solder  
joints  
Low parasitic inductance and resistance  
3. Applications  
Secondary side synchronous rectification  
DC-to-DC converters  
Brushless DC motor drive  
LED lighting  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
VDS  
ID  
Parameter  
Conditions  
Min  
Typ  
Max  
40  
Unit  
V
drain-source voltage  
drain current  
25 °C ≤ Tj ≤ 175 °C  
VGS = 10 V; Tmb = 25 °C; Fig. 2  
-
-
-
-
-
[1]  
-
118  
101  
175  
A
Ptot  
total power dissipation Tmb = 25 °C; Fig. 1  
junction temperature  
-
W
Tj  
-55  
°C  
Static characteristics  
RDSon drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
Fig. 10  
-
-
2.7  
3.4  
3.3  
4.2  
mΩ  
mΩ  
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;  
Fig. 10  
Dynamic characteristics  
QGD  
gate-drain charge  
total gate charge  
ID = 25 A; VDS = 20 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
1.2  
11  
4
8
nC  
nC  
QG(tot)  
17  
24  
[1] 118A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,  
thermal design and operating temperature.  
 
 
 
 
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
5. Pinning information  
Table 2. Pinning information  
Pin  
1
Symbol  
Description  
source  
source  
source  
gate  
Simplified outline  
Graphic symbol  
S
S
S
G
D
D
S
2
G
3
4
mbb076  
mb  
Mounting base; connected  
to drain  
1
2
3
4
LFPAK33 (SOT1210)  
6. Ordering information  
Table 3. Ordering information  
Type number  
Package  
Name  
Description  
Version  
PSMN3R3-40MLH  
LFPAK33  
Plastic, single ended surface mounted package (LFPAK33); 8  
leads; 0.65 mm pitch  
SOT1210  
7. Marking  
Table 4. Marking codes  
Type number  
Marking code  
PSMN3R3-40MLH  
3H3L40  
8. Limiting values  
Table 5. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
Unit  
drain-source voltage  
25 °C ≤ Tj ≤ 175 °C  
-
-
40  
45  
V
V
VDSM  
peak drain-source  
voltage  
tp ≤ 20 ns; f ≤ 500 kHz; EDS(AL) ≤ 200 nJ;  
pulsed  
VDGR  
VGS  
Ptot  
ID  
drain-gate voltage  
gate-source voltage  
total power dissipation  
drain current  
25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ  
-
40  
V
-20  
20  
V
Tmb = 25 °C; Fig. 1  
-
101  
118  
84  
W
A
VGS = 10 V; Tmb = 25 °C; Fig. 2  
VGS = 10 V; Tmb = 100 °C  
[1]  
-
-
A
IDM  
peak drain current  
storage temperature  
junction temperature  
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3  
-
475  
175  
175  
260  
A
Tstg  
Tj  
-55  
-55  
-
°C  
°C  
°C  
Tsld(M)  
peak soldering  
temperature  
Source-drain diode  
IS  
source current  
Tmb = 25 °C  
-
101  
A
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
2 / 12  
 
 
 
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
Symbol  
Parameter  
Conditions  
Min  
Max  
Unit  
ISM  
peak source current  
pulsed; tp ≤ 10 µs; Tmb = 25 °C  
-
475  
A
Avalanche ruggedness  
EDS(AL)S  
non-repetitive drain-  
ID = 25 A; Vsup ≤ 40 V; RGS = 50 Ω;  
source avalanche energy VGS = 10 V; Tj(init) = 25 °C; unclamped;  
tp = 308 µs  
-
-
200  
80  
mJ  
A
IAS  
non-repetitive avalanche Vsup ≤ 40 V; VGS = 10 V; Tj(init) = 25 °C;  
[2]  
current  
RGS = 50 Ω  
[1] 118A Continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,  
thermal design and operating temperature.  
[2] Protected by 100% test  
03aa16  
aaa-030386  
120  
120  
100  
80  
60  
40  
20  
0
I
D
(A)  
P
der  
(%)  
80  
40  
0
0
50  
100  
150  
200  
0
25  
50  
75 100 125 150 175 200  
T
mb  
(°C)  
T
(°C)  
mb  
VGS ≥ 10 V  
(1) 118A continuous current has been successfully  
demonstrated during application tests. Practically  
the current will be limited by PCB, thermal design  
and operating temperature.  
Fig. 1. Normalized total power dissipation as a  
function of mounting base temperature  
Fig. 2. Continuous drain current as a function of  
mounting base temperature  
aaa-030382  
3
10  
I
D
(A)  
Limit R  
= V / I  
DS D  
DSon  
t
p
= 10 µs  
2
10  
DC  
100 µs  
10  
1 ms  
10 ms  
100 ms  
1
-1  
10  
-1  
2
10  
1
10  
10  
V
DS  
(V)  
Tmb = 25 °C; IDM is a single pulse  
Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
3 / 12  
 
 
 
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
9. Thermal characteristics  
Table 6. Thermal characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Rth(j-mb)  
thermal resistance from Fig. 4  
junction to mounting  
base  
-
1.3  
1.48  
K/W  
Rth(j-a)  
thermal resistance from Fig. 5  
-
-
50  
-
-
K/W  
K/W  
junction to ambient  
Fig. 6  
130  
aaa-028610  
10  
Z
th(j-mb)  
(K/W)  
1
δ = 0.5  
0.2  
0.1  
-1  
10  
10  
10  
0.05  
0.02  
t
p
P
single shot  
δ =  
T
-2  
t
t
p
T
-3  
-6  
-5  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
10  
10  
1
t
p
(s)  
Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration  
aaa-028026  
aaa-028025  
Copper square 25.4 mm square; 70 μm thick on  
FR4 board  
70 μm thick copper on FR4 board  
Fig. 6. PCB layout with minimum footprint for thermal  
resistance from junction to ambient  
Fig. 5. PCB layout for resistance from junction to  
ambient  
10. Characteristics  
Table 7. Characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS  
drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
40  
36  
-
-
-
-
V
V
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
4 / 12  
 
 
 
 
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VGS(th)  
gate-source threshold ID = 1 mA; VDS=VGS; Tj = 25 °C  
voltage  
1.45  
1.77  
2.15  
V
ΔVGS(th)/ΔT  
gate-source threshold 25 °C ≤ Tj ≤ 150 °C  
voltage variation with  
-
-4.4  
-
mV/K  
temperature  
IDSS  
drain leakage current  
gate leakage current  
VDS = 32 V; VGS = 0 V; Tj = 25 °C  
VDS = 32 V; VGS = 0 V; Tj = 125 °C  
VGS = 16 V; VDS = 0 V; Tj = 25 °C  
VGS = -16 V; VDS = 0 V; Tj = 25 °C  
-
-
-
-
-
0.01  
1.6  
2
1
µA  
µA  
nA  
nA  
mΩ  
-
IGSS  
100  
100  
3.3  
2
RDSon  
drain-source on-state  
resistance  
VGS = 10 V; ID = 25 A; Tj = 25 °C;  
Fig. 10  
2.7  
VGS = 10 V; ID = 25 A; Tj = 175 °C;  
Fig. 11  
-
-
7.2  
4.2  
9.2  
2
mΩ  
mΩ  
mΩ  
Ω
VGS = 4.5 V; ID = 25 A; Tj = 25 °C;  
Fig. 10  
-
3.4  
-
VGS = 4.5 V; ID = 25 A; Tj = 175 °C;  
Fig. 11  
-
RG  
gate resistance  
f = 1 MHz; Tj = 25 °C  
0.3  
0.8  
Dynamic characteristics  
QG(tot)  
total gate charge  
ID = 25 A; VDS = 20 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
11  
24  
17  
38  
24  
54  
nC  
nC  
ID = 25 A; VDS = 20 V; VGS = 10 V;  
Fig. 12; Fig. 13  
ID = 0 A; VDS = 0 V  
-
20  
6.8  
4
-
nC  
nC  
nC  
QGS  
gate-source charge  
ID = 25 A; VDS = 20 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
4
10.2  
6
QGS(th)  
pre-threshold gate-  
source charge  
2.4  
QGS(th-pl)  
post-threshold gate-  
source charge  
1.7  
2.8  
4.2  
nC  
QGD  
gate-drain charge  
1.2  
-
4
8
-
nC  
V
VGS(pl)  
gate-source plateau  
voltage  
ID = 25 A; VDS = 20 V; Fig. 12; Fig. 13  
2.8  
Ciss  
Coss  
Crss  
input capacitance  
output capacitance  
VDS = 20 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C; Fig. 14  
1761 2710 3794 pF  
407  
30  
627  
101  
877  
222  
pF  
pF  
reverse transfer  
capacitance  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 20 V; RL = 0.8 Ω; VGS = 4.5 V;  
RG(ext) = 5 Ω  
-
-
-
-
-
16  
19  
17  
11  
20  
-
-
-
-
-
ns  
ns  
ns  
ns  
nC  
turn-off delay time  
fall time  
Qoss  
output charge  
VGS = 0 V; VDS = 20 V; f = 1 MHz  
Source-drain diode  
VSD  
source-drain voltage  
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 15  
-
0.8  
1
V
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
5 / 12  
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
Symbol  
Parameter  
Conditions  
Min  
Typ  
27  
Max  
Unit  
ns  
trr  
Qr  
ta  
reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V;  
-
-
-
-
-
-
VDS = 20 V; Fig. 16  
recovered charge  
22  
nC  
ns  
reverse recovery rise  
time  
16  
tb  
reverse recovery fall  
time  
-
11  
-
ns  
aaa-029075  
aaa-029076  
120  
12  
I
D
R
DSon  
(A)  
(mΩ)  
100  
80  
60  
40  
20  
0
10 V  
9
6
3
0
V
= 3 V  
2.8 V  
4.5 V  
GS  
2.6 V  
2.4 V  
0
1
2
3
V
4
0
5
10  
15  
GS  
20  
(V)  
V
(V)  
DS  
Tj = 25 °C  
Tj = 25 °C; ID = 25 A  
Fig. 7. Output characteristics; drain current as a  
function of drain-source voltage; typical values  
Fig. 8. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
aaa-030383  
aaa-029078  
120  
12  
I
R
(mΩ)  
D
DSon  
2.8 V  
3 V  
(A)  
10  
8
90  
60  
30  
0
3.5 V  
4.5 V  
6
4
175°C  
2
25°C  
3
2
V
GS  
= 10 V  
0
0
1
4
GS  
5
0
20  
40  
60  
80  
100  
(A)  
120  
V
(V)  
I
D
VDS = 8 V  
Tj = 25 °C  
Fig. 9. Transfer characteristics; drain current as a  
function of gate-source voltage; typical values  
Fig. 10. Drain-source on-state resistance as a function  
of drain current; typical values  
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
6 / 12  
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
aaa-030384  
aaa-030480  
2.4  
a
10  
8
V
(V)  
GS  
2
1.6  
1.2  
0.8  
0.4  
0
6
32 V  
20 V  
4
V
= 8 V  
DS  
2
0
-60 -30  
0
30  
60  
90 120 150 180  
0
10  
20  
30  
40  
Q (nC)  
G
50  
T (°C)  
j
Tj = 25 °C; ID = 25 A  
Fig. 12. Gate-source voltage as a function of gate  
charge; typical values  
Fig. 11. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
aaa-030542  
4
10  
V
C
DS  
(pF)  
I
D
C
C
iss  
3
2
10  
10  
V
V
GS(pl)  
oss  
GS(th)  
V
GS  
Q
GS2  
C
rss  
Q
GS1  
Q
GS  
Q
GD  
G(tot)  
Q
003aaa508  
10  
10  
Fig. 13. Gate charge waveform definitions  
-1  
2
1
10  
10  
V
DS  
(V)  
VGS = 0 V; f = 1 MHz  
Fig. 14. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
7 / 12  
 
 
 
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
003aal160  
aaa-030385  
2
10  
I
S
I
D
(A)  
(A)  
t
rr  
t
t
b
a
0
10  
0.25 I  
RM  
175°C  
0.4  
T = 25°C  
j
I
RM  
1
t (s)  
0
0.2  
0.6  
0.8  
1
(V)  
1.2  
V
SD  
Fig. 16. Reverse recovery timing definition  
VGS = 0 V  
Fig. 15. Source-drain (diode forward) current as a  
function of source-drain (diode forward)  
voltage; typical values  
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
8 / 12  
 
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
11. Package outline  
Plastic single ended surface mounted package (LFPAK33); 8 leads  
SOT1210  
E
A
e
1
A
c
1
b
1
L
1
D
2
mounting  
base  
D
1
(D)  
H
E
1
L
1
4
X
b
w
A
e
c
A
C
1
Lp  
y
C
detail X  
0
1
2.5  
5 mm  
scale  
Dimensions  
(1)  
(1)  
(1)  
(1)  
E
Unit  
A
A
b
b
1
c
c
D ref  
2.60  
D
D
E
e
e
H
L
L
L
p
w
y
1
1
2
1
1
1
max 0.90 0.10 0.35 2.4 0.20 0.30  
nom  
2.35  
1.90  
3.40 2.45  
3.20 2.00  
3.40 0.65 0.25 0.50  
3.20 0.45 0.13 0.30  
mm  
0.50  
0.65 0.65  
0.20 0.10  
0.80 0.00 0.25 2.2 0.10 0.20  
min  
Note  
1. Plastic or metal protrusions of 0.15 mm per side are not included.  
sot1210_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
14-04-25  
16-08-09  
SOT1210  
Fig. 17. Package outline LFPAK33 (SOT1210)  
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
9 / 12  
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
12. Soldering  
Footprint information for reflow soldering of LFPAK33 package  
SOT1210  
2.35  
2.25  
0.635 0.617  
0.05 (all around)  
1.05  
0.62  
0.75  
1.91  
0.51  
2.47  
3.9  
0.51  
0.6  
0.83  
0.4 (x8)  
0.3 (x8)  
0.65 (x6)  
0.25 (x6)  
solder paste  
aperture  
solder land  
Notes : 1. Dimensions in mm  
occupied area  
solder resist  
sot1210_fr  
Fig. 18. Reflow soldering footprint for LFPAK33 (SOT1210)  
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
10 / 12  
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
13. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
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full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
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Nexperia and its customer, unless Nexperia and customer have explicitly  
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beyond those described in the Product data sheet.  
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Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
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of Nexperia.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified, the  
product is not suitable for automotive use. It is neither qualified nor tested in  
accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of non-automotive qualified  
products in automotive equipment or applications.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
Nexperia’s specifications such use shall be solely at customer’s own risk,  
and (c) customer fully indemnifies Nexperia for any liability, damages or failed  
product claims resulting from customer design and use of the product for  
automotive applications beyond Nexperia’s standard warranty and Nexperia’s  
product specifications.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Translations — A non-English (translated) version of a document is for  
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between the translated and English versions.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
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Trademarks  
Suitability for use — Nexperia products are not designed, authorized or  
warranted to be suitable for use in life support, life-critical or safety-critical  
systems or equipment, nor in applications where failure or malfunction  
of an Nexperia product can reasonably be expected to result in personal  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
11 / 12  
 
Nexperia  
PSMN3R3-40MLH  
N-channel 40 V, 3.3 mΩ, logic level MOSFET in LFPAK33 using NextPower-S3 technology  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Applications.................................................................. 1  
4. Quick reference data....................................................1  
5. Pinning information......................................................2  
6. Ordering information....................................................2  
7. Marking..........................................................................2  
8. Limiting values............................................................. 2  
9. Thermal characteristics............................................... 4  
10. Characteristics............................................................4  
11. Package outline.......................................................... 9  
12. Soldering................................................................... 10  
13. Legal information......................................................11  
© Nexperia B.V. 2019. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 11 November 2019  
©
PSMN3R3-40MLH  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
11 November 2019  
12 / 12  

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