PUMB11-Q [NEXPERIA]

50 V, 100 mA PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩProduction;


型号：	PUMB11-Q
厂家：	Nexperia
描述：	50 V, 100 mA PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩProduction
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PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ,

R2 = 10 kΩ

25 October 2021

Product data sheet

1. General description

PNP/PNP Resistor-Equipped Transistors (RET) in a very SOT363 (SC-88) Surface-Mounted

Device (SMD) plastic package.

2. Features and benefits

•

100 mA output current capability

•

Built-in bias resistors

Simplifies circuit design

Reduces component count

Reduces pick and place costs

Qualified according to AEC-Q101 and recommended for use in automotive applications

3. Applications

•

Low current peripheral drivers

Control of IC inputs

Replaces general-purpose transistors in digital applications

4. Quick reference data

Table 1. Quick reference data

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Per transistor

V_CEO

collector-emitter

voltage

open base

-50

I_O

output current

bias resistor 1

bias resistor ratio

-100

kΩ

[1]

R2/R1

0.8

1.2

[1] See "Section 11: Test information" for resistor calculation and test conditions.

Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

5. Pinning information

Table 2. Pinning information

Symbol

GND1

Description

Simplified outline

Graphic symbol

GND (emitter) TR1

input (base) TR1

output (collector) TR2

GND (emitter) TR2

input (base) TR2

output (collector) TR1

R1 R2

TR2

GND2

TR1

R2 R1

TSSOP6 (SOT363)

006aaa212

6. Ordering information

Table 3. Ordering information

Type number

Package

Name

Description

Version

PUMB11-Q

TSSOP6

plastic, surface-mounted package; 6 leads; 0.65 mm pitch; SOT363

2.1 mm x 1.25 mm x 0.95 mm body

7. Marking

Table 4. Marking codes

Type number

Marking code[1]

B%1

PUMB11-Q

[1] % = placeholder for manufacturing site code

PUMB11-Q

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Product data sheet

25 October 2021

2 / 12

Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

8. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Per transistor

V_CBO

Parameter

Conditions

Min

Max

Unit

collector-base voltage

open emitter

-50

-10

V_CEO

collector-emitter voltage open base

V_EBO

emitter-base voltage

input voltage

open collector

positive

V_I

negative

-40

-100

200

I_O

output current

P_tot

total power dissipation

T_amb≤ 25 °C

T_amb= 25 °C

[1]

Per device

P_tot

T_j

total power dissipation

junction temperature

ambient temperature

storage temperature

300

150

°C

T_amb

T_stg

-65

°C

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided, 35 μm copper, tin-plated and standard footprint.

006aac749

400

tot

(mW)

300

200

100

-75

-25

125

175

(°C)

amb

FR4 PCB, single-sided, 35 μm copper, tin-plated and standard footprint

Fig. 1. Per device: Power derating curve

PUMB11-Q

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Product data sheet

25 October 2021

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

9. Thermal characteristics

Table 6. Thermal characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Per transistor

R_th(j-a)

thermal resistance from in free air

junction to ambient

[1]

625

K/W

Per device

R_th(j-a)

thermal resistance from in free air

junction to ambient

417

K/W

[1] Device mounted on an FR4 PCB, single-sided, 35 μm copper, tin-plated and standard footprint.

006aac750

duty cycle = 1

th(j-a)

(K/W)

0.75

0.33

0.5

0.2

0.1

0.05

0.01

0.02

-5

-4

-3

-2

-1

(s)

FR4 PCB, single-sided, 35 µm copper, tin-plated and standard footprint

Fig. 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;

typical values

PUMB11-Q

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Product data sheet

25 October 2021

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

10. Characteristics

Table 7. Characteristics

T_amb= 25 °C unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Per transistor

V_(BR)CBO

collector-base

breakdown voltage

I_C= -100 µA; I_E= 0 A

I_C= -2 mA; I_B= 0 A

V_CB= -50 V; I_E= 0 A

-50

V_(BR)CEO

I_CBO

collector-emitter

breakdown voltage

collector-base cut-off

current

-100

I_CEO

collector-emitter cut-off V_CE= -30 V; I_B= 0 A

current

-1

µA

V_CE= -30 V; I_B= 0 A; T_j= 150 °C

-5

I_EBO

emitter-base cut-off

current

V_EB= -5 V; I_C= 0 A

-400

h_FE

DC current gain

V_CE= -5 V; I_C= -5 mA

-30

V_CEsat

collector-emitter

I_C= -10 mA; I_B= -0.5 mA

-100

saturation voltage

V_I(off)

V_I(on)

off-state input voltage V_CE= -5 V; I_C= -100 µA

on-state input voltage V_CE= -0.3 V; I_C= -10 mA

bias resistor 1

-1.1

-1.8

-0.8

-2.5

[1]

1.2

kΩ

R2/R1

C_c

bias resistor ratio

0.8

collector capacitance

V_CB= -10 V; I_E= 0 A; i_e= 0 A;

f = 1 MHz

f_T

transition frequency

V_CE= -5 V; I_C= -10 mA; f = 100 MHz

[2]

180

MHz

[1] See "Section 11: Test information" for resistor calculation and test conditions.

[2] Characteristics of built-in transistor

006aac773

006aac774

-1

(1)

CEsat

(V)

(2)

(3)

-1

(1)

-10

(2)

(3)

-2

-10

-1

-10

-1

-10

-1

-10

(mA)

I (mA)

V_CE= -5 V

I_C/I_B= 20

(1) T_amb= 100 °C

(2) T_amb= 25 °C

(3) T_amb= -40 °C

(1) T_amb= 100 °C

(2) T_amb= 25 °C

(3) T_amb= -40 °C

Fig. 3. DC current gain as a function of collector

current; typical values

Fig. 4. Collector-emitter saturation voltage as a

function of collector current; typical values

PUMB11-Q

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Product data sheet

25 October 2021

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

006aac775

006aac776

-10

I(on)

(V)

I(off)

(V)

(1)

(2)

(1)

(2)

-1

(3)

-1

-10

-1

-10

-1

-10

-1

-10

(mA)

I (mA)

V_CE= -0.3 V

V_CE= -5 V

(1) T_amb= -40 °C

(2) T_amb= 25 °C

(3) T_amb= 100 °C

(1) T_amb= -40 °C

(2) T_amb= 25 °C

(3) T_amb= 100 °C

Fig. 5. On-state input voltage as a function of collector Fig. 6. Off-state input voltage as a function of collector

current; typical values current; typical values

006aac777

006aac763

(pF)

(MHz)

-1

-10

-20

-30

-40

-50

(V)

-1

-10

I (mA)

f = 1 MHz

T_amb= 25 °C

f = 100 MHz

T_amb= 25 °C

V_CE= -5 V

Fig. 7. Collector capacitance as a function of collector-

base voltage; typical values

Fig. 8. Transition frequency as a function of collector

current; typical values of built-in transistor

PUMB11-Q

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Product data sheet

25 October 2021

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

11. Test information

Quality information

This product has been qualified in accordance with the Automotive Electronics Council (AEC)

standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in

automotive applications.

Resistor calculation

•

Calculation of bias resistor 1 (R1)

•

Calculation of bias resistor ratio (R2/R1)

n.c.

; I

I1 I2

; I

I3 I4

GND

aaa-020083

Fig. 9. PNP transistor: Resistor test circuit

Resistor test conditions

Table 8. Resistor test conditions

Type number

Test conditions

I_I1

I_I2

I_I3

350 μA

I_I4

PUMB11-Q

-350 μA

-450 μA

450 μA

PUMB11-Q

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Product data sheet

25 October 2021

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

12. Package outline

2.2

1.8

1.1

0.8

0.45

0.15

2.2 1.35

2.0 1.15

pin 1

index

0.25

0.10

0.3

0.2

0.65

1.3

Dimensions in mm

14-10-03

Fig. 10. Package outline TSSOP6 (SOT363)

PUMB11-Q

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Product data sheet

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

13. Soldering

2.65

solder lands

0.4 (2×)

1.5

2.35

0.6

(4×)

0.5

(4×)

solder resist

solder paste

0.5

(4×)

0.6

(2×)

occupied area

Dimensions in mm

0.6

(4×)

1.8

sot363_fr

Fig. 11. Reflow soldering footprint for TSSOP6 (SOT363)

1.5

solder lands

solder resist

occupied area

2.5

0.3

4.5

1.5

Dimensions in mm

preferred transport

direction during soldering

1.3

2.45

5.3

sot363_fw

Fig. 12. Wave soldering footprint for TSSOP6 (SOT363)

PUMB11-Q

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Product data sheet

25 October 2021

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

14. Revision history

Table 9. Revision history

Data sheet ID

Release date

20211025

Data sheet status

Change notice

Supersedes

PUMB11-Q v.1

Product data sheet

PUMB11-Q

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Product data sheet

25 October 2021

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

equipment, nor in applications where failure or malfunction of an Nexperia

product can reasonably be expected to result in personal injury, death or

severe property or environmental damage. Nexperia and its suppliers accept

no liability for inclusion and/or use of Nexperia products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

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15. Legal information

Data sheet status

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Document status Product

Definition

[1][2]

status [3]

Applications — Applications that are described herein for any of these

Objective [short]

data sheet

Development

This document contains data from

the objective specification for

product development.

products are for illustrative purposes only. Nexperia makes no representation

or warranty that such applications will be suitable for the specified use

without further testing or modification.

Preliminary [short]

data sheet

Qualification

Production

This document contains data from

the preliminary specification.

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and products using Nexperia products, and Nexperia accepts no liability for

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Customers should provide appropriate design and operating safeguards to

minimize the risks associated with their applications and products.

Product [short]

data sheet

This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have

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multiple devices. The latest product status information is available on

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and shall have no liability for the consequences of use of such information.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

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Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

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PUMB11-Q

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Product data sheet

25 October 2021

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Nexperia

PUMB11-Q

PNP/PNP resistor-equipped double transistors; R1 = 10 kΩ, R2 = 10 kΩ

Contents

1. General description......................................................1

2. Features and benefits.................................................. 1

3. Applications.................................................................. 1

4. Quick reference data....................................................1

5. Pinning information......................................................2

6. Ordering information....................................................2

7. Marking..........................................................................2

8. Limiting values............................................................. 3

9. Thermal characteristics............................................... 4

10. Characteristics............................................................5

11. Test information..........................................................7

12. Package outline.......................................................... 8

13. Soldering..................................................................... 9

14. Revision history........................................................10

15. Legal information......................................................11

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 25 October 2021

PUMB11-Q

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Product data sheet

25 October 2021

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PUMB11-Q [NEXPERIA]

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