NJM2671D2 [NJRC]
Brush DC Motor Controller, BIPolar, PDIP16, DIP-16;
| 型号： | NJM2671D2 |
| 厂家： | 
NEW JAPAN RADIO |
| 描述： | Brush DC Motor Controller, BIPolar, PDIP16, DIP-16 电动机控制 光电二极管 |
| 文件： | 总10页 (文件大小：253K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NJM2671
STEPPER MOTOR CONTROLLER / DRIVER
■GENERAL DESCRIPTION
■PACKAGE OUTLINE
NJM2671 is a two-phase unipolar stepping motor driver
with a motor output of a maximum of 60 V and a maximum
current of 500 mA.
The Step&Dir (Pulse Input) system of the motor controller
enables simple switching between half and full step modes.
A high voltage of 60 v and wide power voltage supply
range makes possible use with high-speed motor
applications and the high voltage improves reliability.
NJM2671D2
NJM2671E2
■ FEATURES
• Maximum motor power supply voltage: 60 V
• Continuous output current: 2 ch x 500 mA
• Internal driver and phase logic
• External phase logic reset terminal (RESET)
• Phase origin monitoring output terminal (MO)
• Thermal shutdown circuit
• Package DIP16 ,EMP16
■ PIN CONFIGURATIONS
PB2
PB1
VCC
MO
1
2
16
15
1
16
PB2
VCC
2
15
PB1
MO
3
14
RESET
NC
GND
PA1
GND
PA1
RESET
3
4
14
13
NJM
2671E2
4
13
NC
NJM
2671D2
12
11
5
6
PA2
DIR
NC
INH
PA2
NC
5
6
12
11
10
9
7
8
STEP
HSM
INH
φB
φ
HSM
STEP
7
8
10
9
φB
φ
Fig.1 Pin Configurations
Ver.2004-09-25
- 1 -
NJM2671
■ BLOCK DIAGRAM
VCC
POR
MO
φA
φB
STEP
PHASE
LOGIC
HSM
PB2
PB1
PA2
PA1
RESET
INH
TSD
GND
Fig.2 Block Diagram
■ PIN DESCRIPTION
Pin Pin name Description
1
2
3
4
5
6
7
PB2
PB1
GND
PA1
B2 phase output with a maximum 500 mA sinking open collector output
B1 phase output with a maximum 500 mA sinking open collector output
Vcc ground power supply terminal
A1 phase output with a maximum of 500 mA sinking open collector
A2 phase output with a maximum of 500 mA sinking open collector
Direction command input for determining motor turning direction
Motor stepping pulse input, phase logic operation triggered by negative
edge of STEP signal
PA2
DIR
STEP
8
9
0 current sequence monitor output for B phase in half step mode
0 current sequence monitor output for A phase in half step mode
Half/full step mode switching input
φB
φA
10
HSM
H level in full step mode and L level in half step mode
Phase output off input, all phase output is off at H level
Not connected
11
12
13
14
15
16
INH
NC
NC
Not connected
RESET
MO
Phase logic initial input
Phase output initial status detection output
Vcc
Logic unit power supply voltage terminal
Ver.2004-09-25
- 2 -
NJM2671
■ABSOLUTEMAXIMUMRATINGS
(Ta=25°C)
PARAMETER
PIN No.
1,2,4,5
1,2,4,5
SYMBOL
VPCEO
IP
MIN.
0
0
MAX.
UNIT
NOTE
Phase Output Voltage
Phase Output Current
Logic Supply Voltage
Logic Input Voltage Range
Logic Input Current
Logic Output Current
Junction Temperature Range
Operating Temperature
Storage Temperature
DIP16 Package
60
500
7
6
-
V
mA
V
16
VCC
VI
II
Io
Tj
Topr
Tstg
PD
PD
0
6,7,10,11,14
6,7,10,11,14
8,9,15
-0.3
-10
-
-40
-40
-50
-
V
mA
mA
°C
°C
°C
W
6
+150
85
150
1.6
1.3
EMP16 Package
-
W
■ RECOMMENDED OPERATING CONDITIONS
(Ta=25°C)
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
NOTE
Phase Output Voltage
Phase Output Current
Logic Supply voltage
Junction Temperature Range
Set-up Time
Step Pulse Range
Reset Pulse Range
VPCEO
IP
Vcc
Tj
ts
tP
10
0
4.75
-20
400
800
800
-
-
5
-
-
-
55
350
5.25
+125
-
-
-
V
mA
V
°C
ns
ns
ns
tR
-
■ELECTRICALCHARACTERISTICS
PARAMETER
(Ta=25°C)
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
• General
ICC1
ICC2
TSD
INH=LOW
INH=HIGH
-
-
-
45
12
170
60
-
-
mA
mA
°C
Supply Current
Thermal Shutdown Temperature
-
•
Phase Output
Saturation Voltage
Leak Current
Turn-ON / Turn OFF Time
VPCE Sat
IPL
Io=350mA
-
Vi=2.4V
-
-
-
-
-
-
0.85
500
3
V
µA
µs
td
•
Logic Input
H Level Input Voltage
L Level Input Voltage
H Level Input Current
L Level Input Current
VIH
VIL
IIH
-
-
2.0
-
-
-
-
-
-
-
V
V
µA
µA
0.8
-20
-
VI=2.4V
VI=0.4V
IIL
-400
•
Logic Output
Saturation Voltage
VO Sat
Io=1.6mA
-
-
0.6
V
Ver.2004-09-25
- 3 -
NJM2671
■TYPICALAPPLICATION
VMM
+5V
C≥10µF
C≥10µF
OPTIONAL
SENSOR
MO
φA
VCC
R2
R1
φB
CMOS,TTL-LS
IInput/Output Device
MOTOR
STEP
CW/CCW
STEP
DIR
HALF/FULL STEP
HSM
NJM2671
PB2
PB1
PA2
PA1
RESET
NORMAL/INHBIT
GND
RESET
INH
D1-D4
11DF2or31DF
Japan Inter
GND
GND(VCC)
C=4,700pF
GND(VMM)
Fig.3
■Function description
The NJM2671 is a high-performance low-voltage driver system for driving stepping motors with unipolar
winding.
Employing a general-purpose STEP&DIR motion controller, it can easily control a stepping motor when
combined with a pulse generator.
The phase output is as high as 60 V max. This prevents the phase output voltage margin of the motor from
being exceeded, which is a common problem with unipolar winding systems and also simplifies the design of
power control circuits during phase turn off.
■Logic input
All inputs are LS-TT compatible. When the logic input is open, the circuit recognizes any open logic inputs as H
level. The NJM2671 has built-in phase logic for optimum control of the stepping motor.
• STEP – Stepping pulse
The built-in phase logic sequencer goes UP on every negative edge of the STEP signal (pulse). In full step
mode, the pulse turns the stepping motor at the basic step angle. In half step mode, two pulses are required to
turn the motor at the basic step angle.
The DIR (direction) signal and HSM (half/full mode) are latched to the STEP negative edge and must
therefore be established before the start of the negative edge. Note the setup time ts in Figure 4.
• DIR – direction
The DIR signal determines the step direction. The direction of the stepping motor depends on how the
NJM2671 is connected to the motor. Although DIR can be modified this should be avoided since a misstep of
1 pulse increment may occur if it is set simultaneous with the negative edge. See the timing chart in Figure 4.
• HSM – half/full step mode switching
This signal determines whether the stepping motor turns at half step or full step mode. The built-in phase
logic is set to the half step mode when HSM is low level. Although HSM can be modified this should be
avoided since a misstep of 1 pulse increment may occur if it is set simultaneous with the negative edge. See
Ver.2004-09-25
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NJM2671
the timing chart in Figure 4.
• INH – phase output off
All phase output is turned off when INH goes high reducing power consumption (consumption current).
• RESET
A two-phase stepping motor repeats the same winding energizing sequence every angle that is a multiple of
four of the basic step. The phase logic sequence is repeated every four pulses in the full step mode and every
eight pulses in the half step mode.
RESET forces to initialize the phase logic to sequence start mode.
When RESET is at L level, the phase logic is initialized and the phase output is turned off.
When RESET recovers to H level, the phase output resumes the energizing pattern output at sequence
start of phase logic. Refer to Figure 5 for a reset timing chart.
■POR – power on and reset function
The internal power-on and reset circuit, which is connected to Vcc, resets the phase logic and turns off phase
output when the power is supplied to prevent missteps.
Each time the power is turned on, the energizing pattern of phase logic at sequence start is output.
■Phase output unit
The phase output unit is composed of four open collector transistors that are directly connected to the stepping
motor as shown in Figure 3.
■ΦA, ΦB bi-polar phase logic output
This ΦA, ΦB output is a signal generated by the phase logic for external monitoring to determine whether the
energizing sequence is 1-phase or 2-phase energizing. Missteps normally occur unless the switch from half step
to full step mode is performed appropriately. Use of ΦA, ΦB output switches HSM in 2-phase energizing status
(ΦA = ΦB = L level) enables switching between the half and full step modes without missteps.
■MO – origin monitor
At sequence start of the phase logic or after POR or external RESET, an L level output is made to indicate to
external devices that the energizing sequence is in initial status.
approx 3.0V 4.0V
Vcc
HSM,DIR
STEP
RESET
STEP,RESET
PB1/PA1
ts
Ip
PB2/PA
Normal
Normal
Phase
sequence
sequence
output OFF
td
After internal phase
logic initialize output
POR function
Fig.4 Timing chart
Fig.5 POR and external reset timing
Ver.2004-09-25
- 5 -
NJM2671
STEP POR
PB1 OFF OFF ON ON OFF
PB2 ON ON OFF OFF ON
PA1 OFF ON ON OFF OFF
PA2 ON OFF OFF ON ON
1
2
3
4
Fig. 6-1 Full step mode and CS sequence
Fig. 6-2 Sequence table
STEP POR
PB1 OFF ON ON OFF OFF
PB2 ON OFF OFF ON ON
1
2
3
4
PA1 OFF OFF ON ON OFF
PA2
ON ON OFF OFF ON
Fig. 7-2 Sequence table
Fig. 7-1 Full step mode, C CW sequence
STEP POR
PB1 OFF OFF OFF OFF ON ON ON OFF OFF
PB2 ON ON ON OFF OFF OFF OFF OFF ON
1
2
3
4
5
6
7
8
PA1 OFF OFF ON ON ON OFF OFF OFF OFF
PA2
ON OFF OFF OFF OFF OFF ON ON ON
Fig. 8-1 Half step mode and CW sequence
Fig. 8-2 Sequence table
STEP POR
PB1 OFF OFF ON ON ON OFF OFF OFF OFF
PB2 ON OFF OFF OFF OFF OFF ON ON ON
1
2
3
4
5
6
7
8
PA1 OFF OFF OFF OFF ON ON ON OFF OFF
PA2
ON ON ON OFF OFF OFF OFF OFF ON
Fig. 9-2 Sequence table
Fig. 9-1 Half step mode, C CW sequence
Fig. 10 Half step mode, INH sequence
Ver.2004-09-25
- 6 -
NJM2671
■Application examples
• Logic input unit
The circuit handles an open state in the logic input unit as an H level input. Unused input units should be
fixed at Vdd level to maximize noise resistance characteristics.
•Phase output unit
The phase output unit is provided with a power sink to enable unipolar drive of stepping motor windings. The
resistor connected to the common line of the winding determines the maximum motor power.
To protect output transistors from kickback power, a high-speed free wheeling diode is required. A example
solution is shown in Figures 11 to 14.
•ΦA, ΦB bi-polar phase logic output
ΦA, ΦB are open collector outputs that go high when the phase output in the half step mode is set to current
output off. A pull-up resistor is required to ensure appropriate power supply voltage. (5 k ohm recommended
for Vcc 5 V logic).
■I/O signal sequence in each drive mode
Timing charts for I/O signals in each drive mode are shown in Figures 6 to 10. The left side shows input and
output signals after POR.
■Precautions
1. Do not remove ICs or PCBs when power is supplied.
2. Note that some stepping motors may generate excessive voltages even when free wheeling diode is used.
3. Select a stepping motor with the required power rating to obtain the required torque.
Generally, the higher the input voltage of the stepping motor, the higher rpm it will produce. When the supply
voltage is higher than stepping motor rated voltage, a current limit resistor must be used to connect the
common winding to the power supply. Use the L/R time constant of the resistor to obtain optimum high-speed
rpm characteristics from the stepping motor.
4. Do not use motor power supplies (without an output capacitor) with a serial diode. Nor use ground lines with
common impedance with Vcc, instead make a one point ground connection using the ground terminal (pin 3)
of the IC.
5. To reverse motor rotation, reverse PA and PA2 (or PB1 and PB2) stepping motor connections.
6. Drive circuit
High-performance stepping motor operation requires that the windings are energized speedily at phase turn
on, and that energizing is quickly turned off at turn off.
7. Phase turnoff problems
The drive circuit may be damaged if the kickback voltage induced when the energizing of the windings is
turned off (when winding current is turned off) is not adequately suppressed. Refer to the turn-off circuit
described in Figures 11 to 14.
8. Using an MO output
Hazard may occur at the MO output terminal in half step mode. Check the output waveform and connect a 1,000
pF or higher ceramic capacitor between the MO terminal (pin 15) and the GND terminal (pin 3).
Ver.2004-09-25
- 7 -
NJM2671
Fig. 11 Diode and turn off circuit
Fig. 12 Resistor and turn off circuit
Fig. 13 Zener diode and turn off circuit
Fig. 14 Power regeneration and turn off circuit
Ver.2004-09-25
- 8 -
NJM2671
■ELECTRICAL CHARACTERISTICS EXAMPLES
Fig. 15 Ambient temperature vs. allowable power
dissipation characteristics example
Fig. 16 Phase output saturation voltage vs.
output current characteristics example
[mA]
Fig. 17 Logic output saturation voltage vs.
output current characteristics example
Fig. 18 Allowable dissipation vs. phase
(@ full step)
Ver.2004-09-25
- 9 -
NJM2671
MEMO
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
Ver.2004-09-25
- 10 -
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