NJU7709F06-TE1 [NJRC]
Power Management Circuit;
| 型号： | NJU7709F06-TE1 |
| 厂家： | 
NEW JAPAN RADIO |
| 描述： | Power Management Circuit |
| 文件： | 总8页 (文件大小：65K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NJU7708/09
VOLTAGE DETECTOR with Delay Function
ꢀ GENERAL DESCRIPTION
ꢀ PACKAGE OUTLINE
The NJU7708/09 is a low quiescent current voltage detector with
delay function featuring high precision detection voltage.
The detection voltage is internally fixed with an accuracy of 1.0%.
The NJU7708/09 are useful for preventing malfunction of
microcomputer or DSP etc. through detect a drop in voltage of
battery or power supply.
NJU7708/09F
The delay function achieves set wait time when supply voltage is
unstable. Moreover, the delay function can make a sequence that
other devices in application work and stabilize before microcomputer
or DSP works.
Delay time can be set by logical combination from 4-delay time.
NJU7708 is Nch. Open Drain and NJU7709 is a C-MOS output
type.
Small packaging makes NJU7708 and NJU7709 suitable for
space conscious applications.
ꢀ FEATURES
ꢁ High Precision detection Voltage
ꢁ Low Quiescent Current
±1.0%
1.3µA
ꢁ Detection Voltage Range
ꢁ Delay Time (Built-in Fixed Type)
ꢁ Output Configuration
1.3 6.0V(0.1V step)
0ms/50ms/100ms/200ms: Logical selectable 4-delay time
NJU7708: Nch. Open Drain Type
NJU7709: C-MOS Output Type
ꢁ CMOS Technology
ꢁ Package Outline
SOT-23-5
ꢀ PIN CONFIGURATION
5
4
PIN FUNCTION
1. D1
2. VSS
3. D2
4. VOUT
5. VDD
1
2
3
NJU7708/09F
ꢀ EQUIVALENT CIRCUIT
VDD
VOUT
VOUT
Delay Circuit
Delay Circuit
Vref
Vref
VSS
D1
D2
D1
D2
NJU7708
NJU7709
Ver.2006-02-23
- 1 -
NJU7708/09
ꢀ DETECTION VOLTAGERANK LIST
Device Name
NJU7708/09F15
NJU7708/09F27
NJU7708/09F42
NJU7708/09F06
VDET
1.5V
2.7V
4.2V
6.0V
ꢀ LOGICAL TABLE OF DELAY TIME
D1
H
H
L
D2
H
L
H
L
DELAY
0ms
50ms
100ms
200ms
L
ꢀ NJU7708
ꢀABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
Input Voltage
SYMBOL
VDD
RATINGS
+10
UNIT
V
Output Voltage
Output Current
VOUT
IOUT
V
mA
VSS-0.3 +10
50
350(*1)
200(*2)
-40 +85
-40 +125
Power Dissipation
PD
SOT-23-5
mW
Operating Temperature
Storage Temperature
Topr
Tstg
°C
°C
(*1) : Mounted on glass epoxy board based on EIA/JEDEC. (114.3x76.2x1.6mm: 2Layers)
(*2) : Device itself
ꢀ ELECTRICALCHARACTERISTICS
(Ta=25°C)
MIN. TYP. MAX. UNIT
PARAMETER
SYMBOL
TEST CONDITION
Detection Voltage
Hysterisis Voltage
VDET
VHYS
-1.0%
70
−
+1.0%
130
1.7
2.2
−
V
V
−
90
1.0
1.3
2.0
7.0
−
VDET=1.5V 2.5V Version
VDET=2.6V 6.0V Version
VDD=1.2V
µA
µA
mA
mA
µA
Quiescent Current
Output Current
ISS
VDD=VDET+1V
−
0.75
4.5
−
IOUT
Nch,VDS=0.5V
VDD=VOUT=9V
VDD=2.4V (≥2.7V Version)
−
0.1
Output Leak Current
Detection Voltage
Temperature
ILEAK
∆VDET/∆Ta Ta=0 +85°C
−
±100
−
ppm/°C
Coefficient
D1=H, D2=H
D1=H, D2=L
D1=L, D2=H
D1=L, D2=L
25
42.5
85
170
1.5
0
100
50
100
200
−
300
57.5
115
230
VDD
0.3
9
µs
ms
ms
ms
V
Delay Time
td
VDD=VDET+1V
VD1_H/ VD2_H
VD1_L/ VD2_L
VDD
Delay Time Change
Terminal Input Voltage
V
V
−
−
Operating Voltage(*3)
0.7
RL=100kΩ
(*3): The minimum operating voltage(VOPL) indicates the same value of the input voltage(VDD) on condition that VOUT
becomes 10% or less of the input voltage(VDD).
Ver.2006-02-23
- 2 -
NJU7708/09
ꢀ TEST CIRCUIT
ꢁQuiescent Current TEST CIRCUIT
ꢁDetection Voltage
/Minimum Operating Voltage TEST CIRCUIT
ISS
A
RL
VDET
/
VOPL
VDD
VDD
VOUT
VOUT
V
NJM7708
NJM7708
VDD
VOUT
V
D1
D2
D1
D2
VSS
VSS
ꢁLeak Current/Output Current TEST CIRCUIT
ꢁDelay Time=0mS TEST CIRCUIT
Oscilloscope
RL
IOUT
/
ch1
ch2
ILEAK
VDD
VDD
VOUT
A
VOUT
VDD
NJM7708
NJM7708
VDD
VOUT
VDS
/
D1
D2
D1
D2
VSS
VSS
ꢁDelay Time=50mS TEST CIRCUIT
ꢁDelay Time=100mS TEST CIRCUIT
Oscilloscope
Oscilloscope
RL
RL
ch1
ch2
ch1
ch2
VDD
VDD
VOUT
VOUT
VDD
VDD
NJM7708
NJM7708
D1
D2
D1
D2
VSS
VSS
Ver.2006-02-23
- 3 -
NJU7708/09
ꢀ TEST CIRCUIT
ꢁDelay Time=200mS TEST CIRCUIT
Oscilloscope
RL
ch1
ch2
VDD
VOUT
VDD
NJM7708
D1
D2
VSS
ꢀ TYPICALAPPLICATION
1
Power Supply Voltage Supervisory Circuit
VDD
RL
VDD
VOUT
Reset Signal
INPUT
NJM7708
Micro-Processor
etc
D1
D2
VSS
2
Power Supply Voltage Supervisory Circuit (Another Power Supply to Micro-Processor)
VDD1
VDD2
RL
VDD
VOUT
Reset Signal
INPUT
NJM7708
Micro-Processor
etc
D1
D2
VSS
Ver.2006-02-23
- 4 -
NJU7708/09
ꢀ NJU7709
ꢀABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
Input Voltage
Output Voltage
Output Current
SYMBOL
VDD
RATINGS
UNIT
V
V
+10
VSS-0.3 VDD+0.3
50
VOUT
IOUT
mA
350(*4)
200(*5)
Power Dissipation
PD
SOT-23-5
mW
Operating Temperature
Storage Temperature
Topr
Tstg
-40 +85
-40 +125
°C
°C
(*4) : Mounted on glass epoxy board based on EIA/JEDEC. (114.3x76.2x1.6mm: 2Layers)
(*5) : Device itself
ꢀ ELECTRICALCHARACTERISTICS
(Ta=25°C)
PARAMETER
SYMBOL
TEST CONDITION
MIN. TYP. MAX. UNIT
Detection Voltage
Hysterisis Voltage
VDET
VHYS
-1.0%
70
−
+1.0%
130
1.7
2.2
−
V
V
−
90
VDET=1.5V 1.9V Version
VDET=2.0V 6.0V Version
VDD=1.2V
1.0
1.3
2.0
7.0
3.5
4.0
5.0
µA
µA
mA
mA
mA
mA
mA
Quiescent Current
ISS
VDD=VDET+1V
−
0.75
4.5
2.0
Nch, VDS=0.5V
Pch, VDS=0.5V
VDD=2.4V(≥2.7V Version)
VDD=4.8V(≤3.9V Version)
−
−
−
−
Output Current
IOUT
VDD=6.0V(4.0V 5.6V Version) 2.5
VDD=8.4V (≥5.7V Version)
3.0
Detection Voltage
Temperature
Coefficient
∆VDET/∆Ta Ta=0 +85°C
−
±100
−
ppm/°C
D1=H, D2=H
D1=H, D2=L
D1=L, D2=H
D1=L, D2=L
25
42.5
85
170
1.5
100
50
100
200
−
300
57.5
115
230
VDD
µs
ms
ms
ms
V
Delay Time
td
VDD=VDET+1V,
Delay Time Change
Terminal Input
Voltage
VD1_H/ VD2_H
V
D1_L/ VD2_L
0
0.3
9
V
V
−
−
Operating Voltage (*6)
VDD
0.8
RL=100kΩ
(*6): The minimum Operating Voltage(VOPL) indicates the same value of the output voltage(VOUT) on condition that VOUT
becomes 10% or less of the input voltage(VDD).
Ver.2006-02-23
- 5 -
NJU7708/09
ꢀ TEST CIRCUIT
ꢁQuiescent Current TEST CIRCUIT
ꢁDetection Voltage TEST CIRCUIT
ISS
A
VDET
/
VOPL
VDD
VDD
VOUT
VOUT
V
NJM7709
NJM7709
VDD
VOUT
V
D1
D2
D1
D2
VSS
VSS
ꢁ Nch Output Current TEST CIRCUIT
ꢁPch Output Current TEST CIRCUIT
VDS
IOUT
A
VDD
VDD
VOUT
VOUT
A
NJM7709
VDD
NJM7709
VDD
IOUT
VDS
D1
D2
D1
D2
VSS
VSS
ꢁDelay Time=0mS TEST CIRCUIT
ꢁDelay Time=50mS TEST CIRCUIT
Oscilloscope
Oscilloscope
ch1
ch2
ch1
ch2
VDD
VDD
VOUT
VOUT
VDD
VDD
NJM7709
NJM7709
D1
D2
D1
D2
VSS
VSS
Ver.2006-02-23
- 6 -
NJU7708/09
ꢀ TEST CIRCUIT
ꢁDelay Time=100mS TEST CIRCUIT
ꢁDelay Time=200mS TEST CIRCUIT
Oscilloscope
Oscilloscope
ch1
ch2
ch1
ch2
VDD
VDD
VOUT
VOUT
VDD
VDD
NJM7709
NJM7709
D1
D2
D1
D2
VSS
VSS
ꢁMinimum Operating Voltage TEST CIRCUIT
RL
VOPL
VDD
VOUT
V
NJM7709
VDD
VOUT
V
D1
D2
VSS
ꢀ TYPICALAPPLICATION
Power Supply Voltage Supervisory Circuit
1
VDD
VDD
VOUT
Reset Signal
INPUT
NJM7709
Micro-Processor
etc
D1
D2
VSS
Ver.2006-02-23
- 7 -
NJU7708/09
ꢀ FUNCTIONAL DESCRIPTION
(1) Basic Operation
Supply voltage
(1) When supply voltage(VDD) drops below
detection voltage(VDET), Output voltage(VOUT
Hysteresis voltage
(VHYS
(VDD)
)
)
Release voltage
(VDET + VHYS
changes "H" to "L" to alert reset state.
(2) The reset state is kept while VDD is lower than
release voltage. The release voltage is a sum
of VDET and Hysterisis voltage (VHYS). Please
refer to the (*7) below.
)
Detection voltage
(VDET
)
Minimum operation
voltage (VOPL
)
VSS
(3) When VDD becomes higher than the release
voltage and reset release delay time fixed by
logical select is past, then VOUT changes from
"L" to "H" to resume normal state.
Output voltage
(VOUT
)
(*7) VHYS is to avoid unstable VOUT state caused
by rapid voltage change at nearby VDET
.
VSS
Delaytime
(*8): C-MOS output product (NJU7709) : When VDD less than VOPL, VOUT is free of the shaded region.
(2) Description of Delay Time
Delay time can be set by logical combination of D1 and D2 (see " LOGICAL TABLE OF DELAY TIME " on
page2).
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
Ver.2006-02-23
- 8 -
相关型号：
©2020 ICPDF网 联系我们和版权申明