概述
规格参数
数据手册NJU8752BKP4 概述
Audio Amplifier, 1 Channel(s), 1 Func, CMOS, QFN-28 音频/视频放大器
NJU8752BKP4 规格参数
| 是否无铅： | 不含铅 | 是否Rohs认证： | 符合 |
| 生命周期： | Obsolete | 零件包装代码： | QFN |
| 包装说明： | VQCCN, | 针数： | 28 |
| Reach Compliance Code： | compliant | ECCN代码： | EAR99 |
| HTS代码： | 8542.33.00.01 | 风险等级： | 5.84 |
| 标称带宽： | 20 kHz | 商用集成电路类型： | AUDIO AMPLIFIER |
| 增益： | 20 dB | 谐波失真： | 0.05% |
| JESD-30 代码： | S-XQCC-N28 | JESD-609代码： | e6 |
| 长度： | 4.7 mm | 信道数量： | 1 |
| 功能数量： | 1 | 端子数量： | 28 |
| 最高工作温度： | 85 °C | 最低工作温度： | -40 °C |
| 封装主体材料： | UNSPECIFIED | 封装代码： | VQCCN |
| 封装形状： | SQUARE | 封装形式： | CHIP CARRIER, VERY THIN PROFILE |
| 峰值回流温度（摄氏度）： | 260 | 认证状态： | Not Qualified |
| 座面最大高度： | 0.95 mm | 最大供电电压 (Vsup)： | 3.6 V |
| 最小供电电压 (Vsup)： | 3.1 V | 表面贴装： | YES |
| 技术： | CMOS | 温度等级： | INDUSTRIAL |
| 端子面层： | Tin/Bismuth (Sn/Bi) | 端子形式： | NO LEAD |
| 端子节距： | 0.4 mm | 端子位置： | QUAD |
| 处于峰值回流温度下的最长时间： | NOT SPECIFIED | 宽度： | 4.7 mm |
| Base Number Matches： | 1 |
NJU8752BKP4 数据手册
通过下载NJU8752BKP4数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载NJU8752/52B
PRELIMINARY
Analog Signal Input Class D Amplifier for Piezo Speaker
ꢀGENERAL DESCRIPTION
ꢀPACKAGE OUTLINE
The NJU8752/NJU8752B is an analog signal input
monaural class D amplifier for Piezo speaker. The
NJU8752/52B includes Inversion operational amplifier
input circuit, PWM modulator, an output-short protector
and a low voltage detector. Input part operates on
3.3V(TYP) as power supply and Output part operates
up to 16.0V(MAX). Therefore, it drives Piezo speaker
with louder sound and High efficiency.
NJU8752V / 52BV
The NJU8752/52B incorporates BTL amplifier, which
eliminate AC coupling capacitors, capable of driving
Piezo speaker with simple external LC low-pass filters.
Class D operation achieves lower power operation for
Piezo speaker, thus the NJU8752/52B is suited for
battery powered applications.
NJU8752BKM1
NJU8752BKP4
ꢀFEATURES
ꢁPiezo Speaker Driving
ꢁ1-channel Analog Signal Input, 1-channel BTL Output
ꢁStandby(Hi-Z), Mute Control
ꢁVoltage Gain
31dB(NJU8752)
20dB(NJU8752B)
ꢁBuilt-in Low Voltage Detector
ꢁBuilt-in Short Protector
ꢁOperating Voltage Input: 2.7 ~ 3.6V (NJU8752)
3.1 ~ 3.6V (NJU8752B)
Output: 6.0 ~ 16.0V
ꢁC-MOS Technology
ꢁPackage Outline
SSOP14 (NJU8752 / 52B)
QFN20 / QFN28 (NJU8752B)
ꢀPIN CONFIGURATION
VDD
IN
1
2
3
4
5
6
7
14
13
12
11
10
9
VSS
COM
TEST 2
STBYB
VSS
TEST 1
MUTEB
VSS
28
1
OUTP
VDDO
OUTN
VDDO
COM
NC
IN
8
TEST 1
MUTEB
NC
TEST 2
STBYB
VSS
SSOP14 (NJU8752V / 52BV)
VSS
NC
20
1
NC
OUTP
OUTN
COM
TEST 2
STBYB
VSS
IN
TEST 1
MUTEB
VSS
QFN28 (NJU8752BKP4)
OUT
OUT
QFN20 (NJU8752BKM1)
Ver.2004-08-05
- 1 -
NJU8752/52B
ꢀBLOCK DIAGRAM
VDD
VSS
VDDO
OUTP
VSS
IN
-
+
Pulse
Width
Modulator
-
+
VDDO
OUTN
VSS
COM
Short
Protector
Soft Start
Low Voltage
Control Logic
MUTEB
TEST 1
STBYB
TEST 2
ꢀPIN DESCRIPTION
No.
QFN20
SYMBOL
I/O
Function
SSOP14
QFN28
1
19
26
VDD
IN
−
I
Power Supply: VDD=3.3V
Signal Input
2
1
1
Maker test 1
3
4
2
3
2
3
TEST 1
I
This pin must be connected to GND.
Mute Control
MUTEB
I
Low : Mute ON
Power GND: VSS=0V
Positive Output
High : Mute OFF
5,10,14
4,12,17
5
6,7,9,10
11
5,17,24
VSS
−
O
−
6
7,8
9
7
8,9,13,14
15
OUTP
VDDO
Output Power Supply : VDDO=16.0V max.
Negative Output
OUTN
O
Standby Control
11
13
18
STBYB
I
Low : Standby ON
Maker test 2
High : Standby OFF
12
13
14
15
19
TEST 2
COM
I
This pin must be connected to GND.
Analog common
21
4,6,10,11,
−
−
8,16,18,20 12,16,20,22,
23,25,27,28
NC
−
Non connection
*VSS(SSOP14:Pin No.5,10,14, QFN20:Pin No.4,12,17, QFN28:Pin No.5,17,24) should be connected
at a nearest point to the IC.
*VDDO(SSOP14:Pin No.7,8, QFN20:Pin No.6,7,9,10, QFN28:Pin No.8,9,13,14) should be connected
at a nearest point to the IC.
*MUTEB(SSOP14: Pin No.4, QFN20, QFN28:Pin No.3) and STBYB(SSOP14:Pin No.11, QFN20:Pin No.13,
QFN28:Pin No.18) must be connected to VDD, when these pins are not used.
Ver.2004-08-05
- 2 -
NJU8752/52B
ꢀFUNCTIONAL DESCRIPTION
(1) Signal Output
The OUTP and OUTN generate PWM output signals, which will be converted to analog signal via external
2nd-order or higher LC filter. A switching regulator with a high response against a voltage fluctuation is the best
selection for the VDDO, which are the power supply for output drivers. To obtain better THD performance, the
stabilization of the power is required.
(2) Standby
By setting the STBYB pin to “L”, the standby mode is enabled. In the standby mode, the entire functions of the
NJU8752/52B enter a low-power state, and the output pins (OUTP and OUTN) are high impedance.
(3) Mute
By setting the MUTEB pin to “L”, the Mute function is enabled. In the Mute mode, the output pins (OUTP and
OUTN) output square wave (Duty: 50%).
(4) Low Voltage Detector
When the power supply voltage drops down to below VDD (MIN), the internal oscillation is halted for prevention
to generate unwanted frequency, and the output pins (OUTP and OUTN) become in high impedance.
(5) Short Circuit Protection
The short protector, which protects the NJU8752/52B against high short-circuit current, turns off the output
driver. After about 5 seconds from the protection, the NJU8752/52B returns to normal operation. The short
protector functions at the following accidents.
• Short between OUTP and OUTN
• Short between OUTP and VSS
• Short between OUTN and VSS
Note 1) The detectable current and the period for the protection depend on the power supply voltage
and ambient temperature.
Note 2) The short protector is not effective for a long term short-circuit but for an instantaneous accident.
Continuous high-current may cause permanent damage to the NJU8752/52B.
Ver.2004-08-05
- 3 -
NJU8752/52B
ꢀABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
Supply Voltage
SYMBOL
RATING
UNIT
VDD
-0.3 ~ +4.0
V
V
VDDO
-0.3 ~ +18.0
Input Voltage
Operating Temperature
Storage Temperature
SSOP14
Vin
Topr
Tstg
-0.3 ~ VDD+0.3
-40 ~ +85
-40 ~ +125
450
V
°C
°C
Power Dissipation
PD
mW
QFN20
QFN28
620
640
* : Mounted on two-layer board of based on the JEDEC.
Note 1) All voltage are relative to “VSS =0V” reference.
Note 2) The LSI must be used inside of the “Absolute maximum ratings”. Otherwise, a stress may cause
permanent damage to the LSI.
Note 3) De-coupling capacitors for VDD-VSS and VDDO-VSS should be connected for stable operation.
ꢀELECTRICAL CHARACTERISTICS
-NJU8752-
(Ta=25°C, VDD=3.3V, VDDO=12.0V, VSS=0V,Input Signal=1kHz, Input Signal Level=200mVrms,
Frequency Band=20Hz~20kHz, Load Impedance=0.8µF, 2nd-order 34kHz LC Filter(Q=0.75))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNIT Note
VDD Supply Voltage
VDDO Supply Voltage
Input Impedance
Voltage Gain
VDD
VDDO
ZIN
2.7
6.0
-
3.3
12.0
20
3.6
V
V
kΩ
dB
16.0
IN pin
-
-
AV
-
31
Input Signal Level
=200mVrms
Output THD=10%
A weight
Output THD
THD
-
0.05
0.08
%
4
Maximum Output
S/N
Dynamic Range
Maximum Mute Attenuation
Operating Current(Stanby)
Operating Current
(No signal input)
Vo
SN
7
-
-
90
-
10
80
83
-
-
-
Vrms
dB
4
4
Drange A weight
-
dB
MAT
IST
-
dB
µA
-
1
No-load operating
IDD
-
3.5
10
mA
No Signal Input
VIH
VIL
ILK
MUTEB, STBYB pins
MUTEB, STBYB pins
MUTEB, STBYB pins
0.7VDD
-
-
-
VDD
0.3VDD
±1.0
V
V
µA
Input Voltage
0
-
Input Leakage Current
Ver.2004-08-05
- 4 -
NJU8752/52B
-NJU8752B-
(Ta=25°C, VDD=3.3V, VDDO=12.0V, VSS=0V,Input Signal=1kHz, Input Signal Level=700mVrms,
Frequency Band=20Hz~20kHz, Load Impedance=0.8µF, 2nd-order 34kHz LC Filter(Q=0.75))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNIT Note
VDD Supply Voltage
VDDO Supply Voltage
Input Impedance
Voltage Gain
VDD
VDDO
ZIN
3.1
6.0
-
3.3
12.0
20
3.6
V
V
kΩ
dB
16.0
IN pin
-
-
AV
-
20
Input Signal Level
=700mVrms
Output THD=10%
A weight
Output THD
THD
-
0.05
0.08
%
4
Maximum Output
S/N
Dynamic Range
Maximum Mute Attenuation
Operating Current(Stanby)
Operating Current
(No signal input)
Vo
SN
Drange
MAT
IST
7
-
10
80
83
90
-
-
-
Vrms
dB
4
4
A weight
-
-
dB
-
-
dB
-
1
µA
No-load operating
No Signal Input
MUTEB, STBYB pins
MUTEB, STBYB pins
MUTEB, STBYB pins
IDD
-
3.5
10
mA
VIH
VIL
ILK
0.7VDD
-
-
-
VDD
0.3VDD
±1.0
V
V
µA
Input Voltage
0
-
Input Leakage Current
Note 4) Test system of the output THD, S/N and Dynamic Range
The output THD, S/N and dynamic range are tested in the system shown in Figure 1, where a 2nd-order
LC LPF and another filter incorporated in an audio analyzer are used.
THD
Measuring
Apparatus
Filter
20kHz
(AES17)
2nd-order
LC LPF
Input Signal
NJU8752/52B
Audio Analyzer
NJU8752/52B Test Board
Figure 1. Output THD, S/N and Dynamic Range Test System
2nd-order LPF
Filters
: Refer to “Typical Application Circuit”.
: 22Hz HPF + 20kHz LPF(AES17)
(with the A-Weight filter for S/N and Dynamic-range tests)
Ver.2004-08-05
- 5 -
NJU8752/52B
ꢀTYPICAL APPLICATION CIRCUIT
•LLB2520 is manufactured by TOKO, INC.
For detail information, please refer its technical papers.
LLB2520
33~47µH
5~10Ω
0.1µF
2.2µF
10µF
Piezo Speaker
OUTP(6)
OUTN(9)
VDD
VDD(1)
0.1µF
0.1µF
LLB2520
0.5~2µF
VSS(14)
33~47µH
5~10Ω
3.3kΩ
IN
IN(2)
COM(13)
0.1µF
10µF
10µF
VDDO
VDDO
VSS(5)
0.01µF
10µF
MUTEB(4)
TEST1(3)
0.1µF
VDDO(8)
VSS(10)
VDDO
Figure 2.1 Application Circuit example (SSOP14)
LLB2520
33~47µH
Piezo Speaker
5~10Ω
5~10Ω
0.1µF
2.2µF
10µF
OUTP(5)
VDD
VDD(19)
VSS(17)
0.1µF
0.1µF
0.5~2µF
LLB2520
33~47µH
OUTN(11)
3.3kΩ
IN
IN(1)
COM(15)
0.1µF
10µF
10µF
VDDO
VDDO
VSS(4)
0.01µF
10µF
MUTEB(3)
TEST1(2)
0.1µF
VDDO
VSS(12)
VDDO
Figure 2.2 Application Circuit example (QFN20)
Ver.2004-08-05
- 6 -
NJU8752/52B
•LLB2520 is manufactured by TOKO, INC.
For detail information, please refer its technical papers.
LLB2520
Piezo Speaker
33~47µH
5~10Ω
0.1µF
2.2µF
10µF
OUTP(7)
VDD
VDD(26)
VSS(24)
0.1µF
0.1µF
0.5~2µF
LLB2520
33~47µH
5~10Ω
OUTN(15)
3.3kΩ
IN
IN(1)
COM(21)
0.1µF
10µF
10µF
VDDO
VDDO(8,9)
VSS(5)
0.01µF
10µF
MUTEB(3)
TEST1(2)
0.1µF
VDDO
VSS(17)
VDDO
Figure 2.3 Application Circuit example (QFN28)
Note 5) De-coupling capacitors must be connected between each power supply pin and GND.
The capacity value should be adjusted on the application circuit and the operation temperature. It may
malfunction if capacity value is small.
Note 6) The power supply for VDDO require fast driving response performance such as a switching regulator for
better THD.
THD performance becomes worse by ripple if the capacity of De-coupling capacitors is small.
Note 7) The above circuit shows only application example and does not guarantee the any electrical
characteristics. Therefore, please test the circuit carefully to fit your application.
The cutoff frequency of the LC filter influences the quality of sound.
The Q factor of the LC filter must be less than “1”. Otherwise, the operating current increase when the
frequency of input signal is closed to the cutoff frequency.
Note 8) The transition time for MUTEB and STBYB signals must be less than 100µs. Otherwise, a malfunction
may be occurred.
Note 9) (1)-(26) indicates pin number.
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
Ver.2004-08-05
- 7 -
NJU8752BKP4 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| NJU8752BV | NJRC | Audio Amplifier, 1 Channel(s), 1 Func, CMOS, PDSO14, SSOP-14 | 获取价格 |
|
| NJU8752V | NJRC | Analog Signal Input Class D Amplifier for Piezo Speaker | 获取价格 |
|
| NJU8753 | ETC | Analog Signal Input Class D Amplifier | 获取价格 |
|
| NJU8753KN1 | NJRC | Audio Amplifier, 1 Channel(s), 1 Func, CMOS, QFN-28 | 获取价格 |
|
| NJU8754 | NJRC | Analog Signal Input Monaural Class D Power Amplifier | 获取价格 |
|
| NJU8754KM1 | NJRC | Analog Signal Input Monaural Class D Power Amplifier | 获取价格 |
|
| NJU8754V | NJRC | Analog Signal Input Monaural Class D Power Amplifier | 获取价格 |
|
| NJU8755 | NJRC | Analog Signal Input Stereo Class D Power Amplifier | 获取价格 |
|
| NJU8755V | NJRC | Analog Signal Input Stereo Class D Power Amplifier | 获取价格 |
|
| NJU8757KN2 | NJRC | Audio Amplifier, QFN-28 | 获取价格 |
|
NJU8752BKP4 相关文章
Bourns 密封通孔金属陶瓷微调电位计产品选型手册(英文版)
- 2024-09-20
- 6
Bourns 精密环境传感器产品选型手册(英文版)
- 2024-09-20
- 9
Bourns POWrTher 负温度系数(NTC)热敏电阻手册 (英文版)
- 2024-09-20
- 8
Bourns GMOV 混合过压保护组件产品选型手册(英文版)
- 2024-09-20
- 6
