NJW1143_技术文档

NJW1143

AUDIO PROCESSOR

■ GENERAL DESCRIPTION

■ PACKAGE OUTLINE

The NJW1143 is an audio processor which includes volume,

balance, tone control, surround, simulated stereo and AGC

function.

Also the NJW1143 features high precision characteristics about

channel balance, it is less than ±1.0dB at –70dB attenuation.

All of internal status and variables are controlled by I²C BUS.

Selectable 4-slave address is applicable to multi-speaker system.

It is suitable for any TV set.

NJW1143M

■ FEATURES

■ Operating Voltage

8 to 13V

■ I²C BUS Interface

(Fast mode applicable, Selectable 4-Slave address, 3V I/F applicable)

■ Low Output Noise

■ AGC Circuit (Selectable 4-stage compression level via I²C BUS)

■ "eala" (NJRC Surround)

■ Simulated Surround

■ Bi-CMOS Technology

■ Package Outline

DMP24

■ BLOCK DIAGRAM

TONE TONE

-Ha -La

SRFIL

AGC

OUTa

CVO

CBA

CTH

CTL

CSR

VOL1

TONE

VOL2

INa

I²C Bus

eala

&

Simulate

Stereo

AUX0

AUX1

Interface

AGC

ADR0

ADR1

SCL

INb

TONE

VOL1

VOL2

SDA

V+

Bias

Vref

GND

TONE TONE

OUTb

-Hb

-Lb

- 1 -

NJW1143

■ PIN CONFIGURATION

Ach Input

Bch Input

24

23

22

21

20

19

1

2

3

4

5

6

7

8

9

IN1a

IN1b

Ach Output

Bch Output

OUTa

OUTb

Ach Treble Filter

Bch Treble Filter

TONE-Ha

TONE-La

AGC

TONE-Hb

Bch Bass Filter

Surround Filter

Ach Bass Filter

AGC Filter

TONE-Lb

SR FIL

Pop Noise Reduction for Surround

ON/OFF Control

Pop Noise Reduction for Balance Control

Pop Noise Reduction for BASS Control

Pop Noise Reduction for Treble Control

Auxiliary Output 1

CBA

CTL

CSR

Pop Noise Reduction for Volume Control

I²C Slave Address Select 0

I²C Slave Address Select 1

SDA Serial Data Input (I²C BUS)

SCL Serial Clock Input (I²C BUS)

Ground

18

17

CVO

ADR0

ADR1

CTH

AUX1 16

Auxiliary Output 0

15

14

13

10 SDA

11 SCL

AUX0

Vref

Reference Voltage

Power Supply

GND

V+

12

- 2 -

NJW1143

■ ABSOLUTE MAXIMUM RATING (Ta=25°C)

PARAMETER

SYMBOL

RATING

15

UNIT

V

Supply Voltage

V⁺

Power Dissipation

P_D

700

mW

°C

Operating Temperature Range

Storage Temperature Range

Topr

Tstg

-20 to +75

-40 to +125

°C

■ ELECTRICAL CHARACTERISTICS (Ta=25°C, V+=9V, Rg=600Ω, R_L=47kΩ, Vin=100mVrms/1kHz,

AGC=OFF, TONE=0dB, Surround=OFF unless otherwise specified)

PARAMETER

SYMBOL

V⁺

TEST CONDITION

MIN.

7.5

-

TYP.

9.0

13

MAX.

13.0

25

UNIT

Operating Voltage

V

Supply Current

I_CC

No Signal

mA

V

Reference Voltage

Maximum Input Voltage

V_REF

V_IM

No Signal

4.0

2.8

4.5

3.0

5.0

-

VOL=-20dB,THD=10%

Vrms

OUTPUT

VOL=0dB,THD=1%

Maximum Output Voltage

V_OM

-

2.5

-

Vrms

Channel Balance 1

Channel Balance 2

Balance Boost A

G_CB1

G_CB2

VOL=0dB

-1.0

-2.0

0.0

1.0

2.0

dB

VOL=-70dB, Vin=1Vrms

CHS=”0”, BAL=”11111”

BA_BST

CHS=”1”, BAL=”11111”

Vin = 1Vrms

CHS=”1”, BAL=”11111”

CHS=”0”, BAL=”11111”

Vin = 1Vrms

Balance Cut A

Balance Boost B

Balance Cut B

BA_CUT

BB_BST

BB_CUT

-

-2.0

-

0.0

-

-70

2.0

-70

dB

Vo=0.5Vrms

BW=400Hz to 30kHz

Total Harmonic Distortion

THD

-

0.3

%

Maximum Gain

Minimum Gain

G_VMAX

G_VMIN

VOL= 0dB

-2.0

-

0.0

2.0

-90

dB

VOL= MUTE, Vin=2Vrms

-100

Vin = 1Vrms

A-weighting

VOL = 0dB

A-weighting

VOL = MUTE

A-weighting

Channel Separation

Output Noise 1

CS

-

-80

-70

dB

-

-90

(31.6)

-106

(5.0)

-85

(56.2)

dBV

(µVrms)

dBV

V_NO1

V_NO2

-96

Output Noise 2

(15.8)

(µVrms)

Logic Output: High

Logic Output: Low

4.5

0

-

5.5

AUX Output Voltage

V_AUX

V

0.5

BW: Band Width

- 3 -

NJW1143

■ ELECTRICAL CHARACTERISTICS (Ta=25°C, V+=9V, Rg=600Ω, R_L=47kΩ, Vin=100mVrms/1kHz,

AGC=OFF, TONE=0dB, Surround=OFF unless otherwise specified)

♦ TONE CONTROL

PARAMETER

SYMBOL

HF_BST

HF_FLT

TEST CONDITION

BCT=”1”, TREB=”1111”, f=10kHz

TREB=”0000”, f=10kHz

MIN.

12.5

-2.0

TYP.

15.0

0.0

MAX.

17.5

2.0

UNIT

dB

High Frequency Boost

High Frequency Flat

High Frequency Cut

Low Frequency Boost

Low Frequency Flat

Low Frequency Cut

dB

HF_CUT

LF_BST

BCT=”0”, TREB=”1111”, f=10kHz

BCB=”1”, BASS=”1111”, f=100Hz

BASS=”0000”, f=100Hz

-17.5

12.5

-2.0

-15.0

15.0

0.0

-12.5

17.5

2.0

dB

LF_FLT

dB

LF_CUT

BCB=”0”, BASS=”1111”, f=100Hz

-17.5

-15.0

-12.5

dB

♦ AGC CONTROL (AGC-ON)

PARAMETER

SYMBOL

AGC_BST

TEST CONDITION

MIN.

1.5

TYP.

3.5

0.0

MAX.

5.5

UNIT

dB

AGC Boost

AGC Flat1

AGC Flat2

AGC Flat3

AGC Flat4

Vin=50mVrms, f=1kHz

AGC_FLT1Vin=100mVrms, f=1kHz

AGC_FLT2Vin=200mVrms, f=1kHz

AGC_FLT3Vin=300mVrms, f=1kHz

AGC_FLT4Vin=400mVrms, f=1kHz

-2.5

2.5

dB

2.5

dB

2.5

dB

2.5

dB

♦ SURROUND (SURROUND-ON)

PARAMETER SYMBOL

TEST CONDITION

Ain→Aout, f=100Hz

MIN.

6.0

TYP.

8.0

MAX.

10.0

UNIT

dB

Surround Gain1

SR_GAIN1

SR_GAIN2

SR_GAIN3

SR_{GAIN 4}

SR_SIM1

SUR0=”1”, SUR=”1”

Ain→Bout, f=100Hz

SUR0=”1”, SUR=”1”

Ain→Aout, f=100Hz

SUR0=”0”, SUR=”1”

Ain→Bout, f=100Hz

SUR0=”0”, SUR=”1”

Ain+Bin→Aout, f=1kHz

SUR0=”1”, SUR=”0”

Ain+Bin→Bout, f=1kHz

SUR0=”1”, SUR=”0”

dB

Surround Gain2

1.6

10.0

7.5

3.6

12.0

9.5

5.6

14.0

11.5

5.0

Surround Gain3

Surround Gain4

Simulated Surround Gain1

Simulated Surround Gain2

1.0

3.0

SR_SIM2

1.0

3.0

5.0

- 4 -

NJW1143

■ I²C BUS CHARACTERISTICS (SDA, SCL)

I²C BUS Load Conditions: Pull up resistance 4kΩ (Connected to +5V), Load capacitance 200pF (Connected to GND)

Standard mode

MIN. TYP. MAX. MIN.

Fast mode

TYP. MAX.

PARAMETER

SYMBOL

UNIT

Low Level Input Voltage

V_IL

V_IH

0.0

2.7

-

1.5

5.0

-

0.0

2.7

0.25

0

-

1.5

5.0

-

V

High Level Input Voltage

Hysteresis of Schmitt trigger inputs

V_hys

V_OL

Low level output voltage (3mA at SDA pin)

0

0.4

Output fall time from V_IHminto V_ILmaxwith

a bus capacitance from 10pF to 400pF

Pulse width of spikes which must be suppressed

by the input filter

Input current each I/O pin with an input voltage

between 0.1V_DDand 0.9V_DDmax

20

+0.1C_b

t_of

t_SP

I_i

-

250

-

250

50

ns

µA

0

-10

10

-10

10

Capacitance for each I/O pin

SCL clock frequency

C_i

f_SCL

-

10

-

10

pF

kHz

µs

ns

µs

pF

V

100

400

Hold time (repeated) START condition.

Low period of the SCL clock

t_HD:STA

t_LOW

t_HIGH

t_SU:STA

t_HD:DAT

t_SU:DAT

t_r

4.0

4.7

4.0

4.7

0

-

0.6

1.3

0.6

0

-

High period of the SCL clock

Set-up time for a repeated START condition

Data hold time

-

3.45

0.9

Data set-up time

250

-

100

-

Rise time of both SDA and SCL signals

Fall time of both SDA and SCL signals

Set-up time for STOP condition

Bus free time between a STOP and START condition

Capacitive load for each bus line

Noise margin at the Low level

Noise margin at the High level

1000

300

t_f

-

300

-

300

t_SU:STO

t_BUF

4.0

4.7

-

0.6

1.3

-

C_b

400

V_nL

0.5

1

-

0.5

1

-

V_nH

V

C_b; total capacitance of one bus line in pF.

SDA

t_f

t_BUF

t_HD:STA

t_SP

t_r

t_f

t_r

t_SU:DAT

SCL

t_HD:STA

t_SU:STA

t_SU:STO

t_LOW

t_HD:DAT

t_HIGH

S

S r

P

S

- 5 -

NJW1143

TERMINAL DESCRIPTION

No.

SYMBOL

FUNCTION

EQUIVALENT CIRCUIT

VOLTAGE

1

INa

INb

Ach Input terminal

Bch Input terminal

V⁺/2

24

100k

REF

2

OUTa

OUTb

Ach Output terminal

Bch Output terminal

V⁺/2

1.4V

FB

50

23

32k

3

TONE-Ha

TONE-Hb

Ach Treble Filter terminal

Bch Treble Filter terminal

22

12k

4

TONE-La

TONE-Lb

Ach Bass Filter terminal

Bch Bass Filter terminal

FB

12k

21

12k

Capacitor connection terminal for

400

AGC

5

AGC attack and recovery time setting

400

- 6 -

NJW1143

TERMINAL DESCRIPTION

No.

SYMBOL

FUNCTION

EQUIVALENT CIRCUIT

VOLTAGE

Pop Noise Reduction for

Surround ON/OFF Control

6

CSR

V⁺/2

32k

8k

Pop Noise Reduction

for Volume Control

7

CVO

V⁺/2

8

9

ADR0

ADR1

I²C Slave Address Select 0

I²C Slave Address Select 1

-

4k

10

11

SDA

SCL

SDA Serial Data Input (I²C BUS)

SDA Serial Clock Input (I²C BUS)

-

12k

12

13

GND

V+

Ground terminal

-

Power Supply terminal

- 7 -

NJW1143

TERMINAL DESCRIPTION

No.

SYMBOL

FUNCTION

EQUIVALENT CIRCUIT

VOLTAGE

V⁺/2

FB

14

Vref

Reference Voltage terminal

Auxiliary 2 values voltage

Output terminal 0

15

16

AUX0

AUX1

-

50

Auxiliary 2 values voltage

Output terminal 1

Pop Noise Reduction

for Bass Control

17

18

19

CTH

CTL

CBA

Pop Noise Reduction

for Treble Control

V⁺/2

36k

Pop Noise Reduction

for Balance Control

12k

20

SRFIL

Surround filter terminal

V⁺/2

FB

4k

- 8 -

NJW1143

■ APPLICATION CIRCUIT

0.1

µ

F

0.1µF

+

1

INa

INb 24

23

OUTb

+

2

3

4

OUTa

2.2nF

100nF

330nF

2.2nF

TONE-Ha

TONE- La

AGC

TONE-Hb 22

TONE-Lb 21

SR FIL 20

CBA 19

100nF

330nF

5

6

1

µF

1

µF

+

CVO

+

µ

F

µF

18

7

8

9

CSR

CTH

+

1µF

ADR0

CTL 17

16

ADR1

AUX1

3.9kΩ

15

10 SDA

11 SCL

AUX0

Vref 14

13

1µF

+

V+

12 GND

22µF

+

(NOTE) Separate the I²C bus line from the following terminals for avoiding digital noise problem.

Pin No.

Symbol

TONE-Ha

TONE-La

Pin No.

Symbol

Pin No.

Symbol

TONE-Hb

-

3

4

20

SR FIL

22

-

21

TONE-Lb

- 9 -

NJW1143

■ DEFINITION OF I²C REGISTER

■ I²C BUS FORMAT

MSB

LSB MSB

LSB

S

Slave Address

A

Select Address

A

Data

A

P

1bit

8bit

1bit

8bit

1bit

8bit

1bit 1bit

S: Starting Term

A: Acknowledge Bit

P: Ending Term

■ SLAVE ADDRESS

MSB

LSB

1

0

ADR1

ADR0

R/W

ADR0, ADR1: Hardware pin programmable address bits

80(h), 82(h), 84(h), 86(h)

R/W=0: Write mode for register setting

R/W=1: Not available

■ CONTROL REGISTER TABLE

The select address sets each function (Volume, Balance, AGC, Tone Control, Surround etc.).

The auto-increment function cycles the select address as follows.

00H→01H→02H→03H→00H

BIT

Select

Address

D4

D3

D2

D1

D0

D7

D6

D5

00H

01H

02H

03H

VOL

CHS

BCB

BCT

BAL

SUR

AGC-FLAT

BASS

TREB

AGC-SW

Don’t Care

AUX1

AUX0

■ CONTROL REGISTER DEFAULT VALUE

Control register default value is all “0”.

BIT

Select

Address

D4

D3

D2

D1

D0

D7

0

D6

0

D5

0

00H

01H

02H

03H

0

- 10 -

NJW1143

■ I²C CONTROL COMMAND DESCRIPTION

■MASTER VOLUME CONTROL

BIT

Select

Address

D7

D6

D5

D4

D3

D2

D1

D0

00H

VOL

The volume controls both Ach and Bch by the 0.5dB step.

The volume is consisted of volume1 and volume2. The level is divided into half to each volume1 and

volume2.

■BALANCE, AGC AND INPUT SELECTOR SETTINGS

BIT

Select

Address

D7

D6

D5

D4

D3

D2

D1

D0

01H

CHS

BAL

SUR

•CHS: Channel select for balance control

“0”: Ach “Bch is attenuated”

“1”: Bch “Ach is attenuated”

•BAL: Balance control for both Ach and Bch (1dB/Step)

The balance is consisted of volume2 alone. Volume1 does not operate on balance.

•SUR : Surround Setting

SUR

Surround Setting

Remarks

D1

0

D0

0

Surround OFF

Simulated Stereo mode

"eala" High mode

Input through

0

1

For monaural signal input only

Surround Effect Small ( 8.0dB typ. )

Surround Effect Large (12.0dB typ. )

1

0

1

"eala" Low mode

■TONE CONTROL (Bass) and AGC SETTINGS

BIT

Select

Address

D7

D6

D5

D4

D3

D2

D1

D0

02H

BCB

BASS

AGC-SW

AGC-FLAT

•BCB : Bass Boost or Cut

“0” : Cut

“1” : Boost

•BASS : BASS Level

Cut Level : -15 to 0dB(1dB/Step)

Boost Level : 0 to +15dB(1dB/Step)

•AGC-SW : AGC ON/OFF Switch

“0” : AGC OFF

“1” : AGC ON (Default : 100mVrms)

•AGC-FLAT : AGC Flat Level

AGC-FLAT

AGC Flat Level

D1

0

D0

0

100mVrms

200mVrms

1

300mVrms

1

0

400mVrms

1

- 11 -

NJW1143

■TONE CONTROL (Treble) and FOCUS EFFECT SETTINGS

BIT

Select

Address

D7

D6

D5

D4

D3

D2

D1

D0

03H

BCT

TREB

Don't Care

AUX1

AUX0

•BCT : Treble Boost or Cut

“0” : Cut

“1” : Boost

•TREB : Treble Level

Cut Level : -15 to 0dB(1dB/Step)

•AUX1/AUX0: Auxiliary port High/Low

“0”: Logic output ”Low”

“1”: Logic output ”High”

- 12 -

NJW1143

■ Master Volume (Select Address: 00H)

VOL

D7

D6

D5

D4

D3

D2

D1

D0

Gain(dB)

HEX

0

-1

-2

-3

-4

-5

-6

-7

FF

FD

FB

F9

F7

F5

F3

F1

EF

ED

EB

E9

E7

E5

E3

E1

DF

DD

DB

D9

D7

D5

D3

D1

CF

CD

CB

C9

C7

C5

C3

C1

BF

BD

BB

B9

B7

B5

B3

B1

AF

AD

AB

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

-8

-9

-10

-11

-12

-13

-14

-15

-16

-17

-18

-19

-20

-21

-22

-23

-24

-25

-26

-27

-28

-29

-30

-31

-32

-33

-34

-35

-36

-37

-38

-39

-40

-41

-42

- 13 -

NJW1143

MASTER VOLUME (Cont'd)

VOL

D7

D6

D5

D4

D3

D2

D1

D0

Gain(dB)

HEX

-43

-44

-45

-46

-47

-48

-49

-50

-51

-52

-53

-54

-55

-56

-57

-58

-59

-60

-61

-62

-63

-64

-65

-66

-67

-68

-69

-70

-71

-72

-73

-74

-75

-76

-77

-78

-79

-80

-90

A9

A7

A5

A3

A1

9F

9D

9B

99

97

95

93

91

8F

8D

8B

89

87

85

83

81

7F

7D

7B

79

77

75

73

71

6F

6D

6B

69

67

65

63

61

5F

4B

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

-100

37

0

1

0

1

Mute

00

0

- 14 -

NJW1143

■ Balance (Select Address: 01H)

CHS

D7

Channel Setting

Attenuated Bch Gain

Attenuated Ach Gain

0

1

BAL

D4

0

1

0

1

0

1

0

1

Gain(dB)

D6

D5

0

1

0

1

D3

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

D2

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

-1

-2

-3

-4

-5

-6

-7

-8

0

1

-9

-10

-11

-12

-13

-14

-15

-16

-17

-18

-19

-20

-21

-22

-23

-24

-25

-26

-27

-28

-29

-30

MUTE

1

- 15 -

NJW1143

■ Tone Control Bass (Select Address: 02H)

Bass

BCB

D7

0

Cut or Boost

Cut

Boost

1

BASS

D6

1

0

D5

1

0

1

0

D4

1

0

1

0

1

0

1

0

D3

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Cut Gain(dB)

Boost Gain(dB)

-15

-14

-13

-12

-11

-10

-9

-8

-7

-6

-5

15

14

13

12

11

10

9

8

7

6

5

-4

-3

-2

-1

4

3

2

1

0

■ Tone Control Treble (Select Address: 03H)

Treble

BCT

D7

0

Cut or Boost

Cut

Boost

1

TREB

D6

1

0

D5

D4

D3

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Cut Gain(dB)

Boost Gain(dB)

-15

-14

-13

-12

-11

-10

-9

-8

-7

-6

-5

15

14

13

12

11

10

9

8

7

6

5

1

0

1

0

1

0

1

0

1

0

1

0

-4

-3

-2

-1

4

3

2

1

0

- 16 -

NJW1143

[CAUTION]

The specifications on this databook are only

given for information , without any guarantee

as regards either mistakes or omissions. The

application circuits in this databook are

described only to show representative usages

of the product and not intended for the

guarantee or permission of any right including

the industrial rights.

- 17 -


型号：	NJW1143
厂家：	NEW JAPAN RADIO
描述：	AUDIO PROCESSOR 音频处理器
文件：	总17页 (文件大小：161K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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