NJW1154 [NJRC]
2-CHANNEL ELECTRONIC VOLUME WITH INPUT SELECTOR; 带输入选择器2通道电子音量
| 型号： | NJW1154 |
| 厂家： | 
NEW JAPAN RADIO |
| 描述： | 2-CHANNEL ELECTRONIC VOLUME WITH INPUT SELECTOR |
| 文件： | 总6页 (文件大小：102K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NJW1154
2-CHANNEL ELECTRONIC VOLUME WITH INPUT SELECTOR
■ GENERAL DESCRIPTION
■ PACKAGE OUTLINE
NJW1154 is a two channel electronic volume with
6 in 1 out selector IC. It’s suitable for Input signal
trimmer of audio equipments such as DVD recorder
and VCR. These functions are controlled by I2C Bus.
NJW1154V
■ FEATURES
■ Operating Voltage
8 to 13V
■ I2C Bus control
■ 6in 1out Input Selector
■ Volume
+12 to -12dB/3dBstep, MUTE
SSOP32
■ Bi-CMOS Technology
■ Package Outline
■ BLOCK DIAGRAM
30
28
26
24
23
22
32
31
29
27
25
21
20
19
18
17
GND
Vref
I2C Bus
Interface
Internal
Power Supply
Vref
Vref
ALC
Control
3
5
7
9
10
11
1
2
4
6
8
12
13
14
15
16
NJW1154
■ ABSOLUTE MAXIMUM RATING (Ta=25°C)
PARAMETER
Power Supply Voltage
SYMBOL
V+
RATING
UNIT
V
15
800
Power Dissipation
PD
mW
°C
NOTE: EIA/JEDEC STANDARD Test board (76.2x114.3x1.6mm, 2layer, FR-4) mounting
Operating Temperature Range
Storage Temperature Range
Topr
-20 to +75
Tstg
-40 to +125
°C
■ ELECTRICAL CHARACTERISTICS (Ta=25°C,V+=+12V, RL=47kΩ)
PARAMETER
■ Power Supply
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Operating Voltage
Reference Voltage
Supply Current
V+
Vref
ICC
8
5.5
-
12
6
13
6.5
9
V
V
No signal
7
mA
■ Input/Output Characteristics (Output)
f=1KHz,THD=1%
Maximum Output Voltage
Voltage Gain 1
VOM
GV1
3.2
-0.5
+11
-13
-0.5
-0.5
-
3.7
0
-
Vrms
dB
Volume=0dB
VIN=1Vrms, f=1kHz
Volume=0dB
VIN=0.25Vrms, f=1kHz
Volume=+12dB
VIN=2.5Vrms, f=1kHz
Volume=-12dB
0.5
+13
-11
0.5
0.5
-
Voltage Gain 2
GV2
+12
-12
0
dB
Voltage Gain 3
GV3
dB
VIN=0.25Vrms, f=1kHz
Volume=+12dB , Ach - Bch
VIN=2.5Vrms, f=1kHz
Volume=-12dB , Ach - Bch
f=1KHz, VIN=1Vrms
Volume=Mute, A-weighted
Volume=0dB,
Voltage Gain Error 1
Voltage Gain Error 2
Maximum Attenuation
Output Noise
∆GV1
∆GV2
ATT
dB
0
dB
-110
dB
-114
(2µ)
-100
(10µ)
dBV
(Vrms)
VNO
-
Rg=0,A-weighted
f=1KHz,Vo=1Vrms,
Total Harmonic Distortion
T.H.D
-
0.001
-100
-100
0.05
%
Volume=0dB, BW:400 – 30kHz
Selected Input : No signal Rg=0Ω
Unselected Input : Input signal
Cross Talk
CT
CS
-
-
-
dB
dB
A-weighted
f=1KHz,Vo=1Vrms,A-weighted
Volume=0dB
Channel Separation
-90
■ ALC
ALCFLT
ALCCUT
Flat Level
ALC Cut Level
Vin = 300mVrms
Vin = 2Vrms
-
-
-
-
dB
dB
0
-12
– 2 –
NJW1154
■ I2C BUS BLOCK CHARACTERISTICS (SDA,SCL)
I2C BUS Load Conditions: Pull up resistance 4kΩ (Connected to +5V), Load capacitance 200pF (Connected to GND)
PARAMETER
SYMBOL
MIN.
0.0
3.0
0.25
0
TYP.
MAX.
1.5
5.0
-
UNIT
Low Level Input Voltage
High Level Input Voltage
Hysteresis of Schmitt trigger inputs
LOW level output voltage (3mA at SDA pin)
VIL
VIH
Vhys
VOL
-
-
-
-
V
V
V
V
0.4
Output fall time from VIHmin to VILmax with
a bus capacitance from 10pF to 400pF
tof
tSP
Ii
20+0.1Cb
-
-
-
250
50
ns
ns
µA
Pulse width of spikes which must be suppressed by the input filter
0
Input current each I/O pin with an input voltage between 0.1VDD
and 0.9VDDmax
-10
10
Capacitance for each I/O pin
SCL clock frequency
Ci
fSCL
-
-
-
-
-
-
-
-
10
400
-
-
-
-
0.9
-
300
300
-
-
pF
kHz
µs
µs
µs
µs
µs
ns
ns
ns
µs
µs
pF
V
Hold time (repeated) START condition.
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tr
0.6
1.3
0.6
0.6
0
100
-
-
0.6
1.3
-
0.5
1
Data set-up time
-
-
-
-
-
-
-
-
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Set-up time for STOP condition
Bus free time between a STOP and START condition
Capacitive load for each bus line
Noise margin at the LOW level
Noise margin at the HIGH level
tf
tSU:STO
tBUF
Cb
VnL
VnH
400
-
-
V
Cb ; total capacitance of one bus line in pF.
SDA
SCL
tBUF
tR
tF
tHD:STA
tSU:STA
tSU:STO
tHD:STA tLOW
tHD:DAT
tHIGH
tSU:DAT
Sr
P
S
P
– 3 –
NJW1154
■ APPLICATION CIRCUIT
30
28
26
24
23
22
32
31
29
27
25
21
20
19
18
17
GND
Vref
I2C Bus
Interface
Internal
Power Supply
Vref
Vref
ALC
Control
3
5
7
9
10
11
1
2
4
6
8
12
13
14
15
16
– 4 –
NJW1154
■ DEFINITION OF I2C REGISTER
♦ I2C BUS FORMAT
MSB
LSB
MSB
LSB
MSB
LSB
S
Slave Address
A
Select Address
A
Data
A
P
1bit
8bit
1bit
8bit
1bit
8bit
1bit 1bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
♦ SLAVE ADDRESS
MSB
LSB
1
0
0
0
0
0
1
R/W
R/W=0: Receive Only
R/W=1: No Output Data
♦ CONTROL REGISTER TABLE
The select address sets each function (Volume, Selector).
The auto increment function cycles the select address as follows.
00H■01H■02H■00H
BIT
Select
Address
D4
D3
D2
D1
D0
D7
D6
D5
00H
01H
02H
VOLa
VOLb
Don’t Care
Don’t Care
Selector
Don’t Care
♦ CONTROL REGISTER DEFAULT VALUE
Control register default values are as follows :
Select
BIT
D4
D3
D2
D1
D0
Address
D7
D6
D5
00H
01H
02H
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
1
0
– 5 –
NJW1154
■ CONTROL COMMAND TABLE
a) Master Volume
BIT
Select
Address
D4
D3
D2
D1
D0
D7
D6
D5
00H
01H
VOLa
VOLb
Don’t Care
Don’t Care
•VOLa / VOLb : Ach and Bch volume level setting from +12dB to -12dB with 3dB step.
VOLa / VOLb
Gain (dB)
D3
D2
D1
D0
+12
+9
+6
+3
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
-3
-6
-9
-12
Mute
b)Input Selector
BIT
Select
Address
D4
D3
D2
D1
D0
D7
D6
D5
02H
Don’t Care
Selector
•Selector : Input signal selecting
Selector
D1
D2
D0
Input
L1IN / R1IN
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
L2IN / R2IN
L3IN, L4IN / R3IN, R4IN
L5IN / R5IN
L6IN / R6IN
L7IN / R7IN
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
– 6 –
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