SM5160DM [NPC]
Programable PLL Frequency Synthesizer; 可编程PLL频率合成器
| 型号： | SM5160DM |
| 厂家： | 
NIPPON PRECISION CIRCUITS INC |
| 描述： | Programable PLL Frequency Synthesizer |
| 文件： | 总7页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM5160CM/DM
Programable PLL Frequency Synthesizer
NIPPON PRECISION CIRCUITS INC.
OVERVIEW
PINOUT (Top View)
The SM5160CM/DM is a PLL frequency synthesizer
IC with programmable input and reference frequency
dividers.
1
16
XIN
XOUT
VDD3
DOA
DOP
TEST
FR
The SM5160CM/DM features an unlock detector, out-
puts for use with active passive lowpass filters and direct
frequency divider outputs.
FV
LE
DATA
CLK
LD
The SM5160CM/DM operates from 0.95 to 2.00 V
and 2.0 to 3.3 V supplies and is available in 16-pin
SSOPs.
VSS
FIN
8
9
VDD1
VDD2
FEATURES
• Up to 95 MHz input frequency (FIN, VDD= 0.98V)
• Up to 90 MHz input frequency (FIN, VDD= 0.95V)
• Up to 13.0 MHz reference frequency (XIN)
• 1056 to 65535 programmable input frequency
divider ratio
PACKAGE DIMENSIONS (Unit: mm)
• 20 to 65532 programmable reference frequency
divider ratio (SM5160CM)
• 20 to 8188 programmable reference frequency
divider ratio (SM5160DM)
• Unlock detector
+ 0.10
0.6TYP
0.15
- 0.05
• Outputs for use with active and passive lowpass
filters
6.8 0.3
• Direct outputs from frequency dividers
• 0.95 to 2.0 V and 2.0 to 3.3 V supplies
• Molybdenum- gate CMOS process
• 16-pin SSOP
0.36 0.1
0.8
0
10
0.4 0.2
SERIES LINEUP
XIN
FIN
1056 to 65535
16 bit
SM5160CM
SM5160DM
Divider range
Counter bits
Divider range
Counter bits
20 to 65532 (4 step)
14 bit
20 to 8188 (4 step)
11 bit
1056 to 65535
16 bit
NIPPON PRECISION CIRCUITS-1
SM5160CM/DM
BLOCK DIAGRAM
VDD2
VDD1
XIN
FR
LD
11 or 14 BIT
R COUNTER
1/4
LEVEL
SHIFTER
PRESCALER
XOUT
14 BIT LATCH
LOCK
DETECTOR
TEST
DATA
CLK
PHASE
DETECTOR
17 BIT SHIFT REGISTER
VDD3
DOA
DOP
CHARGE
PUMP
16 BIT LATCH
LE
LEVEL
SHIFTER
FIN
16 BIT N COUNTER
VDD2
FV
VDD1
PIN DESCRIPTION
Number
Name
XIN
Description
1
2
Reference oscillator or external clock input. Internal feedback resistor for AC coupling
Reference oscillator or external clock output. Oscillator is OFF when VDD1 is LOW.
Supply voltage for sections not supplied by VDD1 and VDD2
Output to active lowpass filter. Single-ended, tristate output. Floating when VDD1 is LOW
Output to passive lowpass filter. Single-ended, tristate output Floating when VDD1 is LOW
Ground
XOUT
VDD3
DOA
DOP
VSS
3
4
5
6
7
FIN
Comparison frequency input. Internal feedback resistor for AC coupling
Supply voltage for XIN and FIN amplifiers
8
VDD1
VDD2
LD
9
Supply voltage for N counter and R counter
10
11
12
13
14
15
16
Unlock detector output. LOW when PLL is unlocked.
Shift register clock input
CLK
DATA
LE
Serial data input
Latch enable input
FV
Input frequency divider buffered output. This is level-shifted and input to the phase detector.
Reference frequency divider buffered output. This is level-shifted and input to the phase detector.
Test input. Internal pull-down resistor
FR
TEST
NIPPON PRECISION CIRCUITS-2
SM5160CM/DM
SPECIFICATIONS
Absolute Maximum Ratings
Parameter
Symbol
VDD1−VSS
VDD2−VSS
VDD3-VSS
VIN
Condition
Rating
Unit
V
Supply voltage range 1
−0.3 to +7.0
Supply voltage range 2
Input voltage range
−0.3 to +7.0
VSS−0.3 to VDD+0.3
−10 to +60
−40 to +125
250
V
V
Operating temperature range
Storage temperature range
Soldering temperature range
Soldering time range
TOPR
°C
°C
°C
sec
TSTG
TSLD
t
SLD
10
Electrical Characteristics
(VDD1= VDD2= 0.95 to 2.0V, VDD3= 2.0 to 3.3V, VSS= 0V, Ta= −10 to +60 °C unless otherwise noted)
Rating
Parameter
Symbol
VDD1,VDD2
VDD3
Condition
min
0.95
2.0
typ
1.00
3.0
max
2.0
Unit
V
Supply voltage 1
Supply voltage 2
VDD1 and VDD2 pins
VDD3 pin
3.3
V
FIN= 90MHz, 0.5VP-P sine wave
XIN= 12.8MHz, 0.5VP-P sine wave
VDD1= VDD2= 0.95 to 1.05V
FIN= 95MHz, 0.5VP-P sine wave
XIN= 12.8MHz, 0.5VP-P sine wave
VDD1= VDD2= 0.98 to 1.08V
VDD1= VDD2= 0V
0.80
0.85
1.20
mA
mA
Current consumption
(*1)
IDD1
1.40
10
Standby-mode current consumption
FIN maximum operating frequency
IDD2
µA
FIN: 0.5VP-P sine wave
90
95
13
MHz
fMAX1
VDD1= VDD2= 0.95 to 2.0V
FIN: 0.5VP-P sine wave
MHz
VDD1= VDD2= 0.98 to 2.0V
XIN: 0.5VP-P sine wave
XIN maximum operating frequency
FIN minimum operating frequency
XIN minimum operating frequency
FIN and XIN input voltage
CLK, DATA and LE
fMAX2
fMIN1
fMIN2
VIN
MHz
MHz
MHz
VP-P
V
FIN: 0.5VP-P sine wave
40
7
XIN: 0.5VP-P sine wave
FIN and XIN pins
0.5
VDD1
VIH
VDD3− 0.3
input voltage
VIL
0.3
10
10
60
60
V
XIN input current
IIH1
VIH= VDD1
VIL= 0V
µA
µA
µA
µA
mA
mA
mA
mA
µs
IIL1
FIN input current
IIH2
VIH= VDD1
IIL2
VIL= 0V
DOA and DOP
output current
IOH1
IOL1
IOH1
IOL1
VDD3= 2.7 to 3.3V, VOH= VDD3− 0.4V
VDD3= 2.7 to 3.3V, VOL= 0.4V
VOH= VDD2− 0.4V
VOH= 0.4V
1.0
1.0
0.1
0.1
2
LD, FV and FR
output current
DATA to CLK and CLK to LE
setup time
t
t
SU1
SU2
2
µs
hold time
t
H
2
µs
*1 Current consumption is the current consumed from VDD1 and VDD2.
NIPPON PRECISION CIRCUITS-3
SM5160CM/DM
Serial data input timing
DATA
50%
50%
tSU1
tH
CLK
50%
tSU2
LE
50%
Phase detector timing
FR
FV
DOP
DOA
LD
NIPPON PRECISION CIRCUITS-4
SM5160CM/DM
FUNCTIONAL DESCRIPTION
Lowpass Filter Connection
Programmable Frequency Divider
An external lowpass filter connects to DOP or DOA.
The output form the filter is fed to a voltage-controlled
oscillator (VCO) which generates the PLL output.
DOP is intended for use with a passive filter as shown
in figure 1. DOA is intended for use with an active filter
as shown in figure 2.
The input frequency divider and reference frequency
divider ratios can be programmed using the serial data
input.
Input data consists of 16 data bits, in the order msb to
lsb, followed by a control bit, as shown in figure 3 and 4.
SM5160CM
If the control bit is set to 0, the data is written to the
16-bit latch and then passed to the input frequency
divider.
R1
DOP
VCO
If the control bit is set to 1, the 2 lsbs are ignored and
the remaining data is written to the 14-bit latch and then
passed to the reference frequency divider.
R2
C
16BIT (N- COUNTER DATA)
Figure 1. Passive lowpass filter circuit
ignored
14BIT (R- COUNTER DATA)
0: N-LATCH
VDD VDD
1: R-LATCH
Figure 3. Serial data format (SM5160CM)
SM5160DM
RL
R2
C
VCO
R1
If the control bit is set to 0, the data is written to the
16-bit latch and then passed to the input frequency
divider.
DOA
If the control bit is set to 1, the 2 lsbs and 3msbs are
ignored and the remaining data is written to the 11-bit
latch and then passed to the reference frequency divider.
510kΩ
16BIT (N- COUNTER DATA)
Figure 2. Active lowpass filter circuit
ignored
1: R-LATCH
ignored
11BIT (R- COUNTER DATA)
0: N-LATCH
Figure 4. Serial data format (SM5160DM)
NIPPON PRECISION CIRCUITS-5
SM5160CM/DM
Serial data input timing
Stand-by mode
Serial data input timing is shown in figure 5. Data is
read on the rising edge of CLK. The state on DATA
should be changed in sync with the falling edge of CLK.
LE should be LOW while data is being written to the
shift register. When LE goes HIGH, data is transferred
from the shift register to one of the frequency divider
latches.
The stand-by mode is entered by setting VDD1,
VDD2 to 0V while the device is operation.
In the stand-by mode, the amplifiers of XIN, FIN and
N/R counter are stopped. As long as voltage is provide to
VDD3, data written in latch is kept. Exit from this mode
to normal operation, therefore, is made by providing volt-
age to VDD1, VDD2. In this mode, input to FIN must
be done AC coupling, input to XIN must be done AC
coupling or by crystal oscillator. In this mode, DOA,
DOP should be in state of floating.
CLK
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17
MSB
LSB
DATA
LE
CONTROL
Figure 5. Serial data input
NIPPON PRECISION CIRCUITS-6
SM5160CM/DM
TYPICAL APPLICATION
(For Ex. : in case of Pager)
RF
AMP
1'st
MIX
1'st
IF
2'nd
MIX
2'nd
IF
WAVE
SHAPER
B+ DISC
LPF
1'st
LO
2'nd
LO
Frequency
Multiplier
3
RAM
CPU
ROM
SM5160
XIN
TEST
XOUT
VDD3
DOA
DOP
VSS
FR
FV
LE
DECODER
DRIVER
DATA
CLK
LD
FIN
VDD1
VDD2
LCD
DRIVER
Display
DC/ DC
CONVERTER
B++
B+
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modifica-
tion. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, includ-
ing compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirect-
ly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
4-3, 2-chome Fukuzumi, Koto-ku
Tokyo, 135 -8430, JAPAN
Telephon: 03-3642-6661
NIPPON PRECISION CIRCUITS INC.
Facsimile: 03-3642-6698
NC9506AE 1995 8
NIPPON PRECISION CIRCUITS-7
相关型号：
©2020 ICPDF网 联系我们和版权申明