SM8706CV [NPC]

Clock Generator,;
SM8706CV
型号: SM8706CV
厂家: NIPPON PRECISION CIRCUITS INC    NIPPON PRECISION CIRCUITS INC
描述:

Clock Generator,

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中文:  中文翻译
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SM8706B/C  
Clock Generator with Dual PLLs  
OVERVIEW  
The SM8706B/C is a dual-PLL clock generator IC that generates 3 different system clocks using 6 outputs,  
derived from a 36.8640MHz master clock. Each PLL loop filter and crystal oscillator circuit are built-in,  
requiring no external components, and generate the independent 384fs/768fs audio system clocks, 27/54MHz  
video system clocks, and 16.9344/33.8688MHz signal processor clocks necessary for DVD player/recorder  
applications. Each system output can be stopped using control pins. The device also is compatible with  
44.1/48kHz sampling frequencies, and the sampling frequency can also be switched during operation without  
generating any output spike noise. The control method is described in "Table 1. Sampling frequency and output  
clock frequency" on page 6.  
FEATURES  
PINOUT  
(Top view)  
Difference between SM8706B and SM8706C  
• SM8706B  
- MO1/2 output:  
MO1 = 27MHz, MO2 = 54MHz  
• SM8706C  
- MO1/2 output:  
MO1 = 54MHz, MO2 = 27MHz  
- Pb free  
36.8640MHz master clock (internal PLL reference  
clock)  
PLL loop filter built-in  
Crystal oscillator circuit built-in  
Generated clocks  
1
16  
VDD1  
CE  
VSS1  
MO1  
MO2  
VDD2  
VSS2  
XTI  
SO2  
FSEL  
SO1  
VDD3  
VSS3  
AO2  
AO1  
8
9
XTO  
• Video system output: 27MHz, 54MHz  
• Audio system output: 384fs, 768fs  
• Signal processor system output: 16.9344MHz,  
33.8688MHz  
PACKAGE DIMENSIONS  
Supported sampling frequency fs: 44.1/48kHz  
Low jitter output: 40ps typ. (1-sigma, 25pF load)  
Supply voltage: 3.3V 0.3V  
16-pin VSOP package  
(Unit: mm)  
Weight: 0.07g  
APPLICATIONS  
DVD players/recorders  
DVD car navigation system  
ORDERING INFORMATION  
+ 0.1  
- 0.05  
0.15  
0.275typ  
5.1 0.2  
Device  
Package  
SM8706BV  
SM8706CV  
16-pin VSOP  
0 to 10  
0.65  
0.10  
+ 0.1  
0.5 0.2  
0.22  
- 0.05  
M
0.12  
NIPPON PRECISION CIRCUITS INC.—1  
SM8706B/C  
BLOCK DIAGRAM  
FSEL  
Reference  
Divider 0  
Phase  
Detector 0  
Charge  
Pump 0  
AO1  
AO2  
LPF 0  
VCO 0  
XTI  
X'tal  
OSC  
XTO  
Loop  
Divider 0  
(PLL 0)  
SO1  
SO2  
Control  
Logic  
Reference  
Divider 1  
Phase  
Detector 1  
Charge  
Pump 1  
LPF 1  
VCO 1  
Loop  
Divider 1  
MO1  
MO2  
(PLL 1)  
CE  
PIN DESCRIPTION  
Number  
Name  
VDD1  
VSS1  
MO1  
MO2  
VDD2  
VSS2  
XTI  
I/O  
Description  
1
2
Supply 1 for digital block  
Ground 1 for digital block  
3
O
O
Video system output 1 (SM8706B: 27MHz fixed, SM8706C: 54MHz fixed)  
Video system output 2 (SM8706B: 54MHz fixed, SM8706C: 27MHz fixed)  
Supply 2 for analog block  
4
5
6
Ground 2 for analog block  
7
I
Crystal oscillator connection or external clock input  
Crystal oscillator connection  
8
XTO  
O
O
O
9
AO1  
Audio system output 1 (384fs output)  
10  
11  
12  
13  
AO2  
Audio system output 2 (768fs output)  
VSS3  
VDD3  
SO1  
Ground 3 for digital block  
Supply 3 for digital block  
O
Signal processor system output 1 (16.9344MHz fixed)  
Sampling frequency select  
FSEL = HIGH: fs = 48kHz  
FSEL = LOW: fs = 44.1kHz  
(with internal pull-up resistor, Schmitt-trigger input)  
14  
FSEL  
I
15  
16  
SO2  
CE  
O
I
Signal processor system output 2 (33.8688MHz fixed)  
Chip enable (HIGH = Enable, LOW = Disable)  
NIPPON PRECISION CIRCUITS INC.—2  
SM8706B/C  
Note: Unless otherwise noted, VDD applies to VDD1, VDD2, and VDD3. Similarly, VSS applies to VSS1,  
VSS2, and VSS3.  
SPECIFICATIONS  
Absolute Maximum Ratings  
Parameter  
Symbol  
Condition  
Rating  
Unit  
Supply voltage range  
V
, V , V  
DD1 DD2 DD3  
0.3 to + 6.5  
V
V
V
– V  
– V  
,
,
DD1  
DD1  
DD2  
DD3  
Supply voltage deviation  
0.1  
V
V
– V  
DD3  
DD2  
Input voltage range  
V
0.3 to V + 0.3  
DD  
V
V
IN  
Output voltage range  
Power dissipation  
V
0.3 to V + 0.3  
DD  
OUT  
P
165  
mW  
°C  
D
Storage temperature range  
T
55 to + 125  
stg  
Recommended Operating Conditions  
V
= V  
= V  
= V  
= 0V unless otherwise noted.  
SS  
SS1  
SS2  
SS3  
Rating  
Parameter  
Symbol  
Condition  
Unit  
min  
+ 3.0  
typ  
max  
+ 3.6  
25  
1, 2, 3  
Supply voltage ranges  
V
, V , V  
DD1 DD2 DD3  
V
Output load capacitance 1  
Output load capacitance 2  
C
MO1, SO1, SO2 outputs  
pF  
L1  
All outputs excluding MO1,  
SO1, SO2, XTO  
C
15  
pF  
L2  
Master clock frequency  
f
When using crystal oscillator  
36.8640  
MHz  
XTAL  
Operating temperature range  
T
– 40  
+ 85  
°C  
opr  
1. The supply voltage is defined relative to V = 0V  
SS  
2. The supply voltages applied on VDD1, VDD2, and VDD3 should be derived from a common supply source.  
3. If the supply voltages on VDD1, VDD2, and VDD3 are from different sources, they should be applied simultaneously. The SM8706B/C may be dam-  
aged if the supply voltage timing is different.  
DC Electrical Characteristics  
f
= 36.8640MHz, V = 3.3V 0.3V, V = 0V, Ta = 40 to + 85 °C unless otherwise noted.  
DD SS  
XTAL  
Rating  
typ  
Parameter  
Symbol  
Condition  
Unit  
min  
max  
V
= 3.3V, Ta = 25°C,  
fs = 48kHz, Crystal oscillator,  
no load on all outputs  
DD  
Current consumption  
I
35  
45  
mA  
DD  
HIGH-level input voltage  
LOW-level input voltage  
V
0.8 V  
V
IH  
DD  
FSEL, CE, XTI, V = 3.3V  
DD  
V
0.2 V  
V
IL  
DD  
1
HIGH-level input current  
I
FSEL, CE, V = V  
DD  
1
µA  
µA  
µA  
µA  
IH1  
IN  
1
LOW-level input current  
HIGH-level input current  
LOW-level input current  
I
FSEL, CE, V = 0V  
IN  
– 100  
IL1  
I
XTI, V = V  
DD  
40  
IH2  
IN  
I
XTI, V = 0V  
IN  
– 40  
IL2  
All outputs excluding XTO,  
= 2mA  
HIGH-level output voltage  
LOW-level output voltage  
V
V
0.4  
DD  
V
V
OH  
I
OH  
All outputs excluding XTO,  
= 2mA  
V
0.4  
OL  
I
OL  
1. FSEL and CE pins have Schmitt-trigger input and built-in pull-up resistor.  
NIPPON PRECISION CIRCUITS INC.—3  
SM8706B/C  
AC Electrical Characteristics  
f
= 36.8640MHz, V = 3.3V 0.3V, V = 0V, Ta = 40 to + 85 °C unless otherwise noted.  
DD SS  
XTAL  
Rating  
typ  
Parameter  
Symbol  
Condition  
Unit  
min  
max  
1
External input clock frequency  
f
XTI, applies to external clock input use only  
36.8640  
MHz  
XTI  
MO1, SO1, SO2, C = 25 pF, transition  
L
2.0  
2.0  
2.0  
2.0  
between V = 0.2V and V = 0.8V  
DD  
OL  
DD  
OH  
2
Output clock rise time  
t
ns  
ns  
r
Outputs excluding MO1, SO1, SO2, and XTO,  
C = 15pF, transition between V = 0.2V  
and V = 0.8V  
L
OL  
DD  
OH  
DD  
MO1, SO1, SO2, C = 25pF, transition  
L
between V = 0.8V and V = 0.2V  
DD  
OH  
DD  
OL  
2
Output clock fall time  
t
f
Outputs excluding MO1, SO1, SO2, and XTO,  
C = 15pF, transition between V = 0.8V  
and V = 0.2V  
L
OH  
DD  
OL  
DD  
MO1, SO1, SO2, Ta = 25°C, C = 25pF,  
L
40  
40  
50  
50  
V
= 0.5V  
O
DD  
t
3
jitter  
(1-sigma)  
Output clock jitter  
ps  
%
Outputs excluding MO1, SO1, SO2, and XTO,  
Ta = 25°C, C = 15pF, V = 0.5V  
DD  
L
O
MO1, SO1, SO2, Ta = 25°C, C = 25pF,  
L
45  
45  
55  
55  
V
= 0.5V  
O
DD  
2
Output clock duty cycle  
Dt  
Outputs excluding MO1, SO1, SO2, and XTO,  
Ta = 25°C, C =15 pF, V = 0.5V  
DD  
L
O
2
Settling time  
t
All outputs excluding XTO  
All outputs excluding XTO  
1
1
5
µs  
S
2,4  
Power-up time  
t
ms  
P
1. When using an external clock input, the XTI duty should be 50% with 3.3V clock signal amplitude level. The input signal voltage should not exceed the  
absolute maximum rating, otherwise damage may occur.  
2. The numeric values are measured values obtained using the circuit in Figure 1 and the NPC standard evaluation board.  
3. The numeric values are measured values obtained using the circuit in Figure 2 and the NPC standard evaluation board.  
4. This is the time, after the supply is turned ON from the OFF state, until the output clock reaches 0.1% of the specified frequency.  
36.864MHz  
36.864MHz  
Oscilloscope  
Active Probe  
DUT  
(Infinium  
(HP1152A)  
HP54845A)  
Jitter  
Measurement  
System  
Oscilloscope  
(HP54720D  
+HP54721A)  
Active Probe  
(HP54701A)  
DUT  
DUT:Device under testing  
Frequency &  
Time Interval  
Analyzer  
(ASA, M1)  
Passive Probe  
(HP10435A)  
DUT:Device under testing  
(HP5371A)  
Figure 1. Measurement circuit 1  
Figure 2. Measurement circuit 2  
NIPPON PRECISION CIRCUITS INC.—4  
SM8706B/C  
FUNCTIONAL DESCRIPTION  
36.8640MHz Master Clock  
The SM8706B/C 36.8640MHz master clock circuit is congured, as shown in Figure 3, with the crystal oscil-  
lator element connected between XTI (pin 7) and XTO (pin 8).  
Alternatively, the 36.8640MHz master clock can be supplied from an external master clock input on XTI, as  
shown in Figure 4.  
If an external input clock on XTI is used, it is recommended that the frequency be 36.8640MHz, with 50%  
duty, and 3.3V voltage amplitude level.  
Furthermore, when using an external clock input, the input signal voltage should not exceed the absolute max-  
imum rating, otherwise damage may occur.  
C1  
XTI (Pin 7)  
Internal  
Circuits  
Oscillator  
Control  
Logic  
XTO (Pin 8)  
C2  
C1, C2 = 5 to 33pF  
MO1 (Pin 3)  
MO2 (Pin 4)  
Figure 3. Crystal oscillator connection  
External Clock  
Open  
XTI (Pin 7)  
Internal  
Circuits  
Oscillator  
Control  
Logic  
XTO (Pin 8)  
MO1 (Pin 3)  
MO2 (Pin 4)  
Figure 4. External clock input  
NIPPON PRECISION CIRCUITS INC.—5  
SM8706B/C  
Sampling Frequency and Output Clock Frequency  
The SM8706B/C sampling frequency fs can be switched between 44.1kHz when FSEL (pin 14) is LOW, and  
48kHz when FSEL is HIGH. The audio outputs (AO1 and AO2) are a 384fs and 768fs frequency clock, respec-  
tively, where fs is determined by the setting on FSEL. In addition, the signal processor outputs (SO1 and SO2)  
are a 16.9344MHz and 33.8688MHz frequency clock, respectively, derived from the master clock. The video  
system clocks are output on pins MO1 [27/54MHz (SM8706B/SM8706C)], and MO2 [54/27MHz  
(SM8706B/SM8706C)].  
When CE (Pin16) is HIGH, the chip is enabled. When LOW, the chip is disabled. When disabled, all output go  
LOW and all internal circuits stop operating. When CE goes LOW to HIGH, the chip moves from disabled to  
enabled, the time taken until the output frequency clocks stabilize is a maximum of 5ms.  
The SM8706B/C output clock frequencies that can be selected is shown in Table 1. The output clock response  
timing relative to the CE setting is shown in Figure 5.  
Table 1. Sampling frequency and output clock frequency (36.8640MHz master clock frequency)  
Output clock frequency [MHz]  
Sampling  
frequency  
fs [kHz]  
FSEL  
(Pin 14)  
CE  
(Pin 16)  
MO1 (Pin 3)  
MO2 (Pin 4)  
AO1  
(Pin 9)  
AO2  
(Pin 10)  
SO1  
(Pin 13)  
SO2  
(Pin 15)  
SM8706B SM8706C SM8706B SM8706C  
LOW  
HIGH  
LOW  
HIGH  
44.1  
48  
16.9344  
18.4320  
33.8688  
36.8640  
16.9344  
16.9344  
33.8688  
33.8688  
27.0000  
27.0000  
54.0000  
54.0000  
54.0000  
54.0000  
27.0000  
27.0000  
H
L
44.1  
48  
L
L
L
L
L
L
L
L
5ms  
(max)  
CE  
AO1/AO2  
SO1/SO2  
MO1/MO2  
Figure 5. CE switching response  
NIPPON PRECISION CIRCUITS INC.—6  
SM8706B/C  
Spike Noise Prevention Function  
The SM8706B/C has a spike noise prevention circuit that operates to prevent the generation of spike noise on  
the audio output clocks when the sampling frequency is switched using FSEL.  
The AO1 and AO2 output clock state before and after FSEL changes state is shown in Figure 6.  
When FSEL is switched LOW to HIGH or switched HIGH to LOW, the spike noise circuit stops the AO1 and  
AO2 outputs for a maximum of 1µs to prevent output spike noise, and then the outputs change to reect the  
FSEL setting.  
fs = 48kHz  
fs = 44.1kHz  
FSEL  
AO1  
AO2  
1µs (max)  
Figure 6. Spike noise prevention circuit timing  
(sampling frequency fs = 48kHz fs = 44.1kHz switching example)  
Sampling Frequency Switching Settling Time  
The clock output response timing when the sampling frequency fs is switched using FSEL is shown in Figure  
7. The SM8706B/C has a built-in spike noise prevention circuit. As a result, the AO1 and AO2 outputs stop for  
a xed interval after FSEL changes state, as described above, and hence the settling time t for the audio output  
s
clock when switching the sampling frequency is 1µs maximum.  
0.8VDD  
FSEL  
0.2VDD  
tS  
tS  
AO1  
AO2  
fs = 44.1kHz  
fs = 48kHz  
fs = 44.1kHz  
27.0000MHz  
/54MHz  
MO1  
MO2  
SO1  
SO2  
16.9344MHz  
/33.8688MHz  
Figure 7. Output signal switching timing  
NIPPON PRECISION CIRCUITS INC.—7  
SM8706B/C  
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to  
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for  
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits  
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision  
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.  
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or  
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,  
including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or  
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.  
NIPPON PRECISION CIRCUITS INC.  
4-3, Fukuzumi 2-chome, Koto-ku,  
Tokyo 135-8430, Japan  
Telephone: +81-3-3642-6661  
Facsimile: +81-3-3642-6698  
http://www.npc.co.jp/  
Email: sales@npc.co.jp  
NC0106BE 2002.05  
NIPPON PRECISION CIRCUITS INC.—8  

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