5962R8776001BRA [NSC]
IC ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20, Bus Driver/Transceiver;
| 型号： | 5962R8776001BRA |
| 厂家： | 
National Semiconductor |
| 描述： | IC ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20, Bus Driver/Transceiver 驱动 CD 输出元件 逻辑集成电路 |
| 文件： | 总8页 (文件大小：136K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1998
54AC244 • 54ACT244
Octal Buffer/Line Driver with TRI-STATE® Outputs
General Description
Features
n ICC and IOZ reduced by 50%
The ’AC/’ACT244 is an octal buffer and line driver designed
to be employed as a memory address driver, clock driver and
bus-oriented transmitter/receiver which provides improved
PC board density.
n TRI-STATE outputs drive bus lines or buffer memory
address registers
n Outputs source/sink 24 mA
n ’ACT244 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’AC244: 5962-87552
— ’ACT244: 5962-87760
Logic Symbol
Pin Names
OE1, OE2
I0–I7
Description
TRI-STATE Output Enable Inputs
Inputs
IEEE/IEC
O0–O7
Outputs
DS100282-1
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
FACT® is a registered trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100282
www.national.com
Connection Diagrams
Truth Tables
Inputs
Outputs
Pin Assignment for DIP
and Flatpak
OE1
L
In
L
(Pins 12, 14, 16, 18)
L
H
Z
L
H
X
H
=
=
H
L
HIGH Voltage Level
LOW Voltage Level
Inputs
Outputs
OE2
L
In
L
(Pins 3, 5, 7, 9)
L
H
Z
L
H
X
H
DS100282-2
=
=
X
Z
Immaterial
High Impedance
Pin Assignment for LCC
DS100282-3
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2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Recommended Operating
Conditions
Supply Voltage (VCC
)
’AC
2.0V to 6.0V
4.5V to 5.5V
0V to VCC
Supply Voltage (VCC
)
−0.5V to +7.0V
’ACT
DC Input Diode Current (IIK
)
Input Voltage (VI)
=
VI −0.5V
−20 mA
+20 mA
Output Voltage (VO
)
0V to VCC
=
VI VCC + 0.5V
Operating Temperature (TA)
54AC/ACT
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
−55˚C to +125˚C
125 mV/ns
DC Output Diode Current (IOK
)
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
=
VO −0.5V
−20 mA
+20 mA
=
VO VCC + 0.5V
% to 70% of V
VIN from 30
CC
DC Output Voltage (VO
DC Output Source
)
−0.5V to VCC + 0.5V
@
VCC 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (∆V/∆t)
’ACT Devices
±
±
or Sink Current (IO
)
50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND
VIN from 0.8V to 2.0V
)
50 mA
@
VCC 4.5V, 5.5V
125 mV/ns
Storage Temperature (TSTG
Junction Temperature (TJ)
CDIP
)
−65˚C to +150˚C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACT® circuits outside databook specifications.
175˚C
DC Characteristics for ’AC Family Devices
54AC
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed Limits
=
VIH
Minimum High
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
2.1
3.15
3.85
0.9
VOUT 0.1V
Level Input
Voltage
V
V
V
or VCC − 0.1V
=
VIL
Maximum Low
Level Input
Voltage
VOUT 0.1V
1.35
1.65
2.9
or VCC − 0.1V
=
VOH
Minimum High
Level Output
Voltage
IOUT −50 µA
4.4
5.4
(Note 2)
=
VIN VIL or VIH
3.0
4.5
5.5
3.0
4.5
5.5
2.4
3.7
4.7
0.1
0.1
0.1
−12 mA
−24 mA
−24 mA
V
V
IOH
=
VOL
Maximum Low
Level Output
Voltage
IOUT 50 µA
(Note 2)
=
VIN VIL or VIH
3.0
4.5
5.5
5.5
0.50
0.50
0.50
12 mA
24 mA
24 mA
V
IOL
=
±
IIN
Maximum Input
Leakage Current
1.0
µA
VI VCC, GND
3
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DC Characteristics for ’AC Family Devices (Continued)
54AC
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed Limits
=
IOZ
Maximum
VI (OE) VIL, VIH
=
±
TRI-STATE
Current
5.5
5.0
µA
VI VCC, VGND
=
VO VCC, GND
=
VOLD 1.65V Max
IOLD
IOHD
ICC
(Note 3) Minimum
Dynamic Output
Current
5.5
5.5
5.5
50
mA
mA
µA
=
VOHD 3.85V Min
−50
80.0
=
Maximum Quiescent
Supply Current
VIN VCC
or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
@
@
Note 4:
Note 5:
I
I
and I
CC
3.0V are guaranteed to be less than or equal to the respective limit 5.5V V .
IN
CC
@
@
for 54AC 25˚C is identical to 74AC 25˚C.
CC
DC Characteristics for ’ACT Family Devices
54ACT
=
Symbol
Parameter
VCC
(V)
TA
Units
Conditions
−55˚C to +125˚C
Guaranteed Limits
=
VIH
VIL
Minimum High Level
Input Voltage
4.5
5.5
4.5
5.5
4.5
5.5
2.0
2.0
0.8
0.8
4.4
5.4
V
V
V
VOUT 0.1V
or VCC − 0.1V
=
Maximum Low Level
Input Voltage
VOUT 0.1V
or VCC − 0.1V
=
VOH
Minimum High Level
Output Voltage
IOUT −50 µA
(Note 6)
=
VIN VIL or VIH
4.5
5.5
4.5
5.5
3.70
4.70
0.1
V
V
IOH
−24 mA
−24 mA
=
VOL
Maximum Low Level
Output Voltage
IOUT 50 µA
0.1
(Note 6)
=
VIN VIL or VIH
4.5
5.5
5.5
5.5
0.50
0.50
V
IOL
24 mA
24 mA
=
±
±
IIN
Maximum Input Leakage Current
Maximum TRI-STATE
Current
1.0
5.0
µA
µA
VI VCC, GND
=
IOZ
VI VIL, VIH
=
VO VCC, GND
=
VI VCC − 2.1V
ICCT
IOLD
Maximum ICC/Input
5.5
5.5
1.6
mA
mA
=
VOLD 1.65V Max
(Note 7) Minimum
Dynamic Output
Current
50
=
VOHD 3.85V Min
IOHD
ICC
5.5
5.5
−50
80.0
mA
µA
=
Maximum Quiescent
Supply Current
VIN VCC
or GND
Note 6: All outputs loaded; thresholds on input associated with output under test.
Note 7: Maximum test duration 2.0 ms, one output loaded at a time.
@ @
I for 54ACT 25˚C is identical to 74ACT 25˚C.
CC
Note 8:
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4
AC Electrical Characteristics
54AC
=
VCC
(V)
TA −55˚C
Symbol
Parameter
to +125˚C
Units
=
(Note 9)
CL 50 pF
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
12.5
9.5
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation Delay
Data to Output
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
ns
ns
ns
ns
ns
ns
Propagation Delay
Data to Output
12.0
9.0
Output Enable Time
11.5
9.0
Output Enable Time
Output Disable Time
Output Disable Time
13.0
10.5
12.5
10.5
13.0
11.0
±
Note 9: Voltage Range 3.3 is 3.3V 0.3V
±
Voltage Range 5.0 is 5.0V 0.5V
AC Electrical Characteristics
54ACT
=
VCC
(V)
TA −55˚C
Symbol
Parameter
to +125˚C
Units
=
CL 50 pF
(Note 10)
Min
Max
tPLH
Propagation Delay
Data to Output
5.0
5.0
1.0
10.0
ns
ns
tPHL
Propagation Delay
Data to Output
1.0
10.0
tPZH
tPZL
tPHZ
tPLZ
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
5.0
5.0
5.0
5.0
1.0
1.0
1.0
1.0
9.5
ns
ns
ns
ns
11.0
11.0
11.5
±
Note 10: Voltage Range 5.0 is 5.0V 0.5V
Capacitance
Symbol
Parameter
Input Capacitance
Power Dissipation
Capacitance
Typ
4.5
Units
Conditions
=
VCC OPEN
CIN
CPD
pF
pF
=
VCC 5.0V
45.0
5
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6
Physical Dimensions inches (millimeters) unless otherwise noted
20-Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J20A
7
www.national.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
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ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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