74AC257LCX [NSC]
AC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CQCC20, CERAMIC, LCC-20;
| 型号： | 74AC257LCX |
| 厂家： | 
National Semiconductor |
| 描述： | AC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CQCC20, CERAMIC, LCC-20 输出元件 |
| 文件： | 总10页 (文件大小：168K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
March 1993
54AC/74AC257 54ACT/74ACT257
#
Quad 2-Input Multiplexer with TRI-STATE Outputs
É
General Description
The ’AC/’ACT257 is
Features
Y
CC
I
and I
reduced by 50%
OZ
a quad 2-input multiplexer with
Y
Y
Y
Y
Y
TRI-STATE outputs. Four bits of data from two sources can
be selected using a Common Data Select input. The four
outputs present the selected data in true (noninverted) form.
The outputs may be switched to a high impedance state by
placing a logic HIGH on the common Output Enable (OE)
input, allowing the outputs to interface directly with bus-ori-
ented systems.
Multiplexer expansion by tying outputs together
Noninverting TRI-STATE outputs
Outputs source/sink 24 mA
’ACT257 has TTL-compatible inputs
Standard Military Drawing (SMD)
Ð ’AC257: 5962-88703
Ð ’ACT257: 5962-89689
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP, Flatpak and SOIC
IEEE/IEC
TL/F/9949–1
TL/F/9949–3
Pin Assignment
for LCC
TL/F/9949–2
Pin Names
Description
S
Common Data Select Input
TRI-STATE Output Enable Input
Data Inputs from Source 0
Data Inputs from Source 1
TRI-STATE Multiplexer Outputs
OE
I
I
–I
0a 0d
–I
1a 1d
Z –Z
a
d
TL/F/9949–4
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
FACTTM is a trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
TL/F/9949
RRD-B30M75/Printed in U. S. A.
Functional Description
The ’AC/’ACT257 is quad 2-input multiplexer with TRI-
STATE outputs. It selects four bits of data from two sources
under control of a Common Data Select input. When the
mum ratings. Designers should ensure the Output Enable
signals to TRI-STATE devices whose outputs are tied to-
gether are designed so there is no overlap.
Select input is LOW, the I inputs are selected and when
0x
Select is HIGH, the I inputs are selected. The data on the
1x
Truth Table
selected inputs appears at the outputs in true (noninverted)
form. The device is the logic implementation of a 4-pole, 2-
position switch where the position of the switch is deter-
mined by the logic levels supplied to the Select input. The
logic equations for the outputs are shown below:
Output
Enable
Select
Input
Data
Outputs
Z
Inputs
OE
S
I
0
I
1
e
e
e
e
a
a
a
a
H
L
L
L
L
X
H
H
L
X
X
X
L
X
L
Z
L
Z
Z
OE (1
S
S
S
S
I
I
I
S)
S)
S)
S)
#
#
#
#
#
#
#
#
#
a
1a
1b
1c
1d
0a
OE (1
#
b
0b
H
X
X
H
L
Z
Z
OE (1
#
c
0c
OE (1
I
0d
#
d
L
H
H
When the Output Enable (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maxi-
e
H
L
HIGH Voltage Level
LOW Voltage Level
Immaterial
e
e
e
X
Z
High Impedance
Logic Diagram
TL/F/9949–5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Recommended Operating
Conditions
Supply Voltage (V
’AC
’ACT
)
CC
2.0V to 6.0V
4.5V to 5.5V
b
a
0.5V to 7.0V
Supply Voltage (V
)
CC
DC Input Diode Current (I
)
IK
Input Voltage (V )
I
0V to V
0V to V
CC
e b
b
a
V
I
V
I
0.5V
a
20 mA
20 mA
Output Voltage (V
)
O
CC
e
V
CC
0.5V
Operating Temperature (T )
A
74AC/ACT
54AC/ACT
b
b
a
0.5V
DC Input Voltage (V )
I
0.5V to V
0.5V to V
CC
b
b
a
40 C to 85 C
§
55 C to 125 C
§
§
DC Output Diode Current (I
)
a
OK
§
e b
b
a
V
V
0.5V
a
20 mA
20 mA
O
O
Minimum Input Edge Rate (DV/Dt)
’AC Devices
e
V
CC
0.5V
a
0.5V
DC Output Voltage (V
)
O
CC
V
V
from 30% to 70% of V
@
IN
CC
g
DC Output Source or Sink Current (I
)
O
50 mA
3.3V, 4.5V, 5.5V
125 mV/ns
125 mV/ns
CC
DC V
or Ground Current
Minimum Input Edge Rate (DV/Dt)
’ACT Devices
CC
g
Per Output Pin (I or I
CC
)
50 mA
GND
)
V
V
from 0.8V to 2.0V
@
b
a
65 C to 150 C
IN
Storage Temperature (T
§
§
STG
4.5V, 5.5V
CC
Junction Temperature (T )
J
CDIP
PDIP
175 C
§
140 C
§
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACTTM circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
74AC
54AC
74AC
e
e
T
A
V
T
CC
A
e a
Symbol
Parameter
T
25 C
§
Units
Conditions
A
b
a
55 C to 125 C
b a
40 C to 85 C
(V)
§
§
§
§
Typ
Guaranteed Limits
e
0.1V
V
V
V
Minimum High Level
Input Voltage
3.0
4.5
5.5
1.5
2.1
2.1
2.1
V
IH
OUT
b
2.25
2.75
3.15
3.85
3.15
3.85
3.15
3.85
V
V
V
or V
CC
0.1V
e
Maximum Low Level
Input Voltage
3.0
4.5
5.5
1.5
0.9
0.9
0.9
V
OUT
0.1V
IL
b
2.25
2.75
1.35
1.65
1.35
1.65
1.35
1.65
or V
CC
0.1V
e b
OUT
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
2.9
4.4
5.4
I
50 mA
OH
e
*V
IN
V
IL
or V
IH
b
b
b
3.0
4.5
5.5
2.56
3.86
4.86
2.4
3.7
4.7
2.46
3.76
4.76
12 mA
V
V
I
24 mA
24 mA
OH
e
e
V
OL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
I
50 mA
OUT
*V
IN
V or V
IL IH
3.0
4.5
5.5
0.36
0.36
0.36
0.50
0.50
0.50
0.44
0.44
0.44
12 mA
V
I
24 mA
24 mA
OL
e
I
Maximum Input
Leakage Current
V
I
V , GND
CC
IN
g
g
g
1.0
5.5
0.1
1.0
mA
*All outputs loaded; thresholds on input associated with output under test.
3
DC Characteristics for ’AC Family Devices (Continued)
74AC
54AC
74AC
e
25 C
e
e
T
A
V
T
T
CC
A
A
Symbol
Parameter
Units
Conditions
a
b
a
55 C to 125 C
b a
40 C to 85 C
(V)
§
§
§
§
§
Typ
Guaranteed Limits
e
I
Maximum TRI-STATE
Leakage Current
V (OE)
I
V
, V
IL IH
OZ
e
g
g
g
5.0
5.5
0.5
10.0
mA
V
V
V
, GND
CC
I
e
V
CC
, GND
O
e
e
²
I
I
I
Minimum Dynamic
5.5
5.5
50
75
mA
mA
V
V
V
1.65V Max
3.85V Min
OLD
OHD
CC
OLD
OHD
Output Current
b
b
75
50
e
Maximum Quiescent
Supply Current
V
CC
IN
5.5
4.0
80.0
40.0
mA
or GND
²
Maximum test duration 2.0 ms, one output loaded at a time.
@
@
3.0V are guaranteed to be less than or equal to the respective limit 5.5V V
Note: I and I
IN
.
CC
CC
@ @
for 54AC 25 C is identical to 74AC 25 C.
§ §
I
CC
DC Characteristics for ’ACT Family Devices
74ACT
54ACT
74ACT
e
a
e
T
A
V
CC
(V)
T
A
55 C to 125 C
e a
Symbol
Parameter
T
25 C
§
Units
Conditions
A
b
b a
40 C to 85 C
§
Guaranteed Limits
§
§
§
Typ
e
0.1V
V
V
V
Minimum High Level
Input Voltage
4.5
5.5
1.5
1.5
2.0
2.0
2.0
2.0
2.0
2.0
V
IH
OUT
V
V
V
b
or V
CC
0.1V
e
Maximum Low Level
Input Voltage
4.5
5.5
1.5
1.5
0.8
0.8
0.8
0.8
0.8
0.8
V
OUT
0.1V
IL
b
or V
CC
0.1V
e b
OUT
Minimum High Level
Output Voltage
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
4.4
5.4
I
50 mA
OH
e
*V
IN
V
IL
or V
IH
24 mA
24 mA
b
b
4.5
5.5
3.86
4.86
3.70
4.70
3.76
4.76
V
V
I
OH
e
e
V
OL
Maximum Low Level
Output Voltage
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
I
50 mA
OUT
*V
IN
V or V
IL IH
4.5
5.5
0.36
0.36
0.50
0.50
0.44
0.44
24 mA
V
I
OL
24 mA
e
I
I
I
Maximum Input
Leakage Current
V
V
, GND
CC
IN
I
I
g
g
g
g
g
5.5
5.5
5.5
0.1
0.5
1.0
1.0
5.0
mA
mA
mA
e
Maximum TRI-STATE
Leakage Current
V
V
V , V
IL IH
OZ
g
10.0
e
V
, GND
CC
O
e
b
2.1V
Maximum
V
V
CC
CCT
I
0.6
1.6
50
1.5
75
I
/Input
CC
e
²
I
I
I
Minimum Dynamic
5.5
5.5
mA
mA
V
V
V
1.65V Max
e
3.85V Min
OLD
OHD
CC
OLD
Output Current
b
b
50
75
OHD
e
Maximum Quiescent
Supply Current
V
CC
IN
5.5
4.0
80.0
40.0
mA
or GND
*All outputs loaded; thresholds on input associated with output under test.
²
Maximum test duration 2.0 ms, one output loaded at a time.
@ @
for 54ACT 25 C is identical to 74ACT 25 C.
§ §
Note: I
CC
4
AC Electrical Characteristics
74AC
54AC
e b
74AC
e b
V
*
T
55 C
T
A
40 C
§
§
Symbol
Parameter
Units
CC
A
e a
T
25 C
§
50 pF
A
a
a
to 85 C
(V)
to 125 C
§
50 pF
§
50 pF
e
C
L
e
e
C
C
L
L
Propagation Delay
3.3
5.0
1.5
1.5
5.0
4.0
8.5
6.0
1.0
1.0
11.0
1.0
1.0
9.0
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
PLH
PHL
PLH
PHL
PZH
I
to Z
8.0
7.0
n
n
Propagation Delay
to Z
3.3
5.0
1.5
1.5
6.0
4.5
8.5
6.0
1.0
1.0
11.0
8.5
1.0
1.0
9.0
7.0
I
n
n
Propagation Delay
S to Z
3.3
5.0
1.5
1.5
7.0
5.0
10.5
7.5
1.0
1.0
14.5
11.0
1.5
1.0
11.5
8.5
n
Propagation Delay
S to Z
3.3
5.0
1.5
1.5
7.5
5.5
10.5
7.5
1.0
1.0
14.5
11.0
1.5
1.0
11.5
8.5
n
3.3
5.0
1.5
1.5
6.5
5.0
9.5
7.5
1.0
1.0
13.0
10.0
1.0
1.0
10.5
8.5
t
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
3.3
5.0
1.5
1.5
5.5
5.0
9.0
8.5
1.0
1.0
11.0
9.5
1.0
1.0
10.0
9.5
t
PZL
3.3
5.0
1.5
1.5
5.5
5.0
10.0
9.0
1.0
1.0
13.0
11.0
1.0
1.0
11.0
10.0
t
PHZ
3.3
5.0
1.5
1.5
5.5
5.0
9.0
8.0
1.0
1.0
10.5
9.5
1.0
1.0
10.0
9.0
t
PLZ
g
*Voltage Range 3.3 is 3.0V 0.3V
g
Voltage Range 5.0 is 5.0V 0.5V
AC Electrical Characteristics
74ACT
e a
54ACT
e b
74ACT
e b
40 C
V
*
T
55 C
T
§
to 125 C
§
Symbol
Parameter
Units
CC
A
A
T
25 C
§
A
a
e
a
to 85 C
(V)
§
50 pF
§
50 pF
e
C
50 pF
L
e
C
C
L
L
Propagation Delay
t
t
t
t
5.0
5.0
5.0
5.0
1.5
2.0
2.0
2.5
5.0
6.0
7.0
7.0
7.0
7.5
1.0
8.0
1.0
7.5
ns
ns
ns
ns
PLH
PHL
PLH
I
to Z
n
n
Propagation Delay
to Z
1.0
1.0
1.0
9.5
1.5
1.5
2.0
8.5
I
n
n
Propagation Delay
S to Z
9.5
11.0
11.5
10.5
11.5
n
Propagation Delay
S to Z
10.5
PHL
n
t
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
5.0
5.0
5.0
5.0
2.0
2.0
2.5
2.0
6.0
6.0
6.5
6.0
8.0
8.0
9.0
7.5
1.0
1.0
1.0
1.0
9.5
9.5
1.5
1.5
1.5
1.5
9.0
9.0
ns
ns
ns
ns
PZH
t
PZL
t
10.5
9.5
10.0
8.5
PHZ
t
PLZ
g
*Voltage Range 5.0 is 5.0V 0.5V
Capacitance
Symbol
Parameter
Typ
Units
Conditions
e
e
C
C
Input Capacitance
4.5
pF
pF
V
OPEN
5.0V
IN
CC
CC
Power Dissipation
Capacitance
PD
50.0
V
5
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74ACT 257
P
C
QR
Temperature Range Family
Special Variations
e
e
e
e
e
e
74AC
54AC
74ACT
54ACT
Commercial
Military
Commercial TTL-Compatible
Military TTL-Compatible
X
QR
Devices shipped in 13 reels
×
Commercial grade device with
burn-in
e
QB
Military grade device with
environmental and burn-in
processing shipped in tubes
Device Type
Package Code
Temperature Range
e
e
e
e
e
P
D
F
L
Plastic DIP
Ceramic DIP
Flatpak
Leadless Ceramic Chip Carrier (LCC)
Small Outline (SOIC)
e
e
b a
C
M
Commercial ( 40 C to 85 C)
§
§
b a
Military ( 55 C to 125 C)
§
§
S
6
7
Physical Dimensions inches (millimeters)
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
16 Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
8
Physical Dimensions inches (millimeters) (Continued)
16 Lead Small Outline Integrated Circuit (S)
NS Package Number M16A
16 Lead Plastic Dual-In-Line Package (P)
NS Package Number N16E
9
Physical Dimensions inches (millimeters) (Continued)
16 Lead Ceramic Flatpak (F)
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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