9334DMQB [NSC]

8-Bit Addressable Latch; 8位可寻址锁存器
9334DMQB
型号: 9334DMQB
厂家: National Semiconductor    National Semiconductor
描述:

8-Bit Addressable Latch
8位可寻址锁存器

触发器 锁存器 逻辑集成电路
文件: 总6页 (文件大小:151K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
June 1989  
9334/DM9334 8-Bit Addressable Latch  
General Description  
The DM9334 is a high speed 8-bit Addressable Latch de-  
signed for general purpose storage applications in digital  
systems. It is a multifunctional device capable of storing sin-  
gle line data in eight addressable latches, and being a one-  
of-eight decoder and demultiplexer with active level high  
outputs. The device also incorporates an active level low  
common clear for resetting all latches, as well as an active  
level low enable.  
When operating the device as an addressable latch, chang-  
ing more than one bit of the address could impose a tran-  
sient wrong address. Therefore, this should only be done  
while in the memory mode.  
The function tables summarize the operation of the product.  
Features  
Y
Common clear  
The DM9334 has four modes of operation which are shown  
in the mode selection table. In the addressable latch mode,  
data on the data line (D) is written into the addressed latch.  
The addressed latch will follow the data input with all non-  
addressed latches remaining in their previous states. In the  
memory mode, all latches remain in their previous state and  
are unaffected by the data or address inputs.  
Y
Easily expandable  
Y
Random (addressable) data entry  
Y
Serial to parallel capability  
Y
8 bits of storage/output of each bit available  
Y
Active high demultiplexing/decoding capability  
Y
Alternate Military/Aerospace device (9334) is available.  
Contact a National Semiconductor Sales Office/Distrib-  
utor for specifications.  
In the one-of-eight decoding or demultiplexing mode, the  
addressed output will follow the state of the D input with all  
other inputs in the low state. In the clear mode all outputs  
are low and unaffected by the address and data inputs.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6609–1  
Order Number 9334DMQB, 9334FMQB, DM9334J or DM9334N  
See NS Package Number J16A, N16E or W16A  
C
1995 National Semiconductor Corporation  
TL/F/6609  
RRD-B30M105/Printed in U. S. A.  
Absolute Maximum Ratings (Note)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales  
Office/Distributors for availability and specifications.  
Note: The ‘‘Absolute Maximum Ratings’’ are those values  
beyond which the safety of the device cannot be guaran-  
teed. The device should not be operated at these limits. The  
parametric values defined in the ‘‘Electrical Characteristics’’  
table are not guaranteed at the absolute maximum ratings.  
The ‘‘Recommended Operating Conditions’’ table will define  
the conditions for actual device operation.  
Supply Voltage  
Input Voltage  
7V  
5.5V  
Operating Free Air Temperature Range  
Military  
Commercial  
b
b
a
55 C to 125 C  
§
§
a
0 to 70 C  
§
§
§
a
65 C to 150 C  
Storage Temperature Range  
§
Recommended Operating Conditions  
Military  
Nom  
5
Commercial  
Symbol  
Parameter  
Units  
Min  
4.5  
2
Max  
Min  
4.75  
2
Nom  
Max  
V
V
V
Supply Voltage  
5.5  
5
5.25  
V
V
CC  
High Level Input Voltage  
Low Level Input Voltage  
High Level Output Current  
Low Level Output Current  
IH  
0.8  
0.8  
V
IL  
b
b
I
I
0.8  
0.8  
mA  
mA  
OH  
OL  
16  
16  
t
ENABLE Pulse Width  
(Fig. 1) (Note 4)  
W
19  
13  
19  
13  
ns  
ns  
ns  
t
SU  
Setup Time  
(Note 4)  
Data 1 (Fig. 4)  
20  
20  
13  
14  
20  
20  
13  
14  
Data 0 (Fig. 4)  
Address (Fig. 6)  
(Note 1)  
10  
5
10  
5
b
b
b
b
t
H
Hold Time  
(Note 4)  
Data 1 (Fig. 4)  
Data 0 (Fig. 4)  
0
0
10  
13  
0
0
0
10  
13  
b
T
Free Air Operating Temperature  
55  
125  
70  
C
§
A
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)  
Typ  
Symbol  
Parameter  
Conditions  
Min  
Max  
Units  
(Note 2)  
e
e
e b  
e
b
1.5  
V
V
Input Clamp Voltage  
V
Min, I  
Min, I  
12 mA  
V
V
I
CC  
I
High Level Output  
Voltage  
V
V
Max  
Min  
OH  
CC  
OH  
2.4  
3.6  
0.2  
e
e
Max, V  
IL  
IH  
e
e
V
OL  
Low Level Output  
Voltage  
V
V
Min, I  
Max  
CC  
OL  
0.4  
V
e
e
Min, V  
Max  
IH  
IL  
@
Input Current Max  
e
e
I
I
I
V
Max, V  
5.5V  
I
CC  
1
mA  
mA  
Input Voltage  
e
2.4V  
High Level Input  
Current  
V
V
Max  
E Input  
Others  
E Input  
Others  
MIL  
60  
40  
IH  
CC  
e
I
e
0.4V  
b
I
I
I
Low Level Input  
Current  
V
V
Max  
2.4  
1.6  
IL  
CC  
mA  
e
I
b
e
(Note 3)  
b
b
b
b
Short Circuit  
V
Max  
30  
30  
100  
100  
OS  
CC  
mA  
mA  
Output Current  
COM  
e
Supply Current  
V
Max  
56  
86  
CC  
CC  
Note 1: The ADDRESS setup time is the time before the negative ENABLE transition that the ADDRESS must be stable so that the correct latch is addressed  
without affecting the other latches.  
e
e
25 C.  
Note 2: All typicals are at V  
5V, T  
§
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.  
CC  
A
e
e
5V.  
Note 4: T  
25 C and V  
§
A
CC  
2
e
e
25 C (See Section 1 for Test Waveforms and Output Load)  
Switching Characteristics at V  
5V and T  
§
CC  
A
e
e
L
From (Input)  
To (Output)  
R
400X, C  
15 pF  
Max  
L
Symbol  
Parameter  
Units  
Min  
t
t
t
t
t
t
t
Propagation Delay Time  
Low to High Level Output  
Enable to  
PLH  
PHL  
PLH  
PHL  
PLH  
PHL  
PHL  
28  
27  
35  
28  
35  
35  
31  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Output, Fig. 1  
Propagation Delay Time  
High to Low Level Output  
Enable to  
Output, Fig. 1  
Propagation Delay Time  
Low to High Level Output  
Data to  
Output, Fig. 2  
Propagation Delay Time  
High to Low Level Output  
Data to  
Output, Fig. 2  
Propagation Delay Time  
Low to High Level Output  
Address to  
Output, Fig. 3  
Propagation Delay Time  
High to Low Level Output  
Address to  
Output, Fig. 3  
Propagation Delay Time  
High to Low Level Output  
Clear to  
Output, Fig. 5  
Function Tables  
E
C
Mode  
L
H
L
H
H
L
Addressable Latch  
Memory  
Active High Eight  
Channel Demultiplexer  
Clear  
H
L
Inputs  
Present Output States  
Mode  
C
E
D
A0  
A1  
A2  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
L
H
X
X
X
X
L
L
L
L
L
L
L
L
Clear  
L
L
L
L
#
#
#
L
L
L
L
L
#
#
#
L
L
H
L
H
#
L
L
L
L
L
L
#
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
#
#
#
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
L
H
Demultiplex  
Memory  
#
#
#
#
H
H
X
H
H
X
L
L
L
L
L
L
H
H
H
X
X
Q
b
N
1
H
H
H
H
#
#
#
H
H
e
e
e
L
L
L
L
#
#
#
L
L
H
L
H
#
#
#
L
L
L
L
L
L
L
#
L
L
L
L
L
Q
Q
Q
b
N
b
b
b
b
b
b
N
N
1
1
N
N
N
N
1
1
1
1
1
H
Q
Q
Q
Q
H
H
Q
Q
L
b
N
N
1
1
H
Addressable  
Latch  
b
#
#
#
#
#
H
H
H
H
H
Q
Q
Q
Q
L
b
b
b
b
N
N
1
1
N
1
1
L
H
H
H
N
X
L
Don’t Care Condition  
Low Voltage Level  
High Voltage Level  
H
Q
e
1
Previous Output State  
b
N
3
Logic Diagram  
9334  
TL/F/6609–2  
Switching Time Waveforms  
TL/F/6609–4  
e
e
e
H, A Stable  
Other Conditions: E  
L, C  
Figure 2  
TL/F/6609–3  
e
e
Stable  
Other Conditions: C  
H, A  
Figure 1  
TL/F/6609–6  
TL/F/6609–5  
e
e
Stable  
Other Conditions: C  
H, A  
e
e
e
L, D H  
Other Conditions: E  
L, C  
Figure 4  
Figure 3  
TL/F/6609–8  
TL/F/6609–7  
e
Other Conditions: C  
H
e
Other Conditons: E  
H
Figure 6  
Figure 5  
Note: The shaded areas indicate when the inputs are permitted to change for predictable output performance.  
4
Physical Dimensions inches (millimeters)  
16-Lead Ceramic Dual-In-Line Package (J)  
Order Number 9334DMQB or DM9334J  
NS Package Number J16A  
16-Lead Molded Dual-In-Line Package (N)  
Order Number DM9334N  
NS Package Number N16E  
5
Physical Dimensions inches (millimeters) (Continued)  
16-Lead Ceramic Flat Package (W)  
Order Number 9334FMQB  
NS Package Number W16A  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and whose  
failure to perform, when properly used in accordance  
with instructions for use provided in the labeling, can  
be reasonably expected to result in a significant injury  
to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
National Semiconductor  
Corporation  
National Semiconductor  
Europe  
National Semiconductor  
Hong Kong Ltd.  
National Semiconductor  
Japan Ltd.  
a
1111 West Bardin Road  
Arlington, TX 76017  
Tel: 1(800) 272-9959  
Fax: 1(800) 737-7018  
Fax:  
(
49) 0-180-530 85 86  
@
13th Floor, Straight Block,  
Ocean Centre, 5 Canton Rd.  
Tsimshatsui, Kowloon  
Hong Kong  
Tel: (852) 2737-1600  
Fax: (852) 2736-9960  
Tel: 81-043-299-2309  
Fax: 81-043-299-2408  
Email: cnjwge tevm2.nsc.com  
a
a
a
a
Deutsch Tel:  
English Tel:  
Fran3ais Tel:  
Italiano Tel:  
(
(
(
(
49) 0-180-530 85 85  
49) 0-180-532 78 32  
49) 0-180-532 93 58  
49) 0-180-534 16 80  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

相关型号:

9334FC

D Latch, 1-Func, 8-Bit, TTL, CDFP16,
FAIRCHILD

9334FC

D Flip-Flop
ROCHESTER

9334FCQM

D Flip-Flop
ROCHESTER

9334FCQR

D Latch, 1-Func, 8-Bit, TTL, CDFP16,
FAIRCHILD

9334FCQR

D Flip-Flop
ROCHESTER

9334FM

D Latch, 1-Func, 8-Bit, TTL, CDFP16,
FAIRCHILD

9334FM

D Flip-Flop
ROCHESTER

9334FMQB

8-Bit Addressable Latch
NSC

9334FMQB

93 SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, CDFP16, CERAMIC, FP-16
TI

9334PCQM

D Flip-Flop
ROCHESTER

9334PCQR

D Latch, 1-Func, 8-Bit, TTL, PDIP16,
FAIRCHILD

9334PCQR

D Flip-Flop
ROCHESTER