CLC452AJM5X [NSC]
IC OP-AMP, 8000 uV OFFSET-MAX, 190 MHz BAND WIDTH, PDSO5, SOT-23, 5 PIN, Operational Amplifier;
| 型号： | CLC452AJM5X |
| 厂家： | 
National Semiconductor |
| 描述： | IC OP-AMP, 8000 uV OFFSET-MAX, 190 MHz BAND WIDTH, PDSO5, SOT-23, 5 PIN, Operational Amplifier 放大器 光电二极管 |
| 文件： | 总12页 (文件大小：189K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 1999
N
CLC452
Single Supply, Low-Power, High Output,
Current Feedback Amplifier
General Description
Features
■
The CLC452 has a new output stage that delivers high output
drive current (100mA), but consumes minimal quiescent supply
current (3.0mA) from a single 5V supply. Its current feedback
architecture, fabricated in an advanced complementary bipolar
process, maintains consistent performance over a wide range of
gains and signal levels, and has a linear-phase response up to
one half of the -3dB frequency.
100mA output current
■
3.0mA supply current
■
130MHz bandwidth (A = +2)
v
■
■
■
■
■
■
-78/-85dBc HD2/HD3 (1MHz)
25ns settling to 0.05%
400V/µs slew rate
Stable for capacitive loads up to 1000pF
Single 5V to ±5V supplies
The CLC452 offers superior dynamic performance with a
Available in Tiny SOT23-5 package
130MHz small-signal bandwidth, 400V/µs slew rate and 4.5ns
Applications
rise/fall times (2V
). The combination of low quiescent power,
step
■
Coaxial cable driver
high output current drive, and high-speed performance make
the CLC452 well suited for many battery-powered personal
communication/computing systems.
■
Twisted pair driver
■
Transformer/Coil Driver
■
High capacitive load driver
■
The ability to drive low-impedance, highly capacitive loads,
makes the CLC452 ideal for single ended cable applications. It
also drives low impedance loads with minimum distortion. The
CLC452 will drive a 100Ω load with only -75/-74dBc second/third
harmonic distortion (A = +2, V = 2V , f = 1MHz). With a 25Ω
Video line driver
Portable/battery-powered applications
A/D driver
■
■
Maximum Output Voltage vs. RL
10
v
out
pp
load, and the same conditions, it produces only -65/-77dBc sec-
ond/third harmonic distortion. It is also optimized for driving high
currents into single-ended transformers and coils.
9
8
VCC = ±5V
7
6
5
4
When driving the input of high-resolution A/D converters, the
CLC452 provides excellent -78/-85dBc second/third harmonic
distortion (A = +2, V
= 2V , f = 1MHz, R = 1kΩ) and fast
v
out
pp L
3
2
1
Vs = +5V
settling time.
Available in SOT23-5, the CLC452 is ideal for applications where
space is critical.
10
100
1000
RL (Ω)
Response After 10m of Cable
+5V
Typical Application
Single Supply Cable Driver
Vin = 10MHz, 0.5Vpp
6.8µF
+
5kΩ
0.1µF
5kΩ
10m of 75Ω
Coaxial Cable
0.1µF
7
Vin
3
+
75Ω
6
Vo
75Ω
CLC452
2
-
0.1µF
4
1kΩ
20ns/div
1kΩ
0.1µF
Vo
VCC
Pinout
Pinout
SOT23-5
DIP & SOIC
VEE
VEE
Vnon-inv
Vinv
© 1999 National Semiconductor Corporation
Printed in the U.S.A.
http://www.national.com
(A = +2, R = 1kΩ, R = 100Ω,V = +5V1,Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified)
+5V Electrical Characteristics
v
f
L
s
PARAMETERS
CONDITIONS
TYP
MIN/MAX RATINGS
0 to 70°C -40 to 85°C
UNITS
NOTES
Ambient Temperature
CLC452AJ
+25°C
+25°C
FREQUENCY DOMAIN RESPONSE
-3dB bandwidth
Vo = 0.5Vpp
Vo = 2.0Vpp
Vo = 0.5Vpp
130
95
30
0
0.1
0.1
95
80
25
0.5
0.3
0.2
90
77
20
0.9
0.3
0.3
85
75
20
1.0
0.3
0.3
MHz
MHz
MHz
dB
dB
deg
-0.1dB bandwidth
gain peaking
gain rolloff
linear phase deviation
<200MHz, Vo = 0.5Vpp
<30MHz, Vo = 0.5Vpp
<30MHz, Vo = 0.5Vpp
TIME DOMAIN RESPONSE
rise and fall time
settling time to 0.05%
overshoot
2V step
1V step
2V step
2V step
4.5
25
11
6.0
–
15
300
6.4
–
18
275
6.8
–
18
260
ns
ns
%
slew rate
400
V/µs
DISTORTION AND NOISE RESPONSE
2nd harmonic distortion
2Vpp, 1MHz
2Vpp, 1MHz; R = 1kΩ
-75
-78
-65
-74
-85
-60
-69
-70
-58
-70
-75
-55
-67
-68
-56
-68
-73
-53
-67
-68
-56
-68
-73
-53
dBc
dBc
dBc
dBc
dBc
dBc
L
2Vpp, 5MHz
2Vpp, 1MHz
3rd harmonic distortion
2Vpp, 1MHz; R = 1kΩ
2Vpp, 5MHz
L
equivalent input noise
voltage (eni)
>1MHz
>1MHz
>1MHz
2.8
7.5
10.5
3.5
10
14
3.8
11
15
3.8
11
15
nV/√Hz
pA/√Hz
pA/√Hz
non-inverting current (ibn)
inverting current (ibi)
STATIC DC PERFORMANCE
input offset voltage
average drift
input bias current (non-inverting)
average drift
input bias current (inverting)
average drift
power supply rejection ratio
common-mode rejection ratio
supply current
1
8
6
40
6
25
48
51
3.0
4
–
18
–
14
–
45
48
3.4
6
–
22
–
16
–
43
46
3.6
6
–
24
–
17
–
43
46
3.6
mV
µV/˚C
µA
nA/˚C
µA
nA/˚C
dB
dB
A
A
A
DC
DC
RL= ∞
mA
A
MISCELLANEOUS PERFORMANCE
input resistance (non-inverting)
input capacitance (non-inverting)
input voltage range, High
input voltage range, Low
0.39
1.5
4.2
0.8
4.0
1.0
4.1
0.9
100
70
0.28
2.3
4.1
0.9
3.9
1.1
4.0
1.0
80
0.25
2.3
4.0
1.0
3.8
1.2
4.0
1.0
65
0.25
2.3
4.0
1.0
3.8
1.2
3.9
1.1
40
MΩ
pF
V
V
V
V
V
V
mA
mΩ
output voltage range, High
output voltage range, Low
output voltage range, High
output voltage range, Low
output current
RL = 100Ω
RL = 100Ω
RL = ∞
RL = ∞
B
output resistance, closed loop
DC
105
105
140
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
Notes
Absolute Maximum Ratings
A) J-level: spec is 100% tested at +25°C.
B) The short circuit current can exceed the maximum safe
output current.
supply voltage (VCC - VEE
)
+14V
output current (see note C)
common-mode input voltage
maximum junction temperature
storage temperature range
lead temperature (soldering 10 sec)
ESD rating (human body model)
140mA
VEE to VCC
+150°C
1) Vs = VCC - VEE
-65°C to +150°C
+300°C
Reliability Information
500V
Transistor Count
49
31Mhr
MTBF (based on limited test data)
http://www.national.com
2
(A = +2, R = 1kΩ, R = 100Ω, VCC = ±5V, unless specified)
±5V Electrical Characteristics
v
f
L
PARAMETERS
CONDITIONS
TYP
GUARANTEED MIN/MAX
+25°C 0 to 70°C -40 to 85°C
UNITS
NOTES
Ambient Temperature
CLC452AJ
+25°C
FREQUENCY DOMAIN RESPONSE
-3dB bandwidth
Vo = 1.0Vpp
Vo = 4.0Vpp
Vo = 1.0Vpp
160
75
30
135
60
25
0.5
0.2
0.2
–
120
57
25
0.9
0.3
0.3
–
115
55
20
1.0
0.3
0.3
–
MHz
MHz
MHz
dB
dB
deg
%
-0.1dB bandwidth
gain peaking
gain rolloff
linear phase deviation
differential gain
differential phase
<200MHz, Vo = 1.0Vpp
<30MHz, Vo = 1.0Vpp
<30MHz, Vo = 1.0Vpp
NTSC, RL=150Ω
0
0.1
0.1
0.05
0.08
NTSC, RL=150Ω
–
–
–
deg
TIME DOMAIN RESPONSE
rise and fall time
settling time to 0.05%
overshoot
2V step
2V step
2V step
2V step
3.2
20
8
4.2
–
12
400
4.5
–
15
370
5.0
–
15
350
ns
ns
%
slew rate
540
V/µs
DISTORTION AND NOISE RESPONSE
2nd harmonic distortion
2Vpp, 1MHz
2Vpp, 1MHz; R = 1kΩ
-77
-78
-69
-72
-90
-58
-71
-72
-63
-68
-80
-54
-69
-70
-61
-66
-78
-52
-69
-70
-61
-66
-78
-52
dBc
dBc
dBc
dBc
dBc
dBc
L
2Vpp, 5MHz
2Vpp, 1MHz
3rd harmonic distortion
2Vpp, 1MHz; R = 1kΩ
2Vpp, 5MHz
L
equivalent input noise
voltage (eni)
>1MHz
>1MHz
>1MHz
2.8
7.5
10.5
3.5
10
14
3.8
11
15
3.8
11
15
nV/√Hz
pA/√Hz
pA/√Hz
non-inverting current (ibn)
inverting current (ibi)
STATIC DC PERFORMANCE
input offset voltage
average drift
input bias current (non-inverting)
average drift
input bias current (inverting)
average drift
power supply rejection ratio
common-mode rejection ratio
supply current
1
10
3
40
13
30
48
53
3.2
6
–
18
–
24
–
45
50
3.8
8
–
23
–
31
–
43
48
4.0
8
–
25
–
31
–
43
48
4.0
mV
µV/˚C
µA
nA/˚C
µA
nA/˚C
dB
dB
DC
DC
RL= ∞
mA
MISCELLANEOUS PERFORMANCE
input resistance (non-inverting)
input capacitance (non-inverting)
common-mode input range
output voltage range
0.52
1.2
0.35
1.8
0.30
1.8
0.30
1.8
MΩ
pF
V
V
V
±
±
±
4.2
3.8
4.0
±
±
±
4.1
3.6
3.8
±
±
±
4.1
3.6
3.8
±
±
±
4.0
3.5
3.7
RL = 100Ω
RL = ∞
output voltage range
output current
output resistance, closed loop
130
60
100
90
80
90
50
120
mA
mΩ
B
DC
Notes
Ordering Information
B) The short circuit current can exceed the maximum safe
output current.
Model
Temperature Range
Description
CLC452AJP
CLC452AJE
CLC452AJM5
CLC452ALC
CLC452A8B
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +175°C
8-pin PDIP
8-pin SOIC
5-pin SOT
dice
8-pin CerDIP,
MIL-STD-883
Package Thermal Resistance
Package
θJC
θJA
Plastic (AJP)
105°C/W
95°C/W
140°C/W
25°C/W
70°C/W
155°C/W
175°C/W
210°C/W
–
CLC452ALC
-55°C to +175°C
dice, MIL-STD-883
Surface Mount (AJE)
Surface Mount (AJM5)
Dice (ALC)
CerDIP (A8B)
215°C/W
3
http://www.national.com
(A = +2, R = 1kΩ, R = 100Ω, V = +5V1, Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified)
+5V Typical Performance
v
f
L
s
Non-Inverting Frequency Response
Inverting Frequency Response
Frequency Response vs. RL
Av = 2
Rf = 750Ω
Vo = 0.5Vpp
Gain
Vo = 0.5Vpp
Vo = 0.5Vpp
RL = 1kΩ
Av = 1
Rf = 1kΩ
Av = -1
Rf = 681Ω
RL = 100Ω
Gain
Gain
Av = -2
Rf = 604Ω
Phase
Phase
Phase
0
-180
-225
-270
-315
-360
-405
0
-90
RL = 25Ω
-90
Av = 5
Rf = 402Ω
-180
-270
-360
-450
-180
-270
-360
-450
Av = -5
Rf = 453Ω
Av = 10
Rf = 249Ω
Av = -10
Rf = 402Ω
1M
10M
100M
1M
10M
100M
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
Frequency (Hz)
Frequency Response vs. Vo
Frequency Response vs. CL
Open Loop Transimpedance Gain, Z(s)
120
100
80
220
180
140
100
60
Gain
Vo = 0.5Vpp
CL = 10pF
Vo = 1Vpp
Phase
Rs = 46.4Ω
CL = 100pF
Rs = 20Ω
CL = 1000pF
Rs = 6.7Ω
Vo = 2.5Vpp
60
+
-
Rs
CL
Vo = 0.1Vpp
1k
40
1k
1k
20
20
1M
10M
100M
1M
10M
100M
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
Equivalent Input Noise
Frequency (Hz)
Gain Flatness
2nd & 3rd Harmonic Distortion
12.5
10
3.2
-40
-50
-60
-70
-80
-90
Vo = 2Vpp
Inverting Current 10.5pA/√Hz
3rd
3.1
3
RL = 100Ω
2nd
RL = 1kΩ
Non-Inverting Current 7.5pA/√Hz
7.5
5
2nd
3rd
RL = 1kΩ
2.9
2.8
RL = 100Ω
Voltage 2.85nV/√Hz
2.5
10
20
30
1k
100k
1M
10M
1M
10M
Frequency (MHz)
Frequency (Hz)
Frequency (Hz)
2nd Harmonic Distortion, RL = 25Ω
3rd Harmonic Distortion, RL = 25Ω
2nd Harmonic Distortion, RL = 100Ω
-44
-46
-48
-50
-52
-54
-56
-58
-60
-35
-40
-45
-50
-55
-60
-65
-70
-75
-60
-65
-70
-75
-80
10MHz
10MHz
10MHz
5MHz
5MHz
2MHz
5MHz
2MHz
1MHz
2MHz
1MHz
1MHz
0
0.5
1
1.5
2
2.5
0
0.5
1
1.5
2
2.5
0
0.5
1
1.5
2
2.5
Output Amplitude (Vpp
)
Output Amplitude (Vpp
)
Output Amplitude (Vpp)
3rd Harmonic Distortion, RL = 100Ω
2nd Harmonic Distortion, RL = 1kΩ
3rd Harmonic Distortion, RL = 1kΩ
-45
-50
-55
-60
-65
-70
-75
-80
-60
-65
-70
-75
-80
-85
-60
-65
-70
-75
-80
-85
-90
-95
10MHz
5MHz
10MHz
10MHz
5MHz
2MHz
1MHz
5MHz
2MHz
1MHz
2MHz
1MHz
0.5
0
0.5
1
1.5
2
2.5
0
1
1.5
2
2.5
0
0.5
1
1.5
2
2.5
Output Amplitude (Vpp
)
Output Amplitude (Vpp
)
Output Amplitude (Vpp)
http://www.national.com
4
(A = +2, R = 1kΩ, R = 100Ω, V = + 5V1, Vcm = VEE + (Vs/2), RL tied to Vcm, unless specified)
+5V Typical Performance
v
f
L
s
Closed Loop Output Resistance
Recommended Rs vs. CL
Large & Small Signal Pulse Response
70
60
50
40
30
20
10
0
100
+
-
Rs
CL
Large Signal
1k
1k
10
1
1k
Small Signal
0.1
0.01
10k
100k
1M
10M
100M
10
100
1000
Time (10ns/div)
Frequency (Hz)
CL (pF)
PSRR & CMRR
IBN, Vos vs. Temperature
Maximum Output Voltage vs. RL
-0.6
-0.7
-0.8
-0.9
-1
6
60
50
40
30
20
10
0
4.8
4.4
4
PSRR
CMRR
5
4
3
2
1
IBN
Vos
3.6
3.2
2.8
2.4
2
-1.1
1.6
1k
10k
100k
1M
10M
100M
-100
-50
0
50
100
150
10
100
1000
Frequency (Hz)
Temperature (°C)
RL (Ω)
(A = +2, R = 1kΩ, R = 100Ω, VCC = ± 5V, unless specified)
±5V Typical Performance
v
f
L
Non-Inverting Frequency Response
Inverting Frequency Response
Frequency Response vs. RL
Vo = 1Vpp
Vo = 1Vpp
Vo = 1Vpp
RL = 1kΩ
Av = +2
Rf = 750Ω
Av = -2
Rf = 604Ω
RL = 100Ω
Gain
Gain
Gain
Av = +1
Rf = 1kΩ
Av = -1
Rf = 681Ω
Phase
Phase
Phase
0
-180
-225
-270
-315
-360
-425
0
-45
RL = 25Ω
-90
-90
-180
-270
-360
-450
Av = +5
Av = -5
Rf = 402
Rf = 453Ω
-135
-180
-225
Av = +10
Rf = 249Ω
Av = -10
Rf = 402Ω
1M
10M
100M
1M
10M
100M
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
Frequency (Hz)
Frequency Response vs. Vo
Frequency Response vs. CL
Gain Flatness
Vo = 0.1Vpp
Vo = 1Vpp
CL = 10pF
Rs = 68.1Ω
Vo = 1Vpp
CL = 100pF
Rs = 17.4Ω
Vo = 5Vpp
Vo = 2Vpp
CL = 1000pF
Rs = 6.7Ω
+
Rs
-
CL
1k
1k
1k
1M
10M
100M
1M
10M
100M
0
5
10
15
20
25
30
Frequency (Hz)
Frequency (Hz)
Frequency (MHz)
5
http://www.national.com
(A = +2, R = 1kΩ, R = 100Ω, VCC = ± 5V, unless specified)
±5V Typical Performance
v
f
L
Small Signal Pulse Response
Large Signal Pulse Response
2nd & 3rd Harmonic Distortion
-40
-50
-60
-70
-80
-90
Vo = 2Vpp
Av = +2
Av = +2
3rd
R
L = 100Ω
2nd
L = 1kΩ
R
2nd
RL = 100Ω
Av = -2
Av = -2
3rd
RL = 1kΩ
Time (10ns/div)
Time (10ns/div)
1M
10M
Frequency (Hz)
2nd Harmonic Distortion, RL = 25Ω
3rd Harmonic Distortion, RL = 25Ω
2nd Harmonic Distortion, RL = 100Ω
-40
-30
-55
-60
-65
-70
-75
-80
10MHz
-40
-50
-60
-70
-80
-90
-45
10MHz
10MHz
5MHz
5MHz
2MHz
-50
-55
-60
-65
5MHz
1MHz
2MHz
2MHz
1MHz
1MHz
0
1
2
3
4
5
0
1
2
3
4
5
0
1
2
3
4
5
Output Amplitude (Vpp
)
Output Amplitude (Vpp
)
Output Amplitude (Vpp)
3rd Harmonic Distortion, RL = 100Ω
2nd Harmonic Distortion, RL = 1kΩ
3rd Harmonic Distortion, RL = 1kΩ
-50
-55
-60
-65
-70
-75
-80
-60
-65
-70
-75
-80
-85
-60
-65
-70
-75
-80
-85
-90
-95
10MHz
10MHz
5MHz
5MHz
2MHz
2MHz
5MHz
2MHz
1MHz
10MHz
1MHz
1MHz
0
1
2
3
4
5
0
1
2
3
4
5
0
1
2
3
4
5
Output Amplitude (Vpp
)
Output Amplitude (Vpp
)
Output Amplitude (Vpp)
Recommended Rs vs. CL
Maximum Output Voltage vs. RL
Differential Gain & Phase
10
8
-0.01
-0.015
-0.02
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
70
60
50
40
30
20
10
0
+
-
f = 3.58MHz
Rs
Gain Positive Sync
CL
RL
1k
Gain Negative Sync
1k
6
-0.025
-0.03
Phase Positive Sync
4
Phase Negative Sync
2
-0.035
10
100
1000
10
100
1000
1
2
3
4
CL (pF)
RL (Ω)
Number of 150Ω Loads
IBN, Vos vs. Temperature
Short Term Settling Time
Long Term Settling Time
1.5
1
12
0.2
0.1
0
0.2
0.15
0.1
Vo = 2Vstep
Vo = 2Vstep
8
0.05
0
0.5
0
4
IBN
-0.05
-0.1
-0.15
-0.2
Vos
0
-0.1
-0.2
-0.5
-4
-100
-50
0
50
100
150
1
10
100
1000
1µ
10µ
100
µ
1m
10m
100m
1
Temperature (°C)
Time (ns)
Time (s)
http://www.national.com
6
CLC452 Operation
The CLC452 is a current feedback amplifier built in an
V
A
o
v
R
=
advanced complementary bipolar process. The CLC452
operates from a single 5V supply or dual ±5V supplies.
Operating from a single supply, the CLC452 has the
following features:
Equation 1
V
f
in
1+
Z(jω)
where:
■
■
■
A is the closed loop DC voltage gain
v
■
Provides 100mA of output current while
consuming 15mW of power
Offers low -78/-85dB 2nd and 3rd harmonic
R is the feedback resistor
f
Z(jω) is the CLC452’s open loop transimpedance
■
distortion
gain
■
Provides BW > 80MHz and 1MHz distortion
Z jω
(
)
is the loop gain
■
< -70dBc at V = 2.0V
o
pp
R
The CLC452 performance is further enhanced in ±5V
supply applications as indicated in the ±5V Electrical
Characteristics table and ±5V Typical Performance plots.
The denominator of Equation 1 is approximately equal to
1 at low frequencies. Near the -3dB corner frequency, the
interaction between R and Z(jω) dominates the circuit
f
Current Feedback Amplifiers
performance. The value of the feedback resistor has a
Some of the key features of current feedback technology
are:
large affect on the circuits performance. Increasing R
has the following affects:
f
■
Independence of AC bandwidth and voltage gain
Inherently stable at unity gain
Adjustable frequency response with feedback resistor
High slew rate
■
Decreases loop gain
■
■
Decreases bandwidth
■
■
Reduces gain peaking
■
■
Lowers pulse response overshoot
■
Fast settling
■
Affects frequency response phase linearity
Current feedback operation can be described using a simple
equation. The voltage gain for a non-inverting or inverting
current feedback amplifier is approximated by Equation 1.
Refer to the Feedback Resistor Selection section for
more details on selecting a feedback resistor value.
CLC452 Design Information
Single Supply Operation (V = +5V, V = GND)
The specifications given in the +5V Electrical Character-
istics table for single supply operation are measured with
For single supply DC coupled operation, keep input
signal levels above 0.8V DC. For input signals that drop
below 0.8V DC, AC coupling and level shifting the signal
are recommended. The non-inverting and inverting
configurations for both input conditions are illustrated in
the following 2 sections.
CC
EE
a common mode voltage (V ) of 2.5V. V is the volt-
cm
cm
age around which the inputs are applied and the
output voltages are specified.
Operating from a single +5V supply, the Common Mode
Input Range (CMIR) of the CLC452 is typically +0.8V to
DC Coupled Single Supply Operation
Figures 1 and 2 show the recommended non-inverting
and inverting configurations for input signals that remain
above 0.8V DC.
+4.2V. The typical output range with R =100Ω is +1.0V
L
to +4.0V.
VCC
VCC
Note: Rb, provides DC bias
Note: Rt, RL and Rg are tied
for non-inverting input.
6.8µF
6.8µF
to Vcm for minimum power
+
+
Rb, RL and Rt are tied
consumption and maximum
output swing.
to Vcm for minimum power
consumption and maximum
output swing.
0.1µF
0.1µF
7
3
7
3
2
Vin
+
+
6
6
Vo
Vo
RL
Vcm
CLC452
CLC452
Rb
2
Rt
Vcm
-
-
RL
Vcm
4
4
Rf
Vcm
Rt
Vcm
Rg
Rf
Vin
Rg
R
R
V
o
f
= A = 1+
R
v
V
o
Select Rt to yield
desired Rin = Rt || Rg
f
V
Vcm
= A = −
v
g
in
V
R
g
in
Figure 1: Non-Inverting Configuration
Figure 2: Inverting Configuration
7
http://www.national.com
AC Coupled Single Supply Operation
VCC
6.8µF
Figures 3 and 4 show possible non-inverting and invert-
ing configurations for input signals that go below 0.8V
DC. The input is AC coupled to prevent the need for
level shifting the input signal at the source. The resistive
+
0.1µF
Rb
Rg
7
3
2
+
voltage divider biases the non-inverting input to V ÷ 2
CC
6
Vo
CLC452
= 2.5V (For V = +5V).
CC
-
4
Rf
VCC
Vin
Rt
Note: Rb provides DC bias
for the non-inverting input.
Select Rt to yield desired
Rin = Rt || Rg.
6.8µF
0.1µF
+
R
R
+
Cc
0.1µF
7
3
2
Rf
Vo
Vin
6.8µF
+
= Av = −
6
Vo
V
Rg
in
VEE
CLC452
VCC
2
-
4
Rf
Figure 6: Dual Supply Inverting Configuration
Feedback Resistor Selection
The feedback resistor, R , affects the loop gain and
frequency response of a current feedback amplifier.
Optimum performance of the CLC452, at a gain of +2V/V,
Rg
C
R
f
f
V = V 1+
+ 2.5
o
in
R
g
1
R
low frequency cutoff =
, where: R
=
R >> R
source
in
2πR C
2
c
in
is achieved with R equal to 1kΩ.The frequency response
f
plots in the Typical Performance sections
Figure 3: AC Coupled Non-Inverting Configuration
illustrate the recommended R for several gains. These
f
recommended values of R provide the maximum band-
f
VCC
width with minimal peaking. Within limits, R can be
f
6.8µF
adjusted to optimize the frequency response.
+
■
VCC
2
Decrease R to peak frequency response and
extend bandwidth
R
R
f
0.1µF
7
3
2
+
6
Vo
■
Increase R to roll off frequency response and
f
CLC452
Cc
Rg
Vin
compress bandwidth
-
4
Rf
As a rule of thumb, if the recommended R is doubled,
then the bandwidth will be cut in half.
f
R
f
V = V
−
+ 2.5
Unity Gain Operation
o
in
R
g
The recommended R for unity gain (+1V/V) operation
f
1
low frequency cutoff =
is 1kΩ. R is left open. Parasitic capacitance at the
g
2πR C
g
c
inverting node may require a slight increase in R to
f
maintain a flat frequency response.
Figure 4: AC Coupled Inverting Configuration
Bandwidth vs. Output Amplitude
The bandwidth of the CLC452 is at a maximum for
Dual Supply Operation
The CLC452 operates on dual supplies as well as single
supplies. The non-inverting and inverting configurations
are shown in Figures 5 and 6.
output voltages near 1V . The bandwidth decreases
pp
for smaller and larger output amplitudes. Refer to the
Frequency Response vs. V plots.
o
VCC
6.8µF
Load Termination
+
The CLC452 can source and sink near equal amounts of
current. For optimum performance, the load should be
0.1µF
tied to V
.
7
cm
Vin
3
2
+
6
Vo
CLC452
Driving Cables and Capacitive Loads
Rt
-
When driving cables, double termination is used to
prevent reflections. For capacitive load applications, a
small series resistor at the output of the CLC452 will
improve stability and settling performance. The
4
Rf
R
V
o
f
= A = 1+
v
0.1µF
Rg
V
R
g
in
+
Frequency Response vs. C and Recommended R
L
s
6.8µF
vs. C plots, in the typical performance section, give the
L
VEE
recommended series resistance value for optimum
flatness at various capacitive loads.
Figure 5: Dual Supply Non-Inverting Configuration
http://www.national.com
8
1.0
0.8
0.6
0.4
0.2
0
Transmission Line Matching
One method for matching the characteristic impedance
AJP
AJE
(Z ) of a transmission line or cable is to place the
o
appropriate resistor at the input or output of the amplifier.
Figure 7 shows typical inverting and non-inverting circuit
configurations for matching transmission lines.
SOT
C6
Z0
R1
R3
R2
Rg
R5
+
Z0
Vo
R7
CLC452
+
-
V1
V2
R6
-
Z0
Rf
R4
-40 -20
0
20 40 60 80 100 120 140 160 180
Ambient Temperature (°C)
+
-
Figure 8: Power Derating Curves
Layout Considerations
Figure 7:Transmission Line Matching
A proper printed circuit layout is essential for achieving
high frequency performance. Comlinear provides
evaluation boards for the CLC452 (730013-DIP, 730027-
SOIC, 730068-SOT) and suggests their use as a guide
for high frequency layout and as an aid for device testing
and characterization.
Non-inverting gain applications:
■
Connect R directly to ground.
g
■
Make R , R , R , and R equal to Z .
1
2
6
7
o
■
Use R to isolate the amplifier from reactive
3
loading caused by the transmission line,
or by parasitics.
General layout and supply bypassing play major roles in
high frequency performance. Follow the steps below as
a basis for high frequency layout:
Inverting gain applications:
■
Connect R directly to ground.
3
■
■
■
Include 6.8µF tantalum and 0.1µF ceramic
capacitors on both supplies.
Place the 6.8µF capacitors within 0.75 inches
of the power pins.
Place the 0.1µF capacitors less than 0.1 inches
from the power pins.
Remove the ground plane under and around the
part, especially near the input and output pins to
reduce parasitic capacitance.
Minimize all trace lengths to reduce series
inductances.
Use flush-mount printed circuit board pins for
prototyping, never use high profile DIP sockets.
Make the resistors R , R , and R equal to Z .
4
6
7
o
Make R II R = Z .
5
g
o
■
The input and output matching resistors attenuate the
signal by a factor of 2, therefore additional gain is needed.
■
Use C to match the output transmission line over a
6
greater frequency range. C compensates for the increase
of the amplifier’s output impedance with frequency.
6
■
Power Dissipation
Follow these steps to determine the power consumption
of the CLC452:
■
■
1. Calculate the quiescent (no-load) power:
P
= I (V - V
)
amp
CC
CC
EE
Evaluation Board Information
2. Calculate the RMS power at the output stage:
P = (V - V ) (I ), where V and I
load
Data sheets are available for the CLC730013/
CLC730027 and CLC730068 evaluation boards. The
evaluation board data sheets provide:
o
CC
load
load
load
are the RMS voltage and current across the
external load.
■
3. Calculate the total RMS power:
Evaluation board schematics
■
P = P
+ P
Evaluation board layouts
t
amp
o
■
General information about the boards
The maximum power that the DIP, SOIC, and SOT
packages can dissipate at a given temperature is
illustrated in Figure 8. The power derating curve for
any CLC452 package can be derived by utilizing the
following equation:
The CLC730013/CLC730027 data sheet also contains
tables of recommended components to evaluate several
of Comlinear’s high speed amplifiers. This table for the
CLC452 is illustrated below. Refer to the evaluation
board data sheet for schematics and further information.
(175° − T
)
amb
Components Needed to Evaluate the
CLC452 on the Evaluation Board:
θ
JA
where
■
R , R - Use this product data sheet to select values
f
g
T
= Ambient temperature (°C)
■
R , R - Typically 50Ω (Refer to the Basic
amb
in
out
θ
= Thermal resistance, from junction to ambient,
for a given package (°C/W)
Operation section of the evaluation board data
sheet for details)
JA
9
http://www.national.com
■
R - Optional resistor for inverting gain configura-
R
t
f
Gain = K = 1+
tions (Select R to yield desired input impedance
t
R
g
= R || R )
g
t
■
■
1
C , C - 0.1µF ceramic capacitors
1
2
Corner frequency = ω =
c
C , C - 6.8µF tantalum capacitors
R R C C
2 1 2
3
4
1
Components not used:
1
Q =
■
C , C , C , C
5
6
7
8
8
R C
R C
R C
1 1
2
2
1
2
+
+ (1−K)
■
R thru R
1
R C
R C
R C
2 2
1
1
2
1
The evaluation boards are designed to accommodate
dual supplies. The boards can be modified to provide
single supply operation. For best performance; 1) do
not connect the unused supply, 2) ground the unused
supply pin.
For R = R = R and C = C = C
1
2
1
2
1
ω =
c
RC
1
Q =
SPICE Models
(3 − K)
Figure 10: Design Equations
This example illustrates a lowpass filter with Q = 0.707
SPICE models provide a means to evaluate amplifier
designs. Free SPICE models are available for
Comlinear’s monolithic amplifiers that:
■
Support Berkeley SPICE 2G and its many derivatives
and corner frequency f = 10MHz. A Q of 0.707 was cho-
c
■
Reproduce typical DC, AC, Transient, and Noise
sen to achieve a maximally flat, Butterworth response.
Figure 11 indicates the filter response.
performance
■
Support room temperature simulations
3
0
The readme file that accompanies the diskette lists
released models, and provides a list of modeled parame-
ters. The application note OA-18, Simulation SPICE
Models for Comlinear’s Op Amps, contains schematics
and a reproduction of the readme file.
-3
-6
-9
-12
-15
-18
-21
-24
-27
-30
Application Circuits
Single Supply Cable Driver
The typical application shown on the front page shows
the CLC452 driving 10m of 75Ω coaxial cable. The
CLC452 is set for a gain of +2V/V to compensate for the
1M
10M
100M
Frequency (Hz)
divide-by-two voltage drop at V .
o
Figure 11: Lowpass Response
Twisted Pair Driver
The high output current and low distortion, of the
CLC452, make it well suited for driving transformers.
Figure 12 illustrates a typical twisted pair driver utilizing
the CLC452 and a transformer. The transformer
provides the signal and its inversion for the twisted pair.
Single Supply Lowpass Filter
Figures 9 and 10 illustrate a lowpass filter and design
equations. The circuit operates from a single supply of
+5V. The voltage divider biases the non-inverting input to
2.5V. And the input is AC coupled to prevent the need for
level shifting the input signal at the source. Use the
design equations to determine R , R , C , and C based
1
2
1
2
on the desired Q and corner frequency.
n
V = AvV
Vin
Rt
+5V
in
3
2
V = Av Vin
6
4
+
Rm
IL
1:n
CLC452
-
+
Vo
-
Zo
0.1µF
RL
Rf
5kΩ
UTP
0.1µF
C1
6
R1
R2
7
3
2
Vin
+
-n
4
0.1µF
Req
Rg
V =
AvV
in
Vo
100Ω
158Ω 158Ω
CLC452
Rf
1n
2
Vo
=
AvV
in
Av = 1+
-
5kΩ
C2
Rg
4
Rf
1kΩ
100pF
Figure 12:Twisted Pair Driver
1.698kΩ Rg
0.1µF
To match the line’s characteristic impedance (Z ) set:
o
■
R = Z
L
o
■
R = R
Figure 9: Lowpass Filter Topology
m
eq
http://www.national.com
10
Where R is the transformed value of the load imped-
The load current (I ) and voltage (V ) are related to the
L o
eq
ance, (R ), and is approximated by:
CLC452’s maximum output voltage and current by:
L
R
L
V
≤ n V
R
=
o
max
eq
2
n
I
max
I
≤
Select the transformer so that it loads the line with a
value close to Z , over the desired frequency range. The
L
n
o
From the above current relationship, it is obvious that an
amplifier with high output drive capability is required.
output impedance, R , of the CLC452 varies with
frequency and can also affect the return loss. The return
loss, shown below, takes into account an ideal
o
transformer and the value of R .
o
R
Z
2
o
o
Return Loss(dB) ≈ − 20log
n
10
11
http://www.national.com
Customer Design Applications Support
National Semiconductor is committed to design excellence. For sales, literature and technical support, call the
National Semiconductor Customer Response Group at 1-800-272-9959 or fax 1-800-737-7018.
Life Support Policy
National’s products are not authorized for use as critical components in life support devices or systems without the express written approval of
the president of National Semiconductor Corporation. As used herein:
1. Life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or
sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to
cause the failure of the life support device or system, or to affect its safety or effectiveness.
National Semiconductor
Corporation
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
National Semiconductor
Europe
National Semiconductor
Hong Kong Ltd.
2501 Miramar Tower
1-23 Kimberley Road
Tsimshatsui, Kowloon
Hong Kong
National Semiconductor
Japan Ltd.
Tel: 81-043-299-2309
Fax: (+49) 0-180-530 85 86
E-mail: europe.support.nsc.com
Deutsch Tel: (+49) 0-180-530 85 85
English Tel: (+49) 0-180-532 78 32
Francais Tel: (+49) 0-180-532 93 58
Italiano Tel: (+49) 0-180-534 16 80
Fax: 81-043-299-2408
N
Tel: (852) 2737-1600
Fax: (852) 2736-9960
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said
circuitry and specifications.
http://www.national.com
12
相关型号：
©2020 ICPDF网 联系我们和版权申明